diff --git a/.gitignore b/.gitignore index 567d830..e7e5350 100644 --- a/.gitignore +++ b/.gitignore @@ -1,18 +1,267 @@ -#generic files/directories to ignore +## Ignore Visual Studio temporary files, build results, and +## files generated by popular Visual Studio add-ons. + +# User-specific files +*.suo +*.user +*.userosscache +*.sln.docstates + +# User-specific files (MonoDevelop/Xamarin Studio) +*.userprefs + +# Visual Studio 2015 cache/options directory +.vs/ +.vscode/ +# Uncomment if you have tasks that create the project's static files in wwwroot +#wwwroot/ + +# MSTest test Results +[Tt]est[Rr]esult*/ +[Bb]uild[Ll]og.* + +# NUNIT +*.VisualState.xml +TestResult.xml + +# Build Results of an ATL Project +[Dd]ebugPS/ +[Rr]eleasePS/ Win32/ -x64/ +[Dd]ebug/ +[Rr]elease/ +dlldata.c + +# DNX +project.lock.json +artifacts/ + +*_i.c +*_p.c +*_i.h +*.ilk +*.meta +*.obj +*.pch +*.pdb +*.pgc +*.pgd +*.rsp +*.sbr +*.tlb +*.tli +*.tlh +*.tmp +*.tmp_proj +*.log +*.vspscc +*.vssscc +.builds +*.pidb +*.svclog +*.scc + +# Chutzpah Test files +_Chutzpah* + +# Visual C++ cache files ipch/ +*.aps +*.ncb +*.opendb *.opensdf *.sdf -*.aps -*.suo -Scylla.vcxproj.user +*.cachefile +*.VC.db + +# Visual Studio profiler +*.psess +*.vsp +*.vspx +*.sap + +# TFS 2012 Local Workspace +$tf/ + +# Guidance Automation Toolkit +*.gpState + +# ReSharper is a .NET coding add-in +_ReSharper*/ +*.[Rr]e[Ss]harper +*.DotSettings.user + +# JustCode is a .NET coding add-in +.JustCode + +# TeamCity is a build add-in +_TeamCity* + +# DotCover is a Code Coverage Tool +*.dotCover + +# NCrunch +_NCrunch_* +.*crunch*.local.xml +nCrunchTemp_* + +# MightyMoose +*.mm.* +AutoTest.Net/ + +# Web workbench (sass) +.sass-cache/ + +# Installshield output folder +[Ee]xpress/ + +# DocProject is a documentation generator add-in +DocProject/buildhelp/ +DocProject/Help/*.HxT +DocProject/Help/*.HxC +DocProject/Help/*.hhc +DocProject/Help/*.hhk +DocProject/Help/*.hhp +DocProject/Help/Html2 +DocProject/Help/html + +# Click-Once directory +publish/ + +# Publish Web Output +*.[Pp]ublish.xml +*.azurePubxml + +# TODO: Un-comment the next line if you do not want to checkin +# your web deploy settings because they may include unencrypted +# passwords +#*.pubxml +*.publishproj + +# NuGet Packages +*.nupkg +# The packages folder can be ignored because of Package Restore +**/packages/* +# except build/, which is used as an MSBuild target. +!**/packages/build/ +# Uncomment if necessary however generally it will be regenerated when needed +#!**/packages/repositories.config +# NuGet v3's project.json files produces more ignoreable files +*.nuget.props +*.nuget.targets + +# Microsoft Azure Build Output +csx/ +*.build.csdef + +# Microsoft Azure Emulator +ecf/ +rcf/ + +# Microsoft Azure ApplicationInsights config file +ApplicationInsights.config + +# Windows Store app package directory +AppPackages/ +BundleArtifacts/ + +# Visual Studio cache files +# files ending in .cache can be ignored +*.[Cc]ache +# but keep track of directories ending in .cache +!*.[Cc]ache/ + +# Others +ClientBin/ +[Ss]tyle[Cc]op.* +~$* +*~ +*.dbmdl +*.dbproj.schemaview +*.pfx +*.publishsettings +node_modules/ +orleans.codegen.cs + +# RIA/Silverlight projects +Generated_Code/ + +# Backup & report files from converting an old project file +# to a newer Visual Studio version. Backup files are not needed, +# because we have git ;-) +_UpgradeReport_Files/ +Backup*/ +UpgradeLog*.XML +UpgradeLog*.htm + +# SQL Server files +*.mdf +*.ldf + +# Business Intelligence projects +*.rdl.data +*.bim.layout +*.bim_*.settings + +# Microsoft Fakes +FakesAssemblies/ + +# GhostDoc plugin setting file +*.GhostDoc.xml + +# Node.js Tools for Visual Studio +.ntvs_analysis.dat + +# Visual Studio 6 build log +*.plg + +# Visual Studio 6 workspace options file +*.opt + +# Visual Studio LightSwitch build output +**/*.HTMLClient/GeneratedArtifacts +**/*.DesktopClient/GeneratedArtifacts +**/*.DesktopClient/ModelManifest.xml +**/*.Server/GeneratedArtifacts +**/*.Server/ModelManifest.xml +_Pvt_Extensions + +# LightSwitch generated files +GeneratedArtifacts/ +ModelManifest.xml + +# Paket dependency manager +.paket/paket.exe + +# FAKE - F# Make +.fake/ +/src/presentations/web/wwwroot +/src/services/webjob/lucene +appsettings.Development.json + +# CMake +CMakeCache.txt +CMakeFiles/ +CMakeScripts +Testing +Makefile +cmake_install.cmake +install_manifest.txt +compile_commands.json +CTestTestfile.cmake +CPackConfig.cmake +CPackSourceConfig.cmake +build/ +build.*/ + +# Python +*.pyc + +# .idea +.idea/ -#tinyxml ignore + exceptions -tinyxml/* -!tinyxml/README -!tinyxml/tinyxml.vcxproj* +# bin +bin/ +*.a -#WTL ignore + exceptions -WTL/* -!WTL/README \ No newline at end of file +mason_packages/ \ No newline at end of file diff --git a/.gitmodules b/.gitmodules new file mode 100644 index 0000000..33d258d --- /dev/null +++ b/.gitmodules @@ -0,0 +1,9 @@ +[submodule "libs/distorm"] + path = libs/distorm + url = https://github.com/gdabah/distorm.git +[submodule "libs/tinyxml"] + path = libs/tinyxml + url = https://github.com/icebreaker/TinyXML.git +[submodule "libs/wtl"] + path = libs/wtl + url = https://github.com/dacci/wtl.git diff --git a/COMPILING b/COMPILING index c7782c6..92011ec 100644 --- a/COMPILING +++ b/COMPILING @@ -1,7 +1,15 @@ -To compile Scylla you need to have VS2008 installed. -In addition to that you need source codes for the following libraries: -diStorm -tinyxml -WTL +Building +-------- -See the corresponding README files for installation instructions. \ No newline at end of file + Prerequisite: + * Visual Studio 2017 or newer + * Windows Desktop Development components + * Windows SDK version 8.1+ + * Git for Windows + +Clone this repo and open up your `Developer Command Prompt for VS` to the code folder. + +```shell +> git submodule update --init --recursive +> msbuild Scylla +``` \ No newline at end of file diff --git a/Plugins/ImpRec_Plugins/Imprec_Wrapper_DLL.dll b/Plugins/ImpRec_Plugins/Imprec_Wrapper_DLL.dll deleted file mode 100644 index 6cd85b2..0000000 Binary files a/Plugins/ImpRec_Plugins/Imprec_Wrapper_DLL.dll and /dev/null differ diff --git a/Plugins/ImpRec_Plugins/PECompact 2.7.x.dll b/Plugins/ImpRec_Plugins/PECompact 2.7.x.dll deleted file mode 100644 index 13f044a..0000000 Binary files a/Plugins/ImpRec_Plugins/PECompact 2.7.x.dll and /dev/null differ diff --git a/Plugins/PECompact.dll b/Plugins/PECompact.dll deleted file mode 100644 index 667e26d..0000000 Binary files a/Plugins/PECompact.dll and /dev/null differ diff --git a/Plugins/PESpin_x64_v1.dll b/Plugins/PESpin_x64_v1.dll deleted file mode 100644 index 092e2c3..0000000 Binary files a/Plugins/PESpin_x64_v1.dll and /dev/null differ diff --git a/Plugins/Scylla.Plugins.sln b/Plugins/Scylla.Plugins.sln new file mode 100644 index 0000000..2052732 --- /dev/null +++ b/Plugins/Scylla.Plugins.sln @@ -0,0 +1,51 @@ + +Microsoft Visual Studio Solution File, Format Version 12.00 +# Visual Studio Version 16 +VisualStudioVersion = 16.0.28315.86 +MinimumVisualStudioVersion = 10.0.40219.1 +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "ImprecWrapper", "src\ImprecWrapper\ImprecWrapper.vcxproj", "{9E21BF66-17A6-4EC9-A8C9-1CAF895CFE9B}" +EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "PECompact", "src\PECompact\PECompact.vcxproj", "{01F5FC2E-0917-49A4-8AF1-ACA87604C66A}" +EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "PESpin", "src\PESpin\PESpin.vcxproj", "{972D5174-2D85-4842-88FF-48426B23C56F}" +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + Debug|x64 = Debug|x64 + Debug|x86 = Debug|x86 + Release|x64 = Release|x64 + Release|x86 = Release|x86 + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {9E21BF66-17A6-4EC9-A8C9-1CAF895CFE9B}.Debug|x64.ActiveCfg = Debug|x64 + {9E21BF66-17A6-4EC9-A8C9-1CAF895CFE9B}.Debug|x64.Build.0 = Debug|x64 + {9E21BF66-17A6-4EC9-A8C9-1CAF895CFE9B}.Debug|x86.ActiveCfg = Debug|Win32 + {9E21BF66-17A6-4EC9-A8C9-1CAF895CFE9B}.Debug|x86.Build.0 = Debug|Win32 + {9E21BF66-17A6-4EC9-A8C9-1CAF895CFE9B}.Release|x64.ActiveCfg = Release|x64 + {9E21BF66-17A6-4EC9-A8C9-1CAF895CFE9B}.Release|x64.Build.0 = Release|x64 + {9E21BF66-17A6-4EC9-A8C9-1CAF895CFE9B}.Release|x86.ActiveCfg = Release|Win32 + {9E21BF66-17A6-4EC9-A8C9-1CAF895CFE9B}.Release|x86.Build.0 = Release|Win32 + {01F5FC2E-0917-49A4-8AF1-ACA87604C66A}.Debug|x64.ActiveCfg = Debug|x64 + {01F5FC2E-0917-49A4-8AF1-ACA87604C66A}.Debug|x64.Build.0 = Debug|x64 + {01F5FC2E-0917-49A4-8AF1-ACA87604C66A}.Debug|x86.ActiveCfg = Debug|Win32 + {01F5FC2E-0917-49A4-8AF1-ACA87604C66A}.Debug|x86.Build.0 = Debug|Win32 + {01F5FC2E-0917-49A4-8AF1-ACA87604C66A}.Release|x64.ActiveCfg = Release|x64 + {01F5FC2E-0917-49A4-8AF1-ACA87604C66A}.Release|x64.Build.0 = Release|x64 + {01F5FC2E-0917-49A4-8AF1-ACA87604C66A}.Release|x86.ActiveCfg = Release|Win32 + {01F5FC2E-0917-49A4-8AF1-ACA87604C66A}.Release|x86.Build.0 = Release|Win32 + {972D5174-2D85-4842-88FF-48426B23C56F}.Debug|x64.ActiveCfg = Debug|x64 + {972D5174-2D85-4842-88FF-48426B23C56F}.Debug|x64.Build.0 = Debug|x64 + {972D5174-2D85-4842-88FF-48426B23C56F}.Debug|x86.ActiveCfg = Debug|Win32 + {972D5174-2D85-4842-88FF-48426B23C56F}.Debug|x86.Build.0 = Debug|Win32 + {972D5174-2D85-4842-88FF-48426B23C56F}.Release|x64.ActiveCfg = Release|x64 + {972D5174-2D85-4842-88FF-48426B23C56F}.Release|x64.Build.0 = Release|x64 + {972D5174-2D85-4842-88FF-48426B23C56F}.Release|x86.ActiveCfg = Release|Win32 + {972D5174-2D85-4842-88FF-48426B23C56F}.Release|x86.Build.0 = Release|Win32 + EndGlobalSection + GlobalSection(SolutionProperties) = preSolution + HideSolutionNode = FALSE + EndGlobalSection + GlobalSection(ExtensibilityGlobals) = postSolution + SolutionGuid = {D8C3EC6B-083F-4C08-A4A0-693F3D7542A6} + EndGlobalSection +EndGlobal diff --git a/Plugins/Sources/scyllatoimprectree.rar b/Plugins/Sources/scyllatoimprectree.rar deleted file mode 100644 index 81211c5..0000000 Binary files a/Plugins/Sources/scyllatoimprectree.rar and /dev/null differ diff --git a/Plugins/Include_Headers/ScyllaPlugin.h b/Plugins/include/ScyllaPlugin.h similarity index 100% rename from Plugins/Include_Headers/ScyllaPlugin.h rename to Plugins/include/ScyllaPlugin.h diff --git a/Plugins/src/ImprecWrapper/ImprecWrapper.vcxproj b/Plugins/src/ImprecWrapper/ImprecWrapper.vcxproj new file mode 100644 index 0000000..660f906 --- /dev/null +++ b/Plugins/src/ImprecWrapper/ImprecWrapper.vcxproj @@ -0,0 +1,100 @@ + + + + + Debug + Win32 + + + Release + Win32 + + + + 15.0 + {9E21BF66-17A6-4EC9-A8C9-1CAF895CFE9B} + Win32Proj + ImprecWrapper + 10.0.17763.0 + + + + DynamicLibrary + true + v141_xp + Unicode + + + DynamicLibrary + false + v141_xp + true + Unicode + + + + + + + + + + + + + + + true + + + false + + + + Use + Level3 + Disabled + true + WIN32;_DEBUG;IMPRECWRAPPER_EXPORTS;_WINDOWS;_USRDLL;%(PreprocessorDefinitions) + true + $(ProjectDir)..\..\include;%(AdditionalIncludeDirectories) + + + Windows + true + + + + + Use + Level3 + MaxSpeed + true + true + true + WIN32;NDEBUG;IMPRECWRAPPER_EXPORTS;_WINDOWS;_USRDLL;%(PreprocessorDefinitions) + true + $(ProjectDir)..\..\include;%(AdditionalIncludeDirectories) + + + Windows + true + true + true + + + + + + + + + + Create + Create + + + + + + \ No newline at end of file diff --git a/tinyxml/tinyxml.vcxproj.filters b/Plugins/src/ImprecWrapper/ImprecWrapper.vcxproj.filters similarity index 72% rename from tinyxml/tinyxml.vcxproj.filters rename to Plugins/src/ImprecWrapper/ImprecWrapper.vcxproj.filters index 86cc631..7ddc4d2 100644 --- a/tinyxml/tinyxml.vcxproj.filters +++ b/Plugins/src/ImprecWrapper/ImprecWrapper.vcxproj.filters @@ -7,7 +7,7 @@ {93995380-89BD-4b04-88EB-625FBE52EBFB} - h;hpp;hxx;hm;inl;inc;xsd + h;hh;hpp;hxx;hm;inl;inc;ipp;xsd {67DA6AB6-F800-4c08-8B7A-83BB121AAD01} @@ -15,25 +15,19 @@ - - Source Files - - - Source Files - - - Source Files - - - Source Files - - - - + Header Files - + Header Files + + + Source Files + + + Source Files + + \ No newline at end of file diff --git a/Plugins/Sources/Imprec_Wrapper_DLL.cpp b/Plugins/src/ImprecWrapper/Imprec_Wrapper_DLL.cpp similarity index 97% rename from Plugins/Sources/Imprec_Wrapper_DLL.cpp rename to Plugins/src/ImprecWrapper/Imprec_Wrapper_DLL.cpp index cf8a5fb..806e93e 100644 --- a/Plugins/Sources/Imprec_Wrapper_DLL.cpp +++ b/Plugins/src/ImprecWrapper/Imprec_Wrapper_DLL.cpp @@ -1,3 +1,5 @@ +#include "stdafx.h" + #include "ScyllaPlugin.h" //remove c runtime library @@ -7,6 +9,7 @@ //typedef DWORD (__cdecl * def_ImpREC_TraceCDE)(DWORD hFileMap, DWORD dwSizeMap, DWORD dwTimeOut, DWORD dwToTrace, DWORD dwExactCall); typedef DWORD (* def_voidFunction)(); +#define PLUGIN_NAME "ImprecWrapper" #define PLUGIN_IMPREC_EXCHANGE_DLL_PATH "ScyllaImprecPluginExchangePath" #define PLUGIN_MAPPING_NAME "Imprec_plugin_exchanging" @@ -82,6 +85,18 @@ BOOL WINAPI DllMain(HINSTANCE hinstDLL, DWORD fdwReason,LPVOID lpvReserved) return TRUE; // Successful DLL_PROCESS_ATTACH. } +#ifdef UNICODE +DllExport wchar_t * __cdecl ScyllaPluginNameW() +{ + return (wchar_t*)TEXT(PLUGIN_NAME); +} +#else +DllExport char * __cdecl ScyllaPluginNameA() +{ + return PLUGIN_NAME; +} +#endif + /*void checkCallingConvention() { __asm { diff --git a/Plugins/src/ImprecWrapper/stdafx.cpp b/Plugins/src/ImprecWrapper/stdafx.cpp new file mode 100644 index 0000000..fd4f341 --- /dev/null +++ b/Plugins/src/ImprecWrapper/stdafx.cpp @@ -0,0 +1 @@ +#include "stdafx.h" diff --git a/Plugins/src/ImprecWrapper/stdafx.h b/Plugins/src/ImprecWrapper/stdafx.h new file mode 100644 index 0000000..f380517 --- /dev/null +++ b/Plugins/src/ImprecWrapper/stdafx.h @@ -0,0 +1,16 @@ +// stdafx.h : include file for standard system include files, +// or project specific include files that are used frequently, but +// are changed infrequently +// + +#pragma once + +#include "targetver.h" + +#define WIN32_LEAN_AND_MEAN // Exclude rarely-used stuff from Windows headers +// Windows Header Files +#include + + + +// reference additional headers your program requires here diff --git a/Plugins/src/ImprecWrapper/targetver.h b/Plugins/src/ImprecWrapper/targetver.h new file mode 100644 index 0000000..87c0086 --- /dev/null +++ b/Plugins/src/ImprecWrapper/targetver.h @@ -0,0 +1,8 @@ +#pragma once + +// Including SDKDDKVer.h defines the highest available Windows platform. + +// If you wish to build your application for a previous Windows platform, include WinSDKVer.h and +// set the _WIN32_WINNT macro to the platform you wish to support before including SDKDDKVer.h. + +#include diff --git a/Plugins/Sources/PECompact.cpp b/Plugins/src/PECompact/PECompact.cpp similarity index 92% rename from Plugins/Sources/PECompact.cpp rename to Plugins/src/PECompact/PECompact.cpp index 03cc7b2..498d501 100644 --- a/Plugins/Sources/PECompact.cpp +++ b/Plugins/src/PECompact/PECompact.cpp @@ -1,3 +1,4 @@ +#include "stdafx.h" #include "ScyllaPlugin.h" @@ -20,10 +21,10 @@ void resolveImports(); #define PLUGIN_NAME "PECompact v2.x" -BOOL WINAPI DllMain(HINSTANCE hinstDLL, DWORD fdwReason,LPVOID lpvReserved) +BOOL WINAPI DllMain(HINSTANCE hinstDLL, DWORD fdwReason, LPVOID lpvReserved) { - switch(fdwReason) - { + switch (fdwReason) + { case DLL_PROCESS_ATTACH: // Initialize once for each new process. // Return FALSE to fail DLL load. @@ -63,7 +64,7 @@ BOOL getMappedView() return FALSE; } - lpViewOfFile = MapViewOfFile(hMapFile, FILE_MAP_ALL_ACCESS, 0, 0, 0); //map the view with full access + lpViewOfFile = MapViewOfFile(hMapFile, FILE_MAP_ALL_ACCESS, 0, 0, 0); //map the view with full access if (lpViewOfFile == 0) { @@ -126,7 +127,7 @@ void resolveImports() scyllaExchange->status = SCYLLA_STATUS_UNSUPPORTED_PROTECTION; break; } - + unresolvedImport++; //next pointer to struct } } @@ -148,12 +149,12 @@ BOOL writeToLogFile(const char * text) { if (buffer[i] == '\\') { - buffer[i+1] = 0x00; + buffer[i + 1] = 0x00; break; } } - if (lstrcatA(buffer,logFileName) == 0) //append log file name to path + if (lstrcatA(buffer, logFileName) == 0) //append log file name to path { return FALSE; } @@ -175,7 +176,7 @@ BOOL writeToLogFile(const char * text) { wfRet = FALSE; } - + CloseHandle(hFile); return wfRet; } @@ -184,7 +185,7 @@ BOOL writeToLogFile(const char * text) #ifdef UNICODE DllExport wchar_t * __cdecl ScyllaPluginNameW() { - return TEXT(PLUGIN_NAME); + return (wchar_t*)TEXT(PLUGIN_NAME); } #else DllExport char * __cdecl ScyllaPluginNameA() diff --git a/Plugins/src/PECompact/PECompact.vcxproj b/Plugins/src/PECompact/PECompact.vcxproj new file mode 100644 index 0000000..35574a7 --- /dev/null +++ b/Plugins/src/PECompact/PECompact.vcxproj @@ -0,0 +1,169 @@ + + + + + Debug + Win32 + + + Release + Win32 + + + Debug + x64 + + + Release + x64 + + + + 15.0 + {01F5FC2E-0917-49A4-8AF1-ACA87604C66A} + Win32Proj + ImprecWrapper + 10.0.17763.0 + + + + DynamicLibrary + true + v141_xp + Unicode + + + DynamicLibrary + false + v141_xp + true + Unicode + + + DynamicLibrary + true + v141_xp + Unicode + + + DynamicLibrary + false + v141_xp + true + Unicode + + + + + + + + + + + + + + + + + + + + + true + + + true + + + false + + + false + + + + Use + Level3 + Disabled + true + WIN32;_DEBUG;IMPRECWRAPPER_EXPORTS;_WINDOWS;_USRDLL;%(PreprocessorDefinitions) + true + $(ProjectDir)..\..\include;%(AdditionalIncludeDirectories) + + + Windows + true + + + + + Use + Level3 + Disabled + true + _DEBUG;IMPRECWRAPPER_EXPORTS;_WINDOWS;_USRDLL;%(PreprocessorDefinitions) + true + $(ProjectDir)..\..\include;%(AdditionalIncludeDirectories) + + + Windows + true + + + + + Use + Level3 + MaxSpeed + true + true + true + WIN32;NDEBUG;IMPRECWRAPPER_EXPORTS;_WINDOWS;_USRDLL;%(PreprocessorDefinitions) + true + $(ProjectDir)..\..\include;%(AdditionalIncludeDirectories) + + + Windows + true + true + true + + + + + Use + Level3 + MaxSpeed + true + true + true + NDEBUG;IMPRECWRAPPER_EXPORTS;_WINDOWS;_USRDLL;%(PreprocessorDefinitions) + true + $(ProjectDir)..\..\include;%(AdditionalIncludeDirectories) + + + Windows + true + true + true + + + + + + + + + + Create + Create + Create + Create + + + + + + \ No newline at end of file diff --git a/Plugins/src/PECompact/PECompact.vcxproj.filters b/Plugins/src/PECompact/PECompact.vcxproj.filters new file mode 100644 index 0000000..515421e --- /dev/null +++ b/Plugins/src/PECompact/PECompact.vcxproj.filters @@ -0,0 +1,33 @@ + + + + + {4FC737F1-C7A5-4376-A066-2A32D752A2FF} + cpp;c;cc;cxx;def;odl;idl;hpj;bat;asm;asmx + + + {93995380-89BD-4b04-88EB-625FBE52EBFB} + h;hh;hpp;hxx;hm;inl;inc;ipp;xsd + + + {67DA6AB6-F800-4c08-8B7A-83BB121AAD01} + rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe;resx;tiff;tif;png;wav;mfcribbon-ms + + + + + Header Files + + + Header Files + + + + + Source Files + + + Source Files + + + \ No newline at end of file diff --git a/Plugins/src/PECompact/stdafx.cpp b/Plugins/src/PECompact/stdafx.cpp new file mode 100644 index 0000000..fd4f341 --- /dev/null +++ b/Plugins/src/PECompact/stdafx.cpp @@ -0,0 +1 @@ +#include "stdafx.h" diff --git a/Plugins/src/PECompact/stdafx.h b/Plugins/src/PECompact/stdafx.h new file mode 100644 index 0000000..f380517 --- /dev/null +++ b/Plugins/src/PECompact/stdafx.h @@ -0,0 +1,16 @@ +// stdafx.h : include file for standard system include files, +// or project specific include files that are used frequently, but +// are changed infrequently +// + +#pragma once + +#include "targetver.h" + +#define WIN32_LEAN_AND_MEAN // Exclude rarely-used stuff from Windows headers +// Windows Header Files +#include + + + +// reference additional headers your program requires here diff --git a/Plugins/src/PECompact/targetver.h b/Plugins/src/PECompact/targetver.h new file mode 100644 index 0000000..87c0086 --- /dev/null +++ b/Plugins/src/PECompact/targetver.h @@ -0,0 +1,8 @@ +#pragma once + +// Including SDKDDKVer.h defines the highest available Windows platform. + +// If you wish to build your application for a previous Windows platform, include WinSDKVer.h and +// set the _WIN32_WINNT macro to the platform you wish to support before including SDKDDKVer.h. + +#include diff --git a/Plugins/src/PESpin/PESpin.vcxproj b/Plugins/src/PESpin/PESpin.vcxproj new file mode 100644 index 0000000..9a86ae7 --- /dev/null +++ b/Plugins/src/PESpin/PESpin.vcxproj @@ -0,0 +1,169 @@ + + + + + Debug + Win32 + + + Release + Win32 + + + Debug + x64 + + + Release + x64 + + + + 15.0 + {972D5174-2D85-4842-88FF-48426B23C56F} + Win32Proj + ImprecWrapper + 10.0.17763.0 + + + + DynamicLibrary + true + v141_xp + Unicode + + + DynamicLibrary + false + v141_xp + true + Unicode + + + DynamicLibrary + true + v141_xp + Unicode + + + DynamicLibrary + false + v141_xp + true + Unicode + + + + + + + + + + + + + + + + + + + + + true + + + true + + + false + + + false + + + + Use + Level3 + Disabled + true + WIN32;_DEBUG;IMPRECWRAPPER_EXPORTS;_WINDOWS;_USRDLL;%(PreprocessorDefinitions) + true + $(ProjectDir)..\..\include;%(AdditionalIncludeDirectories) + + + Windows + true + + + + + Use + Level3 + Disabled + true + _DEBUG;IMPRECWRAPPER_EXPORTS;_WINDOWS;_USRDLL;%(PreprocessorDefinitions) + true + $(ProjectDir)..\..\include;%(AdditionalIncludeDirectories) + + + Windows + true + + + + + Use + Level3 + MaxSpeed + true + true + true + WIN32;NDEBUG;IMPRECWRAPPER_EXPORTS;_WINDOWS;_USRDLL;%(PreprocessorDefinitions) + true + $(ProjectDir)..\..\include;%(AdditionalIncludeDirectories) + + + Windows + true + true + true + + + + + Use + Level3 + MaxSpeed + true + true + true + NDEBUG;IMPRECWRAPPER_EXPORTS;_WINDOWS;_USRDLL;%(PreprocessorDefinitions) + true + $(ProjectDir)..\..\include;%(AdditionalIncludeDirectories) + + + Windows + true + true + true + + + + + + + + + + Create + Create + Create + Create + + + + + + \ No newline at end of file diff --git a/Plugins/src/PESpin/PESpin.vcxproj.filters b/Plugins/src/PESpin/PESpin.vcxproj.filters new file mode 100644 index 0000000..6be47c9 --- /dev/null +++ b/Plugins/src/PESpin/PESpin.vcxproj.filters @@ -0,0 +1,33 @@ + + + + + {4FC737F1-C7A5-4376-A066-2A32D752A2FF} + cpp;c;cc;cxx;def;odl;idl;hpj;bat;asm;asmx + + + {93995380-89BD-4b04-88EB-625FBE52EBFB} + h;hh;hpp;hxx;hm;inl;inc;ipp;xsd + + + {67DA6AB6-F800-4c08-8B7A-83BB121AAD01} + rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe;resx;tiff;tif;png;wav;mfcribbon-ms + + + + + Header Files + + + Header Files + + + + + Source Files + + + Source Files + + + \ No newline at end of file diff --git a/Plugins/Sources/PESpin_x64_v1.cpp b/Plugins/src/PESpin/PESpin_x64_v1.cpp similarity index 99% rename from Plugins/Sources/PESpin_x64_v1.cpp rename to Plugins/src/PESpin/PESpin_x64_v1.cpp index bdfde65..e9d2ef0 100644 --- a/Plugins/Sources/PESpin_x64_v1.cpp +++ b/Plugins/src/PESpin/PESpin_x64_v1.cpp @@ -1,3 +1,5 @@ +#include "stdafx.h" + #include "ScyllaPlugin.h" const char logFileName[] = "logfile_scylla_plugin.txt"; @@ -486,7 +488,7 @@ BOOL writeToLogFile(const char * text) #ifdef UNICODE DllExport wchar_t * __cdecl ScyllaPluginNameW() { - return TEXT(PLUGIN_NAME); + return (wchar_t*)TEXT(PLUGIN_NAME); } #else DllExport char * __cdecl ScyllaPluginNameA() diff --git a/Plugins/src/PESpin/stdafx.cpp b/Plugins/src/PESpin/stdafx.cpp new file mode 100644 index 0000000..fd4f341 --- /dev/null +++ b/Plugins/src/PESpin/stdafx.cpp @@ -0,0 +1 @@ +#include "stdafx.h" diff --git a/Plugins/src/PESpin/stdafx.h b/Plugins/src/PESpin/stdafx.h new file mode 100644 index 0000000..f380517 --- /dev/null +++ b/Plugins/src/PESpin/stdafx.h @@ -0,0 +1,16 @@ +// stdafx.h : include file for standard system include files, +// or project specific include files that are used frequently, but +// are changed infrequently +// + +#pragma once + +#include "targetver.h" + +#define WIN32_LEAN_AND_MEAN // Exclude rarely-used stuff from Windows headers +// Windows Header Files +#include + + + +// reference additional headers your program requires here diff --git a/Plugins/src/PESpin/targetver.h b/Plugins/src/PESpin/targetver.h new file mode 100644 index 0000000..87c0086 --- /dev/null +++ b/Plugins/src/PESpin/targetver.h @@ -0,0 +1,8 @@ +#pragma once + +// Including SDKDDKVer.h defines the highest available Windows platform. + +// If you wish to build your application for a previous Windows platform, include WinSDKVer.h and +// set the _WIN32_WINNT macro to the platform you wish to support before including SDKDDKVer.h. + +#include diff --git a/README.md b/README.md index 1403e3a..bd6188a 100644 --- a/README.md +++ b/README.md @@ -17,6 +17,21 @@ But it may work with XP and Vista, too. Source code is licensed under GNU GENERAL PUBLIC LICENSE v3.0 +Building +-------- + + Prerequisite: + * Visual Studio 2017 or newer + * Windows Desktop Development components + * Windows SDK version 8.1+ + * Git for Windows + +Clone this repo and open up your `Developer Command Prompt for VS` to the code folder. + +```shell +> git submodule update --init --recursive +> msbuild Scylla +``` Known Bugs ---------- diff --git a/Scylla.sln b/Scylla.sln index 801aca6..a1386f9 100644 --- a/Scylla.sln +++ b/Scylla.sln @@ -1,17 +1,27 @@  -Microsoft Visual Studio Solution File, Format Version 11.00 -# Visual Studio 2010 +Microsoft Visual Studio Solution File, Format Version 12.00 +# Visual Studio Version 16 +VisualStudioVersion = 16.0.28315.86 +MinimumVisualStudioVersion = 10.0.40219.1 Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "Scylla", "Scylla\Scylla.vcxproj", "{710434C9-FC4B-4F1D-B318-E10ADC78499F}" ProjectSection(ProjectDependencies) = postProject {187A751B-B47D-4A95-9F24-55D3D7ABB570} = {187A751B-B47D-4A95-9F24-55D3D7ABB570} {A4B94DE4-BE0E-4E7D-95E7-7B84E6F117A1} = {A4B94DE4-BE0E-4E7D-95E7-7B84E6F117A1} EndProjectSection EndProject -Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "diStorm", "diStorm\diStorm.vcxproj", "{A4B94DE4-BE0E-4E7D-95E7-7B84E6F117A1}" +Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "libs", "libs", "{84166737-F51E-44F2-9D9D-5E8CC48CEEBE}" EndProject -Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "Solution Items", "Solution Items", "{4814523D-1988-4131-A72B-32C7881F3A32}" +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "diStorm", "libs\diStorm.vcxproj", "{A4B94DE4-BE0E-4E7D-95E7-7B84E6F117A1}" EndProject -Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "tinyxml", "tinyxml\tinyxml.vcxproj", "{187A751B-B47D-4A95-9F24-55D3D7ABB570}" +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "tinyxml", "libs\tinyxml.vcxproj", "{187A751B-B47D-4A95-9F24-55D3D7ABB570}" +EndProject +Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "plugins", "plugins", "{A9A244B4-918B-4C5C-A6E3-B93918592E4B}" +EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "ImprecWrapper", "Plugins\src\ImprecWrapper\ImprecWrapper.vcxproj", "{9E21BF66-17A6-4EC9-A8C9-1CAF895CFE9B}" +EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "PECompact", "Plugins\src\PECompact\PECompact.vcxproj", "{01F5FC2E-0917-49A4-8AF1-ACA87604C66A}" +EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "PESpin", "Plugins\src\PESpin\PESpin.vcxproj", "{972D5174-2D85-4842-88FF-48426B23C56F}" EndProject Global GlobalSection(SolutionConfigurationPlatforms) = preSolution @@ -45,8 +55,42 @@ Global {187A751B-B47D-4A95-9F24-55D3D7ABB570}.Release|Win32.Build.0 = Release|Win32 {187A751B-B47D-4A95-9F24-55D3D7ABB570}.Release|x64.ActiveCfg = Release|x64 {187A751B-B47D-4A95-9F24-55D3D7ABB570}.Release|x64.Build.0 = Release|x64 + {9E21BF66-17A6-4EC9-A8C9-1CAF895CFE9B}.Debug|Win32.ActiveCfg = Debug|Win32 + {9E21BF66-17A6-4EC9-A8C9-1CAF895CFE9B}.Debug|Win32.Build.0 = Debug|Win32 + {9E21BF66-17A6-4EC9-A8C9-1CAF895CFE9B}.Debug|x64.ActiveCfg = Debug|Win32 + {9E21BF66-17A6-4EC9-A8C9-1CAF895CFE9B}.Debug|x64.Build.0 = Debug|Win32 + {9E21BF66-17A6-4EC9-A8C9-1CAF895CFE9B}.Release|Win32.ActiveCfg = Release|Win32 + {9E21BF66-17A6-4EC9-A8C9-1CAF895CFE9B}.Release|Win32.Build.0 = Release|Win32 + {9E21BF66-17A6-4EC9-A8C9-1CAF895CFE9B}.Release|x64.ActiveCfg = Release|x64 + {9E21BF66-17A6-4EC9-A8C9-1CAF895CFE9B}.Release|x64.Build.0 = Release|x64 + {01F5FC2E-0917-49A4-8AF1-ACA87604C66A}.Debug|Win32.ActiveCfg = Debug|Win32 + {01F5FC2E-0917-49A4-8AF1-ACA87604C66A}.Debug|Win32.Build.0 = Debug|Win32 + {01F5FC2E-0917-49A4-8AF1-ACA87604C66A}.Debug|x64.ActiveCfg = Debug|x64 + {01F5FC2E-0917-49A4-8AF1-ACA87604C66A}.Debug|x64.Build.0 = Debug|x64 + {01F5FC2E-0917-49A4-8AF1-ACA87604C66A}.Release|Win32.ActiveCfg = Release|Win32 + {01F5FC2E-0917-49A4-8AF1-ACA87604C66A}.Release|Win32.Build.0 = Release|Win32 + {01F5FC2E-0917-49A4-8AF1-ACA87604C66A}.Release|x64.ActiveCfg = Release|x64 + {01F5FC2E-0917-49A4-8AF1-ACA87604C66A}.Release|x64.Build.0 = Release|x64 + {972D5174-2D85-4842-88FF-48426B23C56F}.Debug|Win32.ActiveCfg = Debug|Win32 + {972D5174-2D85-4842-88FF-48426B23C56F}.Debug|Win32.Build.0 = Debug|Win32 + {972D5174-2D85-4842-88FF-48426B23C56F}.Debug|x64.ActiveCfg = Debug|x64 + {972D5174-2D85-4842-88FF-48426B23C56F}.Debug|x64.Build.0 = Debug|x64 + {972D5174-2D85-4842-88FF-48426B23C56F}.Release|Win32.ActiveCfg = Release|Win32 + {972D5174-2D85-4842-88FF-48426B23C56F}.Release|Win32.Build.0 = Release|Win32 + {972D5174-2D85-4842-88FF-48426B23C56F}.Release|x64.ActiveCfg = Release|x64 + {972D5174-2D85-4842-88FF-48426B23C56F}.Release|x64.Build.0 = Release|x64 EndGlobalSection GlobalSection(SolutionProperties) = preSolution HideSolutionNode = FALSE EndGlobalSection + GlobalSection(NestedProjects) = preSolution + {A4B94DE4-BE0E-4E7D-95E7-7B84E6F117A1} = {84166737-F51E-44F2-9D9D-5E8CC48CEEBE} + {187A751B-B47D-4A95-9F24-55D3D7ABB570} = {84166737-F51E-44F2-9D9D-5E8CC48CEEBE} + {9E21BF66-17A6-4EC9-A8C9-1CAF895CFE9B} = {A9A244B4-918B-4C5C-A6E3-B93918592E4B} + {01F5FC2E-0917-49A4-8AF1-ACA87604C66A} = {A9A244B4-918B-4C5C-A6E3-B93918592E4B} + {972D5174-2D85-4842-88FF-48426B23C56F} = {A9A244B4-918B-4C5C-A6E3-B93918592E4B} + EndGlobalSection + GlobalSection(ExtensibilityGlobals) = postSolution + SolutionGuid = {D8C3EC6B-083F-4C08-A4A0-693F3D7542A6} + EndGlobalSection EndGlobal diff --git a/Scylla/ApiReader.cpp b/Scylla/ApiReader.cpp index ed2b764..5786103 100644 --- a/Scylla/ApiReader.cpp +++ b/Scylla/ApiReader.cpp @@ -7,7 +7,7 @@ #include "StringConversion.h" #include "PeParser.h" -stdext::hash_multimap ApiReader::apiList; //api look up table +std::unordered_map ApiReader::apiList; //api look up table std::map * ApiReader::moduleThunkList; //store found apis DWORD_PTR ApiReader::minApiAddress = (DWORD_PTR)-1; @@ -679,7 +679,7 @@ bool ApiReader::isApiAddressValid(DWORD_PTR virtualAddress) ApiInfo * ApiReader::getApiByVirtualAddress(DWORD_PTR virtualAddress, bool * isSuspect) { - stdext::hash_multimap::iterator it1, it2; + std::unordered_map::iterator it1, it2; size_t c = 0; size_t countDuplicates = apiList.count(virtualAddress); int countHighPriority = 0; @@ -762,7 +762,7 @@ ApiInfo * ApiReader::getApiByVirtualAddress(DWORD_PTR virtualAddress, bool * isS return (ApiInfo *) 1; } -ApiInfo * ApiReader::getScoredApi(stdext::hash_multimap::iterator it1,size_t countDuplicates, bool hasName, bool hasUnicodeAnsiName, bool hasNoUnderlineInName, bool hasPrioDll,bool hasPrio0Dll,bool hasPrio1Dll, bool hasPrio2Dll, bool firstWin ) +ApiInfo * ApiReader::getScoredApi(std::unordered_map::iterator it1,size_t countDuplicates, bool hasName, bool hasUnicodeAnsiName, bool hasNoUnderlineInName, bool hasPrioDll,bool hasPrio0Dll,bool hasPrio1Dll, bool hasPrio2Dll, bool firstWin ) { ApiInfo * foundApi = 0; ApiInfo * foundMatchingApi = 0; @@ -1096,7 +1096,7 @@ void ApiReader::clearAll() minApiAddress = (DWORD_PTR)-1; maxApiAddress = 0; - for ( stdext::hash_map::iterator it = apiList.begin(); it != apiList.end(); ++it ) + for ( std::unordered_map::iterator it = apiList.begin(); it != apiList.end(); ++it ) { delete it->second; } diff --git a/Scylla/ApiReader.h b/Scylla/ApiReader.h index 5ebab30..6941f63 100644 --- a/Scylla/ApiReader.h +++ b/Scylla/ApiReader.h @@ -2,7 +2,8 @@ #include #include -#include +#include + #include "ProcessAccessHelp.h" #include "Thunks.h" @@ -11,7 +12,7 @@ typedef std::pair API_Pair; class ApiReader : public ProcessAccessHelp { public: - static stdext::hash_multimap apiList; //api look up table + static std::unordered_map apiList; //api look up table static std::map * moduleThunkList; //store found apis @@ -70,6 +71,6 @@ class ApiReader : public ProcessAccessHelp bool isApiBlacklisted( const char * functionName ); bool isWinSxSModule( ModuleInfo * module ); - ApiInfo * getScoredApi(stdext::hash_map::iterator it1,size_t countDuplicates, bool hasName, bool hasUnicodeAnsiName, bool hasNoUnderlineInName, bool hasPrioDll,bool hasPrio0Dll,bool hasPrio1Dll, bool hasPrio2Dll, bool firstWin ); + ApiInfo * getScoredApi(std::unordered_map::iterator it1,size_t countDuplicates, bool hasName, bool hasUnicodeAnsiName, bool hasNoUnderlineInName, bool hasPrioDll,bool hasPrio0Dll,bool hasPrio1Dll, bool hasPrio2Dll, bool firstWin ); }; diff --git a/Scylla/DisassemblerGui.cpp b/Scylla/DisassemblerGui.cpp index 1365699..f7b6110 100644 --- a/Scylla/DisassemblerGui.cpp +++ b/Scylla/DisassemblerGui.cpp @@ -1,8 +1,11 @@ -#include "DisassemblerGui.h" #include + +#include "DisassemblerGui.h" #include "ProcessAccessHelp.h" #include "Architecture.h" + #include + #pragma comment(lib, "Psapi.lib") DisassemblerGui::DisassemblerGui(DWORD_PTR startAddress, ApiReader * apiReaderObject) @@ -353,29 +356,29 @@ bool DisassemblerGui::getDisassemblyComment(unsigned int index) #ifdef _WIN64 addressTemp = (DWORD_PTR)INSTRUCTION_GET_RIP_TARGET(&ProcessAccessHelp::decomposerResult[index]); - swprintf_s(tempBuffer,L"-> "PRINTF_DWORD_PTR_FULL,addressTemp); + swprintf_s(tempBuffer,L"-> ",PRINTF_DWORD_PTR_FULL,addressTemp); if(ProcessAccessHelp::readMemoryFromProcess(addressTemp, sizeof(DWORD_PTR), &address)) { - swprintf_s(tempBuffer,L"%s -> "PRINTF_DWORD_PTR_FULL,tempBuffer,address); + swprintf_s(tempBuffer,L"%s -> ",PRINTF_DWORD_PTR_FULL,tempBuffer,address); } #endif } else if (ProcessAccessHelp::decomposerResult[index].ops[0].type == O_PC) { address = (DWORD_PTR)INSTRUCTION_GET_TARGET(&ProcessAccessHelp::decomposerResult[index]); - swprintf_s(tempBuffer,L"-> "PRINTF_DWORD_PTR_FULL,address); + swprintf_s(tempBuffer, L"-> ", PRINTF_DWORD_PTR_FULL, address); } else if (ProcessAccessHelp::decomposerResult[index].ops[0].type == O_DISP) { addressTemp = (DWORD_PTR)ProcessAccessHelp::decomposerResult[index].disp; - swprintf_s(tempBuffer,L"-> "PRINTF_DWORD_PTR_FULL,addressTemp); + swprintf_s(tempBuffer, L"-> ", PRINTF_DWORD_PTR_FULL, addressTemp); address = 0; if(ProcessAccessHelp::readMemoryFromProcess(addressTemp, sizeof(DWORD_PTR), &address)) { - swprintf_s(tempBuffer,L"%s -> "PRINTF_DWORD_PTR_FULL,tempBuffer,address); + swprintf_s(tempBuffer, L"%s -> ", PRINTF_DWORD_PTR_FULL, tempBuffer,address); } } } diff --git a/Scylla/ImportsHandling.cpp b/Scylla/ImportsHandling.cpp index 0251fcf..6858756 100644 --- a/Scylla/ImportsHandling.cpp +++ b/Scylla/ImportsHandling.cpp @@ -85,7 +85,7 @@ bool ImportsHandling::isImport(CTreeItem item) ImportModuleThunk * ImportsHandling::getModuleThunk(CTreeItem item) { - stdext::hash_map::const_iterator it; + std::unordered_map::const_iterator it; it = itemData.find(item); if(it != itemData.end()) { @@ -100,7 +100,7 @@ ImportModuleThunk * ImportsHandling::getModuleThunk(CTreeItem item) ImportThunk * ImportsHandling::getImportThunk(CTreeItem item) { - stdext::hash_map::const_iterator it; + std::unordered_map::const_iterator it; TreeItemData * data = getItemData(item); if(data && !data->isModule) { @@ -116,7 +116,7 @@ void ImportsHandling::setItemData(CTreeItem item, const TreeItemData * data) ImportsHandling::TreeItemData * ImportsHandling::getItemData(CTreeItem item) { - stdext::hash_map::iterator it; + std::unordered_map::iterator it; it = itemData.find(item); if(it != itemData.end()) { diff --git a/Scylla/ImportsHandling.h b/Scylla/ImportsHandling.h index d1fd9e0..96fbfd4 100644 --- a/Scylla/ImportsHandling.h +++ b/Scylla/ImportsHandling.h @@ -1,7 +1,7 @@ #pragma once #include -#include +#include // WTL #include @@ -66,7 +66,7 @@ class ImportsHandling }; }; - stdext::hash_map itemData; + std::unordered_map itemData; void setItemData(CTreeItem item, const TreeItemData * data); TreeItemData * getItemData(CTreeItem item); diff --git a/Scylla/Scylla.vcxproj b/Scylla/Scylla.vcxproj index f8f32da..b03706e 100644 --- a/Scylla/Scylla.vcxproj +++ b/Scylla/Scylla.vcxproj @@ -22,31 +22,34 @@ {710434C9-FC4B-4F1D-B318-E10ADC78499F} Win32Proj Scylla + 7.0 Application true Unicode - v90 + v141_xp Application true Unicode + v141_xp Application false true Unicode - v90 + v141_xp Application false true Unicode + v141_xp @@ -91,7 +94,7 @@ Level3 Disabled WIN32;_DEBUG;_WINDOWS;%(PreprocessorDefinitions) - $(SolutionDir)tinyxml;$(SolutionDir)diStorm\include;%(AdditionalIncludeDirectories) + $(SolutionDir)libs\wtl\Include;$(SolutionDir)libs\tinyxml;$(SolutionDir)libs\distorm\include;%(AdditionalIncludeDirectories) Windows @@ -103,6 +106,9 @@ + + $(SolutionDir)libs\wtl\Include;%(AdditionalIncludeDirectories) + @@ -111,7 +117,7 @@ Level3 Disabled WIN32;_DEBUG;_WINDOWS;%(PreprocessorDefinitions) - $(SolutionDir)tinyxml;$(SolutionDir)diStorm\include;%(AdditionalIncludeDirectories) + $(SolutionDir)libs\wtl\Include;$(SolutionDir)libs\tinyxml;$(SolutionDir)libs\distorm\include;%(AdditionalIncludeDirectories) Windows @@ -119,6 +125,9 @@ $(SolutionDir)$(Platform)\$(Configuration)\diStorm.lib;$(SolutionDir)$(Platform)\$(Configuration)\tinyxml.lib;%(AdditionalDependencies) type='win32' name='Microsoft.Windows.Common-Controls' version='6.0.0.0' processorArchitecture='*' publicKeyToken='6595b64144ccf1df' + + $(SolutionDir)libs\wtl\Include;%(AdditionalIncludeDirectories) + @@ -130,7 +139,7 @@ true WIN32;NDEBUG;_WINDOWS;%(PreprocessorDefinitions) MultiThreaded - $(SolutionDir)tinyxml;$(SolutionDir)diStorm\include;%(AdditionalIncludeDirectories) + $(SolutionDir)libs\wtl\Include;$(SolutionDir)libs\tinyxml;$(SolutionDir)libs\distorm\include;%(AdditionalIncludeDirectories) true Speed @@ -147,6 +156,9 @@ true + + $(SolutionDir)libs\wtl\Include;%(AdditionalIncludeDirectories) + @@ -158,7 +170,7 @@ true WIN32;NDEBUG;_WINDOWS;%(PreprocessorDefinitions) MultiThreaded - $(SolutionDir)tinyxml;$(SolutionDir)diStorm\include;%(AdditionalIncludeDirectories) + $(SolutionDir)libs\wtl\Include;$(SolutionDir)libs\tinyxml;$(SolutionDir)libs\distorm\include;%(AdditionalIncludeDirectories) true @@ -174,6 +186,9 @@ true + + $(SolutionDir)libs\wtl\Include;%(AdditionalIncludeDirectories) + @@ -255,6 +270,14 @@ + + + {a4b94de4-be0e-4e7d-95e7-7b84e6f117a1} + + + {187a751b-b47d-4a95-9f24-55d3d7abb570} + + diff --git a/Scylla/TreeImportExport.cpp b/Scylla/TreeImportExport.cpp index 8ed4b78..472d6e8 100644 --- a/Scylla/TreeImportExport.cpp +++ b/Scylla/TreeImportExport.cpp @@ -42,7 +42,7 @@ bool TreeImportExport::importTreeList(std::map & m TiXmlElement * targetElement = doc.FirstChildElement(); if (!targetElement) { - Sylla::windowLog.log(L"Load Tree :: Error getting first child element in xml %S\r\n", doc.Value()); + Scylla::windowLog.log(L"Load Tree :: Error getting first child element in xml %S\r\n", doc.Value()); return false; } diff --git a/WTL/README b/WTL/README deleted file mode 100644 index d3dedcd..0000000 --- a/WTL/README +++ /dev/null @@ -1,2 +0,0 @@ -Download WTL from here: https://sourceforge.net/projects/wtl/ -Extract the contents of the ZIP in this directory. \ No newline at end of file diff --git a/diStorm/README b/diStorm/README deleted file mode 100644 index ce11a83..0000000 --- a/diStorm/README +++ /dev/null @@ -1,4 +0,0 @@ -Get diStorm source (distorm3-x.x.zip) from -http://www.ragestorm.net/distorm/ -and unzip the content of the distorm3-x.x folder -it into this directory. diff --git a/diStorm/diStorm.vcxproj.filters b/diStorm/diStorm.vcxproj.filters deleted file mode 100644 index 477bfd9..0000000 --- a/diStorm/diStorm.vcxproj.filters +++ /dev/null @@ -1,84 +0,0 @@ - - - - - {4FC737F1-C7A5-4376-A066-2A32D752A2FF} - cpp;c;cc;cxx;def;odl;idl;hpj;bat;asm;asmx - - - {93995380-89BD-4b04-88EB-625FBE52EBFB} - h;hpp;hxx;hm;inl;inc;xsd - - - {67DA6AB6-F800-4c08-8B7A-83BB121AAD01} - rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe;resx;tiff;tif;png;wav - - - - - Source Files - - - Source Files - - - Source Files - - - Source Files - - - Source Files - - - Source Files - - - Source Files - - - Source Files - - - Source Files - - - Source Files - - - - - Header Files - - - Header Files - - - Header Files - - - Header Files - - - Header Files - - - Header Files - - - Header Files - - - Header Files - - - Header Files - - - Header Files - - - Header Files - - - \ No newline at end of file diff --git a/diStorm/diStorm.vcxproj.user b/diStorm/diStorm.vcxproj.user deleted file mode 100644 index ace9a86..0000000 --- a/diStorm/diStorm.vcxproj.user +++ /dev/null @@ -1,3 +0,0 @@ - - - \ No newline at end of file diff --git a/diStorm/include/distorm.h b/diStorm/include/distorm.h deleted file mode 100644 index 2ab431f..0000000 --- a/diStorm/include/distorm.h +++ /dev/null @@ -1,498 +0,0 @@ -/* diStorm3 3.3 */ - -/* -distorm.h - -diStorm3 - Powerful disassembler for X86/AMD64 -http://ragestorm.net/distorm/ -distorm at gmail dot com -Copyright (C) 2003-2012 Gil Dabah - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see -*/ - - -#ifndef DISTORM_H -#define DISTORM_H - -/* - * 64 bit offsets support: - * If the diStorm library you use was compiled with 64 bits offsets, - * make sure you compile your own code with the following macro set: - * SUPPORT_64BIT_OFFSET - * Otherwise comment it out, or you will get a linker error of an unresolved symbol... - * Turned on by default! - */ - -#if !(defined(DISTORM_STATIC) || defined(DISTORM_DYNAMIC)) - /* Define this macro for outer projects by default. */ - #define SUPPORT_64BIT_OFFSET -#endif - -/* TINYC has a problem with some 64bits library functions, so ignore 64 bit offsets. */ -#ifdef __TINYC__ - #undef SUPPORT_64BIT_OFFSET -#endif - -/* If your compiler doesn't support stdint.h, define your own 64 bits type. */ -#ifdef SUPPORT_64BIT_OFFSET - #ifdef _MSC_VER - #define OFFSET_INTEGER unsigned __int64 - #else - #include - #define OFFSET_INTEGER uint64_t - #endif -#else - /* 32 bit offsets are used. */ - #define OFFSET_INTEGER unsigned long -#endif - -#ifdef _MSC_VER -/* Since MSVC isn't shipped with stdint.h, we will have our own: */ -typedef signed __int64 int64_t; -typedef unsigned __int64 uint64_t; -typedef signed __int32 int32_t; -typedef unsigned __int32 uint32_t; -typedef signed __int16 int16_t; -typedef unsigned __int16 uint16_t; -typedef signed __int8 int8_t; -typedef unsigned __int8 uint8_t; -#endif - -/* Support C++ compilers */ -#ifdef __cplusplus - extern "C" { -#endif - - -/* *** Helper Macros *** */ - -/* Get the ISC of the instruction, used with the definitions below. */ -#define META_GET_ISC(meta) (((meta) >> 3) & 0x1f) -#define META_SET_ISC(di, isc) (((di)->meta) |= ((isc) << 3)) -/* Get the flow control flags of the instruction, see 'features for decompose' below. */ -#define META_GET_FC(meta) ((meta) & 0x7) - -/* Get the target address of a branching instruction. O_PC operand type. */ -#define INSTRUCTION_GET_TARGET(di) ((_OffsetType)(((di)->addr + (di)->imm.addr + (di)->size))) -/* Get the target address of a RIP-relative memory indirection. */ -#define INSTRUCTION_GET_RIP_TARGET(di) ((_OffsetType)(((di)->addr + (di)->disp + (di)->size))) - -/* - * Operand Size or Adderss size are stored inside the flags: - * 00 - 16 bits - * 01 - 32 bits - * 10 - 64 bits - * 11 - reserved - * - * If you call these set-macros more than once, you will have to clean the bits before doing so. - */ -#define FLAG_SET_OPSIZE(di, size) ((di->flags) |= (((size) & 3) << 8)) -#define FLAG_SET_ADDRSIZE(di, size) ((di->flags) |= (((size) & 3) << 10)) -#define FLAG_GET_OPSIZE(flags) (((flags) >> 8) & 3) -#define FLAG_GET_ADDRSIZE(flags) (((flags) >> 10) & 3) -/* To get the LOCK/REPNZ/REP prefixes. */ -#define FLAG_GET_PREFIX(flags) ((flags) & 7) -/* Indicates whether the instruction is privileged. */ -#define FLAG_GET_PRIVILEGED(flags) (((flags) & FLAG_PRIVILEGED_INSTRUCTION) != 0) - -/* - * Macros to extract segment registers from 'segment': - */ -#define SEGMENT_DEFAULT 0x80 -#define SEGMENT_SET(di, seg) ((di->segment) |= seg) -#define SEGMENT_GET(segment) (((segment) == R_NONE) ? R_NONE : ((segment) & 0x7f)) -#define SEGMENT_IS_DEFAULT(segment) (((segment) & SEGMENT_DEFAULT) == SEGMENT_DEFAULT) - - -/* Decodes modes of the disassembler, 16 bits or 32 bits or 64 bits for AMD64, x86-64. */ -typedef enum { Decode16Bits = 0, Decode32Bits = 1, Decode64Bits = 2 } _DecodeType; - -typedef OFFSET_INTEGER _OffsetType; - -typedef struct { - _OffsetType codeOffset, nextOffset; /* nextOffset is OUT only. */ - const uint8_t* code; - int codeLen; /* Using signed integer makes it easier to detect an underflow. */ - _DecodeType dt; - unsigned int features; -} _CodeInfo; - -typedef enum { O_NONE, O_REG, O_IMM, O_IMM1, O_IMM2, O_DISP, O_SMEM, O_MEM, O_PC, O_PTR } _OperandType; - -typedef union { - /* Used by O_IMM: */ - int8_t sbyte; - uint8_t byte; - int16_t sword; - uint16_t word; - int32_t sdword; - uint32_t dword; - int64_t sqword; /* All immediates are SIGN-EXTENDED to 64 bits! */ - uint64_t qword; - - /* Used by O_PC: (Use GET_TARGET_ADDR).*/ - _OffsetType addr; /* It's a relative offset as for now. */ - - /* Used by O_PTR: */ - struct { - uint16_t seg; - /* Can be 16 or 32 bits, size is in ops[n].size. */ - uint32_t off; - } ptr; - - /* Used by O_IMM1 (i1) and O_IMM2 (i2). ENTER instruction only. */ - struct { - uint32_t i1; - uint32_t i2; - } ex; -} _Value; - -typedef struct { - /* Type of operand: - O_NONE: operand is to be ignored. - O_REG: index holds global register index. - O_IMM: instruction.imm. - O_IMM1: instruction.imm.ex.i1. - O_IMM2: instruction.imm.ex.i2. - O_DISP: memory dereference with displacement only, instruction.disp. - O_SMEM: simple memory dereference with optional displacement (a single register memory dereference). - O_MEM: complex memory dereference (optional fields: s/i/b/disp). - O_PC: the relative address of a branch instruction (instruction.imm.addr). - O_PTR: the absolute target address of a far branch instruction (instruction.imm.ptr.seg/off). - */ - uint8_t type; /* _OperandType */ - - /* Index of: - O_REG: holds global register index - O_SMEM: holds the 'base' register. E.G: [ECX], [EBX+0x1234] are both in operand.index. - O_MEM: holds the 'index' register. E.G: [EAX*4] is in operand.index. - */ - uint8_t index; - - /* Size in bits of: - O_REG: register - O_IMM: instruction.imm - O_IMM1: instruction.imm.ex.i1 - O_IMM2: instruction.imm.ex.i2 - O_DISP: instruction.disp - O_SMEM: size of indirection. - O_MEM: size of indirection. - O_PC: size of the relative offset - O_PTR: size of instruction.imm.ptr.off (16 or 32) - */ - uint16_t size; -} _Operand; - -#define OPCODE_ID_NONE 0 -/* Instruction could not be disassembled. */ -#define FLAG_NOT_DECODABLE ((uint16_t)-1) -/* The instruction locks memory access. */ -#define FLAG_LOCK (1 << 0) -/* The instruction is prefixed with a REPNZ. */ -#define FLAG_REPNZ (1 << 1) -/* The instruction is prefixed with a REP, this can be a REPZ, it depends on the specific instruction. */ -#define FLAG_REP (1 << 2) -/* Indicates there is a hint taken for Jcc instructions only. */ -#define FLAG_HINT_TAKEN (1 << 3) -/* Indicates there is a hint non-taken for Jcc instructions only. */ -#define FLAG_HINT_NOT_TAKEN (1 << 4) -/* The Imm value is signed extended (E.G in 64 bit decoding mode, a 32 bit imm is usually sign extended into 64 bit imm). */ -#define FLAG_IMM_SIGNED (1 << 5) -/* The destination operand is writable. */ -#define FLAG_DST_WR (1 << 6) -/* The instruction uses RIP-relative indirection. */ -#define FLAG_RIP_RELATIVE (1 << 7) - -/* See flag FLAG_GET_XXX macros above. */ - -/* The instruction is privileged and can only be used from Ring0. */ -#define FLAG_PRIVILEGED_INSTRUCTION (1 << 15) - -/* No register was defined. */ -#define R_NONE ((uint8_t)-1) - -#define REGS64_BASE 0 -#define REGS32_BASE 16 -#define REGS16_BASE 32 -#define REGS8_BASE 48 -#define REGS8_REX_BASE 64 -#define SREGS_BASE 68 -#define FPUREGS_BASE 75 -#define MMXREGS_BASE 83 -#define SSEREGS_BASE 91 -#define AVXREGS_BASE 107 -#define CREGS_BASE 123 -#define DREGS_BASE 132 - -#define OPERANDS_NO (4) - -typedef struct { - /* Used by ops[n].type == O_IMM/O_IMM1&O_IMM2/O_PTR/O_PC. Its size is ops[n].size. */ - _Value imm; - /* Used by ops[n].type == O_SMEM/O_MEM/O_DISP. Its size is dispSize. */ - uint64_t disp; - /* Virtual address of first byte of instruction. */ - _OffsetType addr; - /* General flags of instruction, holds prefixes and more, if FLAG_NOT_DECODABLE, instruction is invalid. */ - uint16_t flags; - /* Unused prefixes mask, for each bit that is set that prefix is not used (LSB is byte [addr + 0]). */ - uint16_t unusedPrefixesMask; - /* Mask of registers that were used in the operands, only used for quick look up, in order to know *some* operand uses that register class. */ - uint32_t usedRegistersMask; - /* ID of opcode in the global opcode table. Use for mnemonic look up. */ - uint16_t opcode; - /* Up to four operands per instruction, ignored if ops[n].type == O_NONE. */ - _Operand ops[OPERANDS_NO]; - /* Size of the whole instruction in bytes. */ - uint8_t size; - /* Segment information of memory indirection, default segment, or overriden one, can be -1. Use SEGMENT macros. */ - uint8_t segment; - /* Used by ops[n].type == O_MEM. Base global register index (might be R_NONE), scale size (2/4/8), ignored for 0 or 1. */ - uint8_t base, scale; - uint8_t dispSize; - /* Meta defines the instruction set class, and the flow control flags. Use META macros. */ - uint8_t meta; - /* The CPU flags that the instruction operates upon. */ - uint16_t modifiedFlagsMask, testedFlagsMask, undefinedFlagsMask; -} _DInst; - -#ifndef DISTORM_LIGHT - -/* Static size of strings. Do not change this value. Keep Python wrapper in sync. */ -#define MAX_TEXT_SIZE (48) -typedef struct { - unsigned int length; - unsigned char p[MAX_TEXT_SIZE]; /* p is a null terminated string. */ -} _WString; - -/* - * Old decoded instruction structure in text format. - * Used only for backward compatibility with diStorm64. - * This structure holds all information the disassembler generates per instruction. - */ -typedef struct { - _WString mnemonic; /* Mnemonic of decoded instruction, prefixed if required by REP, LOCK etc. */ - _WString operands; /* Operands of the decoded instruction, up to 3 operands, comma-seperated. */ - _WString instructionHex; /* Hex dump - little endian, including prefixes. */ - unsigned int size; /* Size of decoded instruction in bytes. */ - _OffsetType offset; /* Start offset of the decoded instruction. */ -} _DecodedInst; - -#endif /* DISTORM_LIGHT */ - -/* Register masks for quick look up, each mask indicates one of a register-class that is being used in some operand. */ -#define RM_AX 1 /* AL, AH, AX, EAX, RAX */ -#define RM_CX 2 /* CL, CH, CX, ECX, RCX */ -#define RM_DX 4 /* DL, DH, DX, EDX, RDX */ -#define RM_BX 8 /* BL, BH, BX, EBX, RBX */ -#define RM_SP 0x10 /* SPL, SP, ESP, RSP */ -#define RM_BP 0x20 /* BPL, BP, EBP, RBP */ -#define RM_SI 0x40 /* SIL, SI, ESI, RSI */ -#define RM_DI 0x80 /* DIL, DI, EDI, RDI */ -#define RM_FPU 0x100 /* ST(0) - ST(7) */ -#define RM_MMX 0x200 /* MM0 - MM7 */ -#define RM_SSE 0x400 /* XMM0 - XMM15 */ -#define RM_AVX 0x800 /* YMM0 - YMM15 */ -#define RM_CR 0x1000 /* CR0, CR2, CR3, CR4, CR8 */ -#define RM_DR 0x2000 /* DR0, DR1, DR2, DR3, DR6, DR7 */ -#define RM_R8 0x4000 /* R8B, R8W, R8D, R8 */ -#define RM_R9 0x8000 /* R9B, R9W, R9D, R9 */ -#define RM_R10 0x10000 /* R10B, R10W, R10D, R10 */ -#define RM_R11 0x20000 /* R11B, R11W, R11D, R11 */ -#define RM_R12 0x40000 /* R12B, R12W, R12D, R12 */ -#define RM_R13 0x80000 /* R13B, R13W, R13D, R13 */ -#define RM_R14 0x100000 /* R14B, R14W, R14D, R14 */ -#define RM_R15 0x200000 /* R15B, R15W, R15D, R15 */ - -/* RIP should be checked using the 'flags' field and FLAG_RIP_RELATIVE. - * Segments should be checked using the segment macros. - * For now R8 - R15 are not supported and non general purpose registers map into same RM. - */ - -/* CPU flags that instructions modify, test or undefine (are EFLAGS compatible!). */ -#define D_CF 1 /* Carry */ -#define D_PF 4 /* Parity */ -#define D_AF 0x10 /* Auxiliary */ -#define D_ZF 0x40 /* Zero */ -#define D_SF 0x80 /* Sign */ -#define D_IF 0x200 /* Interrupt */ -#define D_DF 0x400 /* Direction */ -#define D_OF 0x800 /* Overflow */ - -/* - * Instructions Set classes: - * if you want a better understanding of the available classes, look at disOps project, file: x86sets.py. - */ -/* Indicates the instruction belongs to the General Integer set. */ -#define ISC_INTEGER 1 -/* Indicates the instruction belongs to the 387 FPU set. */ -#define ISC_FPU 2 -/* Indicates the instruction belongs to the P6 set. */ -#define ISC_P6 3 -/* Indicates the instruction belongs to the MMX set. */ -#define ISC_MMX 4 -/* Indicates the instruction belongs to the SSE set. */ -#define ISC_SSE 5 -/* Indicates the instruction belongs to the SSE2 set. */ -#define ISC_SSE2 6 -/* Indicates the instruction belongs to the SSE3 set. */ -#define ISC_SSE3 7 -/* Indicates the instruction belongs to the SSSE3 set. */ -#define ISC_SSSE3 8 -/* Indicates the instruction belongs to the SSE4.1 set. */ -#define ISC_SSE4_1 9 -/* Indicates the instruction belongs to the SSE4.2 set. */ -#define ISC_SSE4_2 10 -/* Indicates the instruction belongs to the AMD's SSE4.A set. */ -#define ISC_SSE4_A 11 -/* Indicates the instruction belongs to the 3DNow! set. */ -#define ISC_3DNOW 12 -/* Indicates the instruction belongs to the 3DNow! Extensions set. */ -#define ISC_3DNOWEXT 13 -/* Indicates the instruction belongs to the VMX (Intel) set. */ -#define ISC_VMX 14 -/* Indicates the instruction belongs to the SVM (AMD) set. */ -#define ISC_SVM 15 -/* Indicates the instruction belongs to the AVX (Intel) set. */ -#define ISC_AVX 16 -/* Indicates the instruction belongs to the FMA (Intel) set. */ -#define ISC_FMA 17 -/* Indicates the instruction belongs to the AES/AVX (Intel) set. */ -#define ISC_AES 18 -/* Indicates the instruction belongs to the CLMUL (Intel) set. */ -#define ISC_CLMUL 19 - -/* Features for decompose: */ -#define DF_NONE 0 -/* The decoder will limit addresses to a maximum of 16 bits. */ -#define DF_MAXIMUM_ADDR16 1 -/* The decoder will limit addresses to a maximum of 32 bits. */ -#define DF_MAXIMUM_ADDR32 2 -/* The decoder will return only flow control instructions (and filter the others internally). */ -#define DF_RETURN_FC_ONLY 4 -/* The decoder will stop and return to the caller when the instruction 'CALL' (near and far) was decoded. */ -#define DF_STOP_ON_CALL 8 -/* The decoder will stop and return to the caller when the instruction 'RET' (near and far) was decoded. */ -#define DF_STOP_ON_RET 0x10 -/* The decoder will stop and return to the caller when the instruction system-call/ret was decoded. */ -#define DF_STOP_ON_SYS 0x20 -/* The decoder will stop and return to the caller when any of the branch 'JMP', (near and far) instructions were decoded. */ -#define DF_STOP_ON_UNC_BRANCH 0x40 -/* The decoder will stop and return to the caller when any of the conditional branch instruction were decoded. */ -#define DF_STOP_ON_CND_BRANCH 0x80 -/* The decoder will stop and return to the caller when the instruction 'INT' (INT, INT1, INTO, INT 3) was decoded. */ -#define DF_STOP_ON_INT 0x100 -/* The decoder will stop and return to the caller when any of the 'CMOVxx' instruction was decoded. */ -#define DF_STOP_ON_CMOV 0x200 -/* The decoder will stop and return to the caller when any flow control instruction was decoded. */ -#define DF_STOP_ON_FLOW_CONTROL (DF_STOP_ON_CALL | DF_STOP_ON_RET | DF_STOP_ON_SYS | DF_STOP_ON_UNC_BRANCH | DF_STOP_ON_CND_BRANCH | DF_STOP_ON_INT | DF_STOP_ON_CMOV) - -/* Indicates the instruction is not a flow-control instruction. */ -#define FC_NONE 0 -/* Indicates the instruction is one of: CALL, CALL FAR. */ -#define FC_CALL 1 -/* Indicates the instruction is one of: RET, IRET, RETF. */ -#define FC_RET 2 -/* Indicates the instruction is one of: SYSCALL, SYSRET, SYSENTER, SYSEXIT. */ -#define FC_SYS 3 -/* Indicates the instruction is one of: JMP, JMP FAR. */ -#define FC_UNC_BRANCH 4 -/* - * Indicates the instruction is one of: - * JCXZ, JO, JNO, JB, JAE, JZ, JNZ, JBE, JA, JS, JNS, JP, JNP, JL, JGE, JLE, JG, LOOP, LOOPZ, LOOPNZ. - */ -#define FC_CND_BRANCH 5 -/* Indiciates the instruction is one of: INT, INT1, INT 3, INTO, UD2. */ -#define FC_INT 6 -/* Indicates the instruction is one of: CMOVxx. */ -#define FC_CMOV 7 - -/* Return code of the decoding function. */ -typedef enum { DECRES_NONE, DECRES_SUCCESS, DECRES_MEMORYERR, DECRES_INPUTERR, DECRES_FILTERED } _DecodeResult; - -/* Define the following interface functions only for outer projects. */ -#if !(defined(DISTORM_STATIC) || defined(DISTORM_DYNAMIC)) - -/* distorm_decode - * Input: - * offset - Origin of the given code (virtual address that is), NOT an offset in code. - * code - Pointer to the code buffer to be disassembled. - * length - Amount of bytes that should be decoded from the code buffer. - * dt - Decoding mode, 16 bits (Decode16Bits), 32 bits (Decode32Bits) or AMD64 (Decode64Bits). - * result - Array of type _DecodeInst which will be used by this function in order to return the disassembled instructions. - * maxInstructions - The maximum number of entries in the result array that you pass to this function, so it won't exceed its bound. - * usedInstructionsCount - Number of the instruction that successfully were disassembled and written to the result array. - * Output: usedInstructionsCount will hold the number of entries used in the result array - * and the result array itself will be filled with the disassembled instructions. - * Return: DECRES_SUCCESS on success (no more to disassemble), DECRES_INPUTERR on input error (null code buffer, invalid decoding mode, etc...), - * DECRES_MEMORYERR when there are not enough entries to use in the result array, BUT YOU STILL have to check for usedInstructionsCount! - * Side-Effects: Even if the return code is DECRES_MEMORYERR, there might STILL be data in the - * array you passed, this function will try to use as much entries as possible! - * Notes: 1)The minimal size of maxInstructions is 15. - * 2)You will have to synchronize the offset,code and length by yourself if you pass code fragments and not a complete code block! - */ - -/* distorm_decompose - * There is lots of documentation about diStorm at https://code.google.com/p/distorm/wiki - * - * Please read https://code.google.com/p/distorm/wiki/DecomposeInterface - * - * And also see https://code.google.com/p/distorm/wiki/TipsnTricks - * - */ -#ifdef SUPPORT_64BIT_OFFSET - - _DecodeResult distorm_decompose64(_CodeInfo* ci, _DInst result[], unsigned int maxInstructions, unsigned int* usedInstructionsCount); - #define distorm_decompose distorm_decompose64 - -#ifndef DISTORM_LIGHT - /* If distorm-light is defined, we won't export these text-formatting functionality. */ - _DecodeResult distorm_decode64(_OffsetType codeOffset, const unsigned char* code, int codeLen, _DecodeType dt, _DecodedInst result[], unsigned int maxInstructions, unsigned int* usedInstructionsCount); - void distorm_format64(const _CodeInfo* ci, const _DInst* di, _DecodedInst* result); - #define distorm_decode distorm_decode64 - #define distorm_format distorm_format64 -#endif /*DISTORM_LIGHT*/ - -#else /*SUPPORT_64BIT_OFFSET*/ - - _DecodeResult distorm_decompose32(_CodeInfo* ci, _DInst result[], unsigned int maxInstructions, unsigned int* usedInstructionsCount); - #define distorm_decompose distorm_decompose32 - -#ifndef DISTORM_LIGHT - /* If distorm-light is defined, we won't export these text-formatting functionality. */ - _DecodeResult distorm_decode32(_OffsetType codeOffset, const unsigned char* code, int codeLen, _DecodeType dt, _DecodedInst result[], unsigned int maxInstructions, unsigned int* usedInstructionsCount); - void distorm_format32(const _CodeInfo* ci, const _DInst* di, _DecodedInst* result); - #define distorm_decode distorm_decode32 - #define distorm_format distorm_format32 -#endif /*DISTORM_LIGHT*/ - -#endif - -/* - * distorm_version - * Input: - * none - * - * Output: unsigned int - version of compiled library. - */ -unsigned int distorm_version(); - -#endif /* DISTORM_STATIC */ - -#ifdef __cplusplus -} /* End Of Extern */ -#endif - -#endif /* DISTORM_H */ diff --git a/diStorm/include/mnemonics.h b/diStorm/include/mnemonics.h deleted file mode 100644 index a177972..0000000 --- a/diStorm/include/mnemonics.h +++ /dev/null @@ -1,312 +0,0 @@ -/* -mnemonics.h - -diStorm3 - Powerful disassembler for X86/AMD64 -http://ragestorm.net/distorm/ -distorm at gmail dot com -Copyright (C) 2003-2012 Gil Dabah - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see -*/ - - -#ifndef MNEMONICS_H -#define MNEMONICS_H - -#ifdef __cplusplus - extern "C" { -#endif - -#ifndef DISTORM_LIGHT - -typedef struct WMnemonic { - unsigned char length; - unsigned char p[1]; /* p is a null terminated string, which contains 'length' characters. */ -} _WMnemonic; - -typedef struct WRegister { - unsigned int length; - unsigned char p[6]; /* p is a null terminated string. */ -} _WRegister; - -extern const unsigned char _MNEMONICS[]; -extern const _WRegister _REGISTERS[]; - -#endif /* DISTORM_LIGHT */ - -#ifdef __cplusplus -} /* End Of Extern */ -#endif - -#define GET_REGISTER_NAME(r) (unsigned char*)_REGISTERS[(r)].p -#define GET_MNEMONIC_NAME(m) ((_WMnemonic*)&_MNEMONICS[(m)])->p - -typedef enum { - I_UNDEFINED = 0, I_AAA = 66, I_AAD = 389, I_AAM = 384, I_AAS = 76, I_ADC = 31, I_ADD = 11, I_ADDPD = 3110, - I_ADDPS = 3103, I_ADDSD = 3124, I_ADDSS = 3117, I_ADDSUBPD = 6394, I_ADDSUBPS = 6404, - I_AESDEC = 9209, I_AESDECLAST = 9226, I_AESENC = 9167, I_AESENCLAST = 9184, - I_AESIMC = 9150, I_AESKEYGENASSIST = 9795, I_AND = 41, I_ANDNPD = 3021, I_ANDNPS = 3013, - I_ANDPD = 2990, I_ANDPS = 2983, I_ARPL = 111, I_BLENDPD = 9372, I_BLENDPS = 9353, - I_BLENDVPD = 7619, I_BLENDVPS = 7609, I_BOUND = 104, I_BSF = 4346, I_BSR = 4358, - I_BSWAP = 960, I_BT = 872, I_BTC = 934, I_BTR = 912, I_BTS = 887, I_CALL = 456, - I_CALL_FAR = 260, I_CBW = 228, I_CDQ = 250, I_CDQE = 239, I_CLC = 492, I_CLD = 512, - I_CLFLUSH = 4329, I_CLGI = 1833, I_CLI = 502, I_CLTS = 541, I_CMC = 487, I_CMOVA = 694, - I_CMOVAE = 663, I_CMOVB = 656, I_CMOVBE = 686, I_CMOVG = 754, I_CMOVGE = 738, - I_CMOVL = 731, I_CMOVLE = 746, I_CMOVNO = 648, I_CMOVNP = 723, I_CMOVNS = 708, - I_CMOVNZ = 678, I_CMOVO = 641, I_CMOVP = 716, I_CMOVS = 701, I_CMOVZ = 671, - I_CMP = 71, I_CMPEQPD = 4449, I_CMPEQPS = 4370, I_CMPEQSD = 4607, I_CMPEQSS = 4528, - I_CMPLEPD = 4467, I_CMPLEPS = 4388, I_CMPLESD = 4625, I_CMPLESS = 4546, I_CMPLTPD = 4458, - I_CMPLTPS = 4379, I_CMPLTSD = 4616, I_CMPLTSS = 4537, I_CMPNEQPD = 4488, I_CMPNEQPS = 4409, - I_CMPNEQSD = 4646, I_CMPNEQSS = 4567, I_CMPNLEPD = 4508, I_CMPNLEPS = 4429, - I_CMPNLESD = 4666, I_CMPNLESS = 4587, I_CMPNLTPD = 4498, I_CMPNLTPS = 4419, - I_CMPNLTSD = 4656, I_CMPNLTSS = 4577, I_CMPORDPD = 4518, I_CMPORDPS = 4439, - I_CMPORDSD = 4676, I_CMPORDSS = 4597, I_CMPS = 301, I_CMPUNORDPD = 4476, I_CMPUNORDPS = 4397, - I_CMPUNORDSD = 4634, I_CMPUNORDSS = 4555, I_CMPXCHG = 898, I_CMPXCHG16B = 6373, - I_CMPXCHG8B = 6362, I_COMISD = 2779, I_COMISS = 2771, I_CPUID = 865, I_CQO = 255, - I_CRC32 = 9258, I_CVTDQ2PD = 6787, I_CVTDQ2PS = 3307, I_CVTPD2DQ = 6797, I_CVTPD2PI = 2681, - I_CVTPD2PS = 3233, I_CVTPH2PS = 4161, I_CVTPI2PD = 2495, I_CVTPI2PS = 2485, - I_CVTPS2DQ = 3317, I_CVTPS2PD = 3223, I_CVTPS2PH = 4171, I_CVTPS2PI = 2671, - I_CVTSD2SI = 2701, I_CVTSD2SS = 3253, I_CVTSI2SD = 2515, I_CVTSI2SS = 2505, - I_CVTSS2SD = 3243, I_CVTSS2SI = 2691, I_CVTTPD2DQ = 6776, I_CVTTPD2PI = 2614, - I_CVTTPS2DQ = 3327, I_CVTTPS2PI = 2603, I_CVTTSD2SI = 2636, I_CVTTSS2SI = 2625, - I_CWD = 245, I_CWDE = 233, I_DAA = 46, I_DAS = 56, I_DEC = 86, I_DIV = 1630, - I_DIVPD = 3499, I_DIVPS = 3492, I_DIVSD = 3513, I_DIVSS = 3506, I_DPPD = 9615, - I_DPPS = 9602, I_EMMS = 4100, I_ENTER = 340, I_EXTRACTPS = 9480, I_EXTRQ = 4136, - I_F2XM1 = 1176, I_FABS = 1107, I_FADD = 1007, I_FADDP = 1533, I_FBLD = 1585, - I_FBSTP = 1591, I_FCHS = 1101, I_FCLEX = 7289, I_FCMOVB = 1360, I_FCMOVBE = 1376, - I_FCMOVE = 1368, I_FCMOVNB = 1429, I_FCMOVNBE = 1447, I_FCMOVNE = 1438, I_FCMOVNU = 1457, - I_FCMOVU = 1385, I_FCOM = 1019, I_FCOMI = 1496, I_FCOMIP = 1607, I_FCOMP = 1025, - I_FCOMPP = 1547, I_FCOS = 1295, I_FDECSTP = 1222, I_FDIV = 1045, I_FDIVP = 1578, - I_FDIVR = 1051, I_FDIVRP = 1570, I_FEDISI = 1472, I_FEMMS = 574, I_FENI = 1466, - I_FFREE = 1511, I_FIADD = 1301, I_FICOM = 1315, I_FICOMP = 1322, I_FIDIV = 1345, - I_FIDIVR = 1352, I_FILD = 1402, I_FIMUL = 1308, I_FINCSTP = 1231, I_FINIT = 7304, - I_FIST = 1416, I_FISTP = 1422, I_FISTTP = 1408, I_FISUB = 1330, I_FISUBR = 1337, - I_FLD = 1058, I_FLD1 = 1125, I_FLDCW = 1082, I_FLDENV = 1074, I_FLDL2E = 1139, - I_FLDL2T = 1131, I_FLDLG2 = 1154, I_FLDLN2 = 1162, I_FLDPI = 1147, I_FLDZ = 1170, - I_FMUL = 1013, I_FMULP = 1540, I_FNCLEX = 7281, I_FNINIT = 7296, I_FNOP = 1095, - I_FNSAVE = 7311, I_FNSTCW = 7266, I_FNSTENV = 7249, I_FNSTSW = 7326, I_FPATAN = 1197, - I_FPREM = 1240, I_FPREM1 = 1214, I_FPTAN = 1190, I_FRNDINT = 1272, I_FRSTOR = 1503, - I_FSAVE = 7319, I_FSCALE = 1281, I_FSETPM = 1480, I_FSIN = 1289, I_FSINCOS = 1263, - I_FSQRT = 1256, I_FST = 1063, I_FSTCW = 7274, I_FSTENV = 7258, I_FSTP = 1068, - I_FSTSW = 7334, I_FSUB = 1032, I_FSUBP = 1563, I_FSUBR = 1038, I_FSUBRP = 1555, - I_FTST = 1113, I_FUCOM = 1518, I_FUCOMI = 1488, I_FUCOMIP = 1598, I_FUCOMP = 1525, - I_FUCOMPP = 1393, I_FXAM = 1119, I_FXCH = 1089, I_FXRSTOR = 9892, I_FXRSTOR64 = 9901, - I_FXSAVE = 9864, I_FXSAVE64 = 9872, I_FXTRACT = 1205, I_FYL2X = 1183, I_FYL2XP1 = 1247, - I_GETSEC = 633, I_HADDPD = 4181, I_HADDPS = 4189, I_HLT = 482, I_HSUBPD = 4215, - I_HSUBPS = 4223, I_IDIV = 1635, I_IMUL = 117, I_IN = 447, I_INC = 81, I_INS = 123, - I_INSERTPS = 9547, I_INSERTQ = 4143, I_INT = 367, I_INT_3 = 360, I_INT1 = 476, - I_INTO = 372, I_INVD = 555, I_INVEPT = 8284, I_INVLPG = 1711, I_INVLPGA = 1847, - I_INVPCID = 8301, I_INVVPID = 8292, I_IRET = 378, I_JA = 166, I_JAE = 147, - I_JB = 143, I_JBE = 161, I_JCXZ = 427, I_JECXZ = 433, I_JG = 202, I_JGE = 192, - I_JL = 188, I_JLE = 197, I_JMP = 462, I_JMP_FAR = 467, I_JNO = 138, I_JNP = 183, - I_JNS = 174, I_JNZ = 156, I_JO = 134, I_JP = 179, I_JRCXZ = 440, I_JS = 170, - I_JZ = 152, I_LAHF = 289, I_LAR = 522, I_LDDQU = 6994, I_LDMXCSR = 9922, I_LDS = 335, - I_LEA = 223, I_LEAVE = 347, I_LES = 330, I_LFENCE = 4265, I_LFS = 917, I_LGDT = 1687, - I_LGS = 922, I_LIDT = 1693, I_LLDT = 1652, I_LMSW = 1705, I_LODS = 313, I_LOOP = 421, - I_LOOPNZ = 406, I_LOOPZ = 414, I_LSL = 527, I_LSS = 907, I_LTR = 1658, I_LZCNT = 4363, - I_MASKMOVDQU = 7119, I_MASKMOVQ = 7109, I_MAXPD = 3559, I_MAXPS = 3552, I_MAXSD = 3573, - I_MAXSS = 3566, I_MFENCE = 4291, I_MINPD = 3439, I_MINPS = 3432, I_MINSD = 3453, - I_MINSS = 3446, I_MONITOR = 1755, I_MOV = 218, I_MOVAPD = 2459, I_MOVAPS = 2451, - I_MOVBE = 9251, I_MOVD = 3920, I_MOVDDUP = 2186, I_MOVDQ2Q = 6522, I_MOVDQA = 3946, - I_MOVDQU = 3954, I_MOVHLPS = 2151, I_MOVHPD = 2345, I_MOVHPS = 2337, I_MOVLHPS = 2328, - I_MOVLPD = 2168, I_MOVLPS = 2160, I_MOVMSKPD = 2815, I_MOVMSKPS = 2805, I_MOVNTDQ = 6849, - I_MOVNTDQA = 7895, I_MOVNTI = 952, I_MOVNTPD = 2556, I_MOVNTPS = 2547, I_MOVNTQ = 6841, - I_MOVNTSD = 2574, I_MOVNTSS = 2565, I_MOVQ = 3926, I_MOVQ2DQ = 6513, I_MOVS = 295, - I_MOVSD = 2110, I_MOVSHDUP = 2353, I_MOVSLDUP = 2176, I_MOVSS = 2103, I_MOVSX = 939, - I_MOVSXD = 10005, I_MOVUPD = 2095, I_MOVUPS = 2087, I_MOVZX = 927, I_MPSADBW = 9628, - I_MUL = 1625, I_MULPD = 3170, I_MULPS = 3163, I_MULSD = 3184, I_MULSS = 3177, - I_MWAIT = 1764, I_NEG = 1620, I_NOP = 581, I_NOT = 1615, I_OR = 27, I_ORPD = 3053, - I_ORPS = 3047, I_OUT = 451, I_OUTS = 128, I_PABSB = 7688, I_PABSD = 7718, I_PABSW = 7703, - I_PACKSSDW = 3849, I_PACKSSWB = 3681, I_PACKUSDW = 7916, I_PACKUSWB = 3759, - I_PADDB = 7204, I_PADDD = 7234, I_PADDQ = 6481, I_PADDSB = 6930, I_PADDSW = 6947, - I_PADDUSB = 6620, I_PADDUSW = 6639, I_PADDW = 7219, I_PALIGNR = 9410, I_PAND = 6607, - I_PANDN = 6665, I_PAUSE = 10013, I_PAVGB = 6680, I_PAVGUSB = 2078, I_PAVGW = 6725, - I_PBLENDVB = 7599, I_PBLENDW = 9391, I_PCLMULQDQ = 9647, I_PCMPEQB = 4043, - I_PCMPEQD = 4081, I_PCMPEQQ = 7876, I_PCMPEQW = 4062, I_PCMPESTRI = 9726, - I_PCMPESTRM = 9703, I_PCMPGTB = 3702, I_PCMPGTD = 3740, I_PCMPGTQ = 8087, - I_PCMPGTW = 3721, I_PCMPISTRI = 9772, I_PCMPISTRM = 9749, I_PEXTRB = 9429, - I_PEXTRD = 9446, I_PEXTRQ = 9454, I_PEXTRW = 6311, I_PF2ID = 1914, I_PF2IW = 1907, - I_PFACC = 2028, I_PFADD = 1977, I_PFCMPEQ = 2035, I_PFCMPGE = 1938, I_PFCMPGT = 1984, - I_PFMAX = 1993, I_PFMIN = 1947, I_PFMUL = 2044, I_PFNACC = 1921, I_PFPNACC = 1929, - I_PFRCP = 1954, I_PFRCPIT1 = 2000, I_PFRCPIT2 = 2051, I_PFRSQIT1 = 2010, I_PFRSQRT = 1961, - I_PFSUB = 1970, I_PFSUBR = 2020, I_PHADDD = 7375, I_PHADDSW = 7392, I_PHADDW = 7358, - I_PHMINPOSUW = 8259, I_PHSUBD = 7451, I_PHSUBSW = 7468, I_PHSUBW = 7434, I_PI2FD = 1900, - I_PI2FW = 1893, I_PINSRB = 9530, I_PINSRD = 9568, I_PINSRQ = 9576, I_PINSRW = 6294, - I_PMADDUBSW = 7411, I_PMADDWD = 7073, I_PMAXSB = 8174, I_PMAXSD = 8191, I_PMAXSW = 6964, - I_PMAXUB = 6648, I_PMAXUD = 8225, I_PMAXUW = 8208, I_PMINSB = 8106, I_PMINSD = 8123, - I_PMINSW = 6902, I_PMINUB = 6590, I_PMINUD = 8157, I_PMINUW = 8140, I_PMOVMSKB = 6531, - I_PMOVSXBD = 7754, I_PMOVSXBQ = 7775, I_PMOVSXBW = 7733, I_PMOVSXDQ = 7838, - I_PMOVSXWD = 7796, I_PMOVSXWQ = 7817, I_PMOVZXBD = 7982, I_PMOVZXBQ = 8003, - I_PMOVZXBW = 7961, I_PMOVZXDQ = 8066, I_PMOVZXWD = 8024, I_PMOVZXWQ = 8045, - I_PMULDQ = 7859, I_PMULHRSW = 7538, I_PMULHRW = 2061, I_PMULHUW = 6740, I_PMULHW = 6759, - I_PMULLD = 8242, I_PMULLW = 6496, I_PMULUDQ = 7054, I_POP = 22, I_POPA = 98, - I_POPCNT = 4338, I_POPF = 277, I_POR = 6919, I_PREFETCH = 1872, I_PREFETCHNTA = 2402, - I_PREFETCHT0 = 2415, I_PREFETCHT1 = 2427, I_PREFETCHT2 = 2439, I_PREFETCHW = 1882, - I_PSADBW = 7092, I_PSHUFB = 7341, I_PSHUFD = 3988, I_PSHUFHW = 3996, I_PSHUFLW = 4005, - I_PSHUFW = 3980, I_PSIGNB = 7487, I_PSIGND = 7521, I_PSIGNW = 7504, I_PSLLD = 7024, - I_PSLLDQ = 9847, I_PSLLQ = 7039, I_PSLLW = 7009, I_PSRAD = 6710, I_PSRAW = 6695, - I_PSRLD = 6451, I_PSRLDQ = 9830, I_PSRLQ = 6466, I_PSRLW = 6436, I_PSUBB = 7144, - I_PSUBD = 7174, I_PSUBQ = 7189, I_PSUBSB = 6868, I_PSUBSW = 6885, I_PSUBUSB = 6552, - I_PSUBUSW = 6571, I_PSUBW = 7159, I_PSWAPD = 2070, I_PTEST = 7629, I_PUNPCKHBW = 3780, - I_PUNPCKHDQ = 3826, I_PUNPCKHQDQ = 3895, I_PUNPCKHWD = 3803, I_PUNPCKLBW = 3612, - I_PUNPCKLDQ = 3658, I_PUNPCKLQDQ = 3870, I_PUNPCKLWD = 3635, I_PUSH = 16, - I_PUSHA = 91, I_PUSHF = 270, I_PXOR = 6981, I_RCL = 977, I_RCPPS = 2953, I_RCPSS = 2960, - I_RCR = 982, I_RDFSBASE = 9882, I_RDGSBASE = 9912, I_RDMSR = 600, I_RDPMC = 607, - I_RDRAND = 10026, I_RDTSC = 593, I_RDTSCP = 1864, I_RET = 325, I_RETF = 354, - I_ROL = 967, I_ROR = 972, I_ROUNDPD = 9296, I_ROUNDPS = 9277, I_ROUNDSD = 9334, - I_ROUNDSS = 9315, I_RSM = 882, I_RSQRTPS = 2915, I_RSQRTSS = 2924, I_SAHF = 283, - I_SAL = 997, I_SALC = 394, I_SAR = 1002, I_SBB = 36, I_SCAS = 319, I_SETA = 807, - I_SETAE = 780, I_SETB = 774, I_SETBE = 800, I_SETG = 859, I_SETGE = 845, I_SETL = 839, - I_SETLE = 852, I_SETNO = 767, I_SETNP = 832, I_SETNS = 819, I_SETNZ = 793, - I_SETO = 761, I_SETP = 826, I_SETS = 813, I_SETZ = 787, I_SFENCE = 4321, I_SGDT = 1675, - I_SHL = 987, I_SHLD = 876, I_SHR = 992, I_SHRD = 892, I_SHUFPD = 6336, I_SHUFPS = 6328, - I_SIDT = 1681, I_SKINIT = 1839, I_SLDT = 1641, I_SMSW = 1699, I_SQRTPD = 2855, - I_SQRTPS = 2847, I_SQRTSD = 2871, I_SQRTSS = 2863, I_STC = 497, I_STD = 517, - I_STGI = 1827, I_STI = 507, I_STMXCSR = 9951, I_STOS = 307, I_STR = 1647, I_SUB = 51, - I_SUBPD = 3379, I_SUBPS = 3372, I_SUBSD = 3393, I_SUBSS = 3386, I_SWAPGS = 1856, - I_SYSCALL = 532, I_SYSENTER = 614, I_SYSEXIT = 624, I_SYSRET = 547, I_TEST = 206, - I_TZCNT = 4351, I_UCOMISD = 2742, I_UCOMISS = 2733, I_UD2 = 569, I_UNPCKHPD = 2296, - I_UNPCKHPS = 2286, I_UNPCKLPD = 2254, I_UNPCKLPS = 2244, I_VADDPD = 3139, - I_VADDPS = 3131, I_VADDSD = 3155, I_VADDSS = 3147, I_VADDSUBPD = 6414, I_VADDSUBPS = 6425, - I_VAESDEC = 9217, I_VAESDECLAST = 9238, I_VAESENC = 9175, I_VAESENCLAST = 9196, - I_VAESIMC = 9158, I_VAESKEYGENASSIST = 9812, I_VANDNPD = 3038, I_VANDNPS = 3029, - I_VANDPD = 3005, I_VANDPS = 2997, I_VBLENDPD = 9381, I_VBLENDPS = 9362, I_VBLENDVPD = 9681, - I_VBLENDVPS = 9670, I_VBROADCASTF128 = 7672, I_VBROADCASTSD = 7658, I_VBROADCASTSS = 7644, - I_VCMPEQPD = 5088, I_VCMPEQPS = 4686, I_VCMPEQSD = 5892, I_VCMPEQSS = 5490, - I_VCMPEQ_OSPD = 5269, I_VCMPEQ_OSPS = 4867, I_VCMPEQ_OSSD = 6073, I_VCMPEQ_OSSS = 5671, - I_VCMPEQ_UQPD = 5175, I_VCMPEQ_UQPS = 4773, I_VCMPEQ_UQSD = 5979, I_VCMPEQ_UQSS = 5577, - I_VCMPEQ_USPD = 5378, I_VCMPEQ_USPS = 4976, I_VCMPEQ_USSD = 6182, I_VCMPEQ_USSS = 5780, - I_VCMPFALSEPD = 5210, I_VCMPFALSEPS = 4808, I_VCMPFALSESD = 6014, I_VCMPFALSESS = 5612, - I_VCMPFALSE_OSPD = 5419, I_VCMPFALSE_OSPS = 5017, I_VCMPFALSE_OSSD = 6223, - I_VCMPFALSE_OSSS = 5821, I_VCMPGEPD = 5237, I_VCMPGEPS = 4835, I_VCMPGESD = 6041, - I_VCMPGESS = 5639, I_VCMPGE_OQPD = 5449, I_VCMPGE_OQPS = 5047, I_VCMPGE_OQSD = 6253, - I_VCMPGE_OQSS = 5851, I_VCMPGTPD = 5247, I_VCMPGTPS = 4845, I_VCMPGTSD = 6051, - I_VCMPGTSS = 5649, I_VCMPGT_OQPD = 5462, I_VCMPGT_OQPS = 5060, I_VCMPGT_OQSD = 6266, - I_VCMPGT_OQSS = 5864, I_VCMPLEPD = 5108, I_VCMPLEPS = 4706, I_VCMPLESD = 5912, - I_VCMPLESS = 5510, I_VCMPLE_OQPD = 5295, I_VCMPLE_OQPS = 4893, I_VCMPLE_OQSD = 6099, - I_VCMPLE_OQSS = 5697, I_VCMPLTPD = 5098, I_VCMPLTPS = 4696, I_VCMPLTSD = 5902, - I_VCMPLTSS = 5500, I_VCMPLT_OQPD = 5282, I_VCMPLT_OQPS = 4880, I_VCMPLT_OQSD = 6086, - I_VCMPLT_OQSS = 5684, I_VCMPNEQPD = 5131, I_VCMPNEQPS = 4729, I_VCMPNEQSD = 5935, - I_VCMPNEQSS = 5533, I_VCMPNEQ_OQPD = 5223, I_VCMPNEQ_OQPS = 4821, I_VCMPNEQ_OQSD = 6027, - I_VCMPNEQ_OQSS = 5625, I_VCMPNEQ_OSPD = 5435, I_VCMPNEQ_OSPS = 5033, I_VCMPNEQ_OSSD = 6239, - I_VCMPNEQ_OSSS = 5837, I_VCMPNEQ_USPD = 5323, I_VCMPNEQ_USPS = 4921, I_VCMPNEQ_USSD = 6127, - I_VCMPNEQ_USSS = 5725, I_VCMPNGEPD = 5188, I_VCMPNGEPS = 4786, I_VCMPNGESD = 5992, - I_VCMPNGESS = 5590, I_VCMPNGE_UQPD = 5391, I_VCMPNGE_UQPS = 4989, I_VCMPNGE_UQSD = 6195, - I_VCMPNGE_UQSS = 5793, I_VCMPNGTPD = 5199, I_VCMPNGTPS = 4797, I_VCMPNGTSD = 6003, - I_VCMPNGTSS = 5601, I_VCMPNGT_UQPD = 5405, I_VCMPNGT_UQPS = 5003, I_VCMPNGT_UQSD = 6209, - I_VCMPNGT_UQSS = 5807, I_VCMPNLEPD = 5153, I_VCMPNLEPS = 4751, I_VCMPNLESD = 5957, - I_VCMPNLESS = 5555, I_VCMPNLE_UQPD = 5351, I_VCMPNLE_UQPS = 4949, I_VCMPNLE_UQSD = 6155, - I_VCMPNLE_UQSS = 5753, I_VCMPNLTPD = 5142, I_VCMPNLTPS = 4740, I_VCMPNLTSD = 5946, - I_VCMPNLTSS = 5544, I_VCMPNLT_UQPD = 5337, I_VCMPNLT_UQPS = 4935, I_VCMPNLT_UQSD = 6141, - I_VCMPNLT_UQSS = 5739, I_VCMPORDPD = 5164, I_VCMPORDPS = 4762, I_VCMPORDSD = 5968, - I_VCMPORDSS = 5566, I_VCMPORD_SPD = 5365, I_VCMPORD_SPS = 4963, I_VCMPORD_SSD = 6169, - I_VCMPORD_SSS = 5767, I_VCMPTRUEPD = 5257, I_VCMPTRUEPS = 4855, I_VCMPTRUESD = 6061, - I_VCMPTRUESS = 5659, I_VCMPTRUE_USPD = 5475, I_VCMPTRUE_USPS = 5073, I_VCMPTRUE_USSD = 6279, - I_VCMPTRUE_USSS = 5877, I_VCMPUNORDPD = 5118, I_VCMPUNORDPS = 4716, I_VCMPUNORDSD = 5922, - I_VCMPUNORDSS = 5520, I_VCMPUNORD_SPD = 5308, I_VCMPUNORD_SPS = 4906, I_VCMPUNORD_SSD = 6112, - I_VCMPUNORD_SSS = 5710, I_VCOMISD = 2796, I_VCOMISS = 2787, I_VCVTDQ2PD = 6819, - I_VCVTDQ2PS = 3338, I_VCVTPD2DQ = 6830, I_VCVTPD2PS = 3274, I_VCVTPS2DQ = 3349, - I_VCVTPS2PD = 3263, I_VCVTSD2SI = 2722, I_VCVTSD2SS = 3296, I_VCVTSI2SD = 2536, - I_VCVTSI2SS = 2525, I_VCVTSS2SD = 3285, I_VCVTSS2SI = 2711, I_VCVTTPD2DQ = 6807, - I_VCVTTPS2DQ = 3360, I_VCVTTSD2SI = 2659, I_VCVTTSS2SI = 2647, I_VDIVPD = 3528, - I_VDIVPS = 3520, I_VDIVSD = 3544, I_VDIVSS = 3536, I_VDPPD = 9621, I_VDPPS = 9608, - I_VERR = 1663, I_VERW = 1669, I_VEXTRACTF128 = 9516, I_VEXTRACTPS = 9491, - I_VFMADD132PD = 8387, I_VFMADD132PS = 8374, I_VFMADD132SD = 8413, I_VFMADD132SS = 8400, - I_VFMADD213PD = 8667, I_VFMADD213PS = 8654, I_VFMADD213SD = 8693, I_VFMADD213SS = 8680, - I_VFMADD231PD = 8947, I_VFMADD231PS = 8934, I_VFMADD231SD = 8973, I_VFMADD231SS = 8960, - I_VFMADDSUB132PD = 8326, I_VFMADDSUB132PS = 8310, I_VFMADDSUB213PD = 8606, - I_VFMADDSUB213PS = 8590, I_VFMADDSUB231PD = 8886, I_VFMADDSUB231PS = 8870, - I_VFMSUB132PD = 8439, I_VFMSUB132PS = 8426, I_VFMSUB132SD = 8465, I_VFMSUB132SS = 8452, - I_VFMSUB213PD = 8719, I_VFMSUB213PS = 8706, I_VFMSUB213SD = 8745, I_VFMSUB213SS = 8732, - I_VFMSUB231PD = 8999, I_VFMSUB231PS = 8986, I_VFMSUB231SD = 9025, I_VFMSUB231SS = 9012, - I_VFMSUBADD132PD = 8358, I_VFMSUBADD132PS = 8342, I_VFMSUBADD213PD = 8638, - I_VFMSUBADD213PS = 8622, I_VFMSUBADD231PD = 8918, I_VFMSUBADD231PS = 8902, - I_VFNMADD132PD = 8492, I_VFNMADD132PS = 8478, I_VFNMADD132SD = 8520, I_VFNMADD132SS = 8506, - I_VFNMADD213PD = 8772, I_VFNMADD213PS = 8758, I_VFNMADD213SD = 8800, I_VFNMADD213SS = 8786, - I_VFNMADD231PD = 9052, I_VFNMADD231PS = 9038, I_VFNMADD231SD = 9080, I_VFNMADD231SS = 9066, - I_VFNMSUB132PD = 8548, I_VFNMSUB132PS = 8534, I_VFNMSUB132SD = 8576, I_VFNMSUB132SS = 8562, - I_VFNMSUB213PD = 8828, I_VFNMSUB213PS = 8814, I_VFNMSUB213SD = 8856, I_VFNMSUB213SS = 8842, - I_VFNMSUB231PD = 9108, I_VFNMSUB231PS = 9094, I_VFNMSUB231SD = 9136, I_VFNMSUB231SS = 9122, - I_VHADDPD = 4197, I_VHADDPS = 4206, I_VHSUBPD = 4231, I_VHSUBPS = 4240, I_VINSERTF128 = 9503, - I_VINSERTPS = 9557, I_VLDDQU = 7001, I_VLDMXCSR = 9941, I_VMASKMOVDQU = 7131, - I_VMASKMOVPD = 7949, I_VMASKMOVPS = 7937, I_VMAXPD = 3588, I_VMAXPS = 3580, - I_VMAXSD = 3604, I_VMAXSS = 3596, I_VMCALL = 1719, I_VMCLEAR = 9989, I_VMFUNC = 1787, - I_VMINPD = 3468, I_VMINPS = 3460, I_VMINSD = 3484, I_VMINSS = 3476, I_VMLAUNCH = 1727, - I_VMLOAD = 1811, I_VMMCALL = 1802, I_VMOVAPD = 2476, I_VMOVAPS = 2467, I_VMOVD = 3932, - I_VMOVDDUP = 2234, I_VMOVDQA = 3962, I_VMOVDQU = 3971, I_VMOVHLPS = 2195, - I_VMOVHPD = 2382, I_VMOVHPS = 2373, I_VMOVLHPS = 2363, I_VMOVLPD = 2214, I_VMOVLPS = 2205, - I_VMOVMSKPD = 2836, I_VMOVMSKPS = 2825, I_VMOVNTDQ = 6858, I_VMOVNTDQA = 7905, - I_VMOVNTPD = 2593, I_VMOVNTPS = 2583, I_VMOVQ = 3939, I_VMOVSD = 2143, I_VMOVSHDUP = 2391, - I_VMOVSLDUP = 2223, I_VMOVSS = 2135, I_VMOVUPD = 2126, I_VMOVUPS = 2117, I_VMPSADBW = 9637, - I_VMPTRLD = 9980, I_VMPTRST = 6385, I_VMREAD = 4128, I_VMRESUME = 1737, I_VMRUN = 1795, - I_VMSAVE = 1819, I_VMULPD = 3199, I_VMULPS = 3191, I_VMULSD = 3215, I_VMULSS = 3207, - I_VMWRITE = 4152, I_VMXOFF = 1747, I_VMXON = 9998, I_VORPD = 3066, I_VORPS = 3059, - I_VPABSB = 7695, I_VPABSD = 7725, I_VPABSW = 7710, I_VPACKSSDW = 3859, I_VPACKSSWB = 3691, - I_VPACKUSDW = 7926, I_VPACKUSWB = 3769, I_VPADDB = 7211, I_VPADDD = 7241, - I_VPADDQ = 6488, I_VPADDSB = 6938, I_VPADDSW = 6955, I_VPADDUSW = 6629, I_VPADDW = 7226, - I_VPALIGNR = 9419, I_VPAND = 6613, I_VPANDN = 6672, I_VPAVGB = 6687, I_VPAVGW = 6732, - I_VPBLENDVB = 9692, I_VPBLENDW = 9400, I_VPCLMULQDQ = 9658, I_VPCMPEQB = 4052, - I_VPCMPEQD = 4090, I_VPCMPEQQ = 7885, I_VPCMPEQW = 4071, I_VPCMPESTRI = 9737, - I_VPCMPESTRM = 9714, I_VPCMPGTB = 3711, I_VPCMPGTD = 3749, I_VPCMPGTQ = 8096, - I_VPCMPGTW = 3730, I_VPCMPISTRI = 9783, I_VPCMPISTRM = 9760, I_VPERM2F128 = 9265, - I_VPERMILPD = 7570, I_VPERMILPS = 7559, I_VPEXTRB = 9437, I_VPEXTRD = 9462, - I_VPEXTRQ = 9471, I_VPEXTRW = 6319, I_VPHADDD = 7383, I_VPHADDSW = 7401, I_VPHADDW = 7366, - I_VPHMINPOSUW = 8271, I_VPHSUBD = 7459, I_VPHSUBSW = 7477, I_VPHSUBW = 7442, - I_VPINSRB = 9538, I_VPINSRD = 9584, I_VPINSRQ = 9593, I_VPINSRW = 6302, I_VPMADDUBSW = 7422, - I_VPMADDWD = 7082, I_VPMAXSB = 8182, I_VPMAXSD = 8199, I_VPMAXSW = 6972, I_VPMAXUB = 6656, - I_VPMAXUD = 8233, I_VPMAXUW = 8216, I_VPMINSB = 8114, I_VPMINSD = 8131, I_VPMINSW = 6910, - I_VPMINUB = 6598, I_VPMINUD = 8165, I_VPMINUW = 8148, I_VPMOVMSKB = 6541, - I_VPMOVSXBD = 7764, I_VPMOVSXBQ = 7785, I_VPMOVSXBW = 7743, I_VPMOVSXDQ = 7848, - I_VPMOVSXWD = 7806, I_VPMOVSXWQ = 7827, I_VPMOVZXBD = 7992, I_VPMOVZXBQ = 8013, - I_VPMOVZXBW = 7971, I_VPMOVZXDQ = 8076, I_VPMOVZXWD = 8034, I_VPMOVZXWQ = 8055, - I_VPMULDQ = 7867, I_VPMULHRSW = 7548, I_VPMULHUW = 6749, I_VPMULHW = 6767, - I_VPMULLD = 8250, I_VPMULLW = 6504, I_VPMULUDQ = 7063, I_VPOR = 6924, I_VPSADBW = 7100, - I_VPSHUFB = 7349, I_VPSHUFD = 4014, I_VPSHUFHW = 4023, I_VPSHUFLW = 4033, - I_VPSIGNB = 7495, I_VPSIGND = 7529, I_VPSIGNW = 7512, I_VPSLLD = 7031, I_VPSLLDQ = 9855, - I_VPSLLQ = 7046, I_VPSLLW = 7016, I_VPSRAD = 6717, I_VPSRAW = 6702, I_VPSRLD = 6458, - I_VPSRLDQ = 9838, I_VPSRLQ = 6473, I_VPSRLW = 6443, I_VPSUBB = 7151, I_VPSUBD = 7181, - I_VPSUBQ = 7196, I_VPSUBSB = 6876, I_VPSUBSW = 6893, I_VPSUBUSB = 6561, I_VPSUBUSW = 6580, - I_VPSUBW = 7166, I_VPTEST = 7636, I_VPUNPCKHBW = 3791, I_VPUNPCKHDQ = 3837, - I_VPUNPCKHQDQ = 3907, I_VPUNPCKHWD = 3814, I_VPUNPCKLBW = 3623, I_VPUNPCKLDQ = 3669, - I_VPUNPCKLQDQ = 3882, I_VPUNPCKLWD = 3646, I_VPXOR = 6987, I_VRCPPS = 2967, - I_VRCPSS = 2975, I_VROUNDPD = 9305, I_VROUNDPS = 9286, I_VROUNDSD = 9343, - I_VROUNDSS = 9324, I_VRSQRTPS = 2933, I_VRSQRTSS = 2943, I_VSHUFPD = 6353, - I_VSHUFPS = 6344, I_VSQRTPD = 2888, I_VSQRTPS = 2879, I_VSQRTSD = 2906, I_VSQRTSS = 2897, - I_VSTMXCSR = 9970, I_VSUBPD = 3408, I_VSUBPS = 3400, I_VSUBSD = 3424, I_VSUBSS = 3416, - I_VTESTPD = 7590, I_VTESTPS = 7581, I_VUCOMISD = 2761, I_VUCOMISS = 2751, - I_VUNPCKHPD = 2317, I_VUNPCKHPS = 2306, I_VUNPCKLPD = 2275, I_VUNPCKLPS = 2264, - I_VXORPD = 3095, I_VXORPS = 3087, I_VZEROALL = 4118, I_VZEROUPPER = 4106, - I_WAIT = 10020, I_WBINVD = 561, I_WRFSBASE = 9931, I_WRGSBASE = 9960, I_WRMSR = 586, - I_XADD = 946, I_XCHG = 212, I_XGETBV = 1771, I_XLAT = 400, I_XOR = 61, I_XORPD = 3080, - I_XORPS = 3073, I_XRSTOR = 4273, I_XRSTOR64 = 4281, I_XSAVE = 4249, I_XSAVE64 = 4256, - I_XSAVEOPT = 4299, I_XSAVEOPT64 = 4309, I_XSETBV = 1779, I__3DNOW = 10034 -} _InstructionType; - -typedef enum { - R_RAX, R_RCX, R_RDX, R_RBX, R_RSP, R_RBP, R_RSI, R_RDI, R_R8, R_R9, R_R10, R_R11, R_R12, R_R13, R_R14, R_R15, - R_EAX, R_ECX, R_EDX, R_EBX, R_ESP, R_EBP, R_ESI, R_EDI, R_R8D, R_R9D, R_R10D, R_R11D, R_R12D, R_R13D, R_R14D, R_R15D, - R_AX, R_CX, R_DX, R_BX, R_SP, R_BP, R_SI, R_DI, R_R8W, R_R9W, R_R10W, R_R11W, R_R12W, R_R13W, R_R14W, R_R15W, - R_AL, R_CL, R_DL, R_BL, R_AH, R_CH, R_DH, R_BH, R_R8B, R_R9B, R_R10B, R_R11B, R_R12B, R_R13B, R_R14B, R_R15B, - R_SPL, R_BPL, R_SIL, R_DIL, - R_ES, R_CS, R_SS, R_DS, R_FS, R_GS, - R_RIP, - R_ST0, R_ST1, R_ST2, R_ST3, R_ST4, R_ST5, R_ST6, R_ST7, - R_MM0, R_MM1, R_MM2, R_MM3, R_MM4, R_MM5, R_MM6, R_MM7, - R_XMM0, R_XMM1, R_XMM2, R_XMM3, R_XMM4, R_XMM5, R_XMM6, R_XMM7, R_XMM8, R_XMM9, R_XMM10, R_XMM11, R_XMM12, R_XMM13, R_XMM14, R_XMM15, - R_YMM0, R_YMM1, R_YMM2, R_YMM3, R_YMM4, R_YMM5, R_YMM6, R_YMM7, R_YMM8, R_YMM9, R_YMM10, R_YMM11, R_YMM12, R_YMM13, R_YMM14, R_YMM15, - R_CR0, R_UNUSED0, R_CR2, R_CR3, R_CR4, R_UNUSED1, R_UNUSED2, R_UNUSED3, R_CR8, - R_DR0, R_DR1, R_DR2, R_DR3, R_UNUSED4, R_UNUSED5, R_DR6, R_DR7 -} _RegisterType; - -#endif /* MNEMONICS_H */ diff --git a/diStorm/src/config.h b/diStorm/src/config.h deleted file mode 100644 index d4c331d..0000000 --- a/diStorm/src/config.h +++ /dev/null @@ -1,181 +0,0 @@ -/* -config.h - -diStorm3 - Powerful disassembler for X86/AMD64 -http://ragestorm.net/distorm/ -distorm at gmail dot com -Copyright (C) 2003-2012 Gil Dabah - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see -*/ - - -#ifndef CONFIG_H -#define CONFIG_H - -/* diStorm version number. */ -#define __DISTORMV__ 0x030300 - -#include /* memset, memcpy - can be easily self implemented for libc independency. */ - -#include "../include/distorm.h" - - -/* - * 64 bit offsets support: - * This macro should be defined from compiler command line flags, e.g: -DSUPPORT_64BIT_OFFSET - * Note: make sure that the caller (library user) defines it too! - */ -/* #define SUPPORT_64BIT_OFFSET */ - -/* - * If you compile diStorm as a dynamic library (.dll or .so) file, make sure you uncomment the next line. - * So the interface functions will be exported, otherwise they are useable only for static library. - * For example, this macro is being set for compiling diStorm as a .dll for Python with CTypes. - */ -/* #define DISTORM_DYNAMIC */ - -/* - * If DISTORM_LIGHT is defined, everything involved in formatting the instructions - * as text will be excluded from compilation. - * distorm_decode(..) and distorm_format(..) will not be available. - * This will decrease the size of the executable and leave you with decomposition functionality only. - * - * Note: it should be either set in the preprocessor definitions manually or in command line -D switch. - * #define DISTORM_LIGHT - */ - -/* - * diStorm now supports little/big endian CPU's. - * It should detect the endianness according to predefined macro's of the compiler. - * If you don't use GCC/MSVC you will have to define it on your own. - */ - -/* These macros are used in order to make the code portable. */ -#ifdef __GNUC__ - -#include - -#define _DLLEXPORT_ -#define _FASTCALL_ -#define _INLINE_ static -/* GCC ignores this directive... */ -/*#define _FASTCALL_ __attribute__((__fastcall__))*/ - -/* Set endianity (supposed to be LE though): */ -#ifdef __BIG_ENDIAN__ - #define BE_SYSTEM -#endif - -/* End of __GCC__ */ - -#elif __WATCOMC__ - -#include - -#define _DLLEXPORT_ -#define _FASTCALL_ -#define _INLINE_ __inline - -/* End of __WATCOMC__ */ - -#elif __DMC__ - -#include - -#define _DLLEXPORT_ -#define _FASTCALL_ -#define _INLINE_ __inline - -/* End of __DMC__ */ - -#elif __TINYC__ - -#include - -#define _DLLEXPORT_ -#define _FASTCALL_ -#define _INLINE_ - -/* End of __TINYC__ */ - -#elif _MSC_VER - -/* stdint alternative is defined in distorm.h */ - -#define _DLLEXPORT_ __declspec(dllexport) -#define _FASTCALL_ __fastcall -#define _INLINE_ __inline - -/* Set endianity (supposed to be LE though): */ -#if !defined(_M_IX86) && !defined(_M_X64) - #define BE_SYSTEM -#endif - -#endif /* #elif _MSC_VER */ - -/* If the library isn't compiled as a dynamic library don't export any functions. */ -#ifndef DISTORM_DYNAMIC -#undef _DLLEXPORT_ -#define _DLLEXPORT_ -#endif - -#ifndef FALSE -#define FALSE 0 -#endif -#ifndef TRUE -#define TRUE 1 -#endif - -/* Define stream read functions for big endian systems. */ -#ifdef BE_SYSTEM -/* - * These functions can read from the stream safely! - * Swap endianity of input to little endian. - */ -static _INLINE_ int16_t RSHORT(const uint8_t *s) -{ - return s[0] | (s[1] << 8); -} -static _INLINE_ uint16_t RUSHORT(const uint8_t *s) -{ - return s[0] | (s[1] << 8); -} -static _INLINE_ int32_t RLONG(const uint8_t *s) -{ - return s[0] | (s[1] << 8) | (s[2] << 16) | (s[3] << 24); -} -static _INLINE_ uint32_t RULONG(const uint8_t *s) -{ - return s[0] | (s[1] << 8) | (s[2] << 16) | (s[3] << 24); -} -static _INLINE_ int64_t RLLONG(const uint8_t *s) -{ - return s[0] | (s[1] << 8) | (s[2] << 16) | (s[3] << 24) | ((uint64_t)s[4] << 32) | ((uint64_t)s[5] << 40) | ((uint64_t)s[6] << 48) | ((uint64_t)s[7] << 56); -} -static _INLINE_ uint64_t RULLONG(const uint8_t *s) -{ - return s[0] | (s[1] << 8) | (s[2] << 16) | (s[3] << 24) | ((uint64_t)s[4] << 32) | ((uint64_t)s[5] << 40) | ((uint64_t)s[6] << 48) | ((uint64_t)s[7] << 56); -} -#else -/* Little endian macro's will just make the cast. */ -#define RSHORT(x) *(int16_t *)x -#define RUSHORT(x) *(uint16_t *)x -#define RLONG(x) *(int32_t *)x -#define RULONG(x) *(uint32_t *)x -#define RLLONG(x) *(int64_t *)x -#define RULLONG(x) *(uint64_t *)x -#endif - -#endif /* CONFIG_H */ diff --git a/diStorm/src/decoder.c b/diStorm/src/decoder.c deleted file mode 100644 index 3ffc3a1..0000000 --- a/diStorm/src/decoder.c +++ /dev/null @@ -1,653 +0,0 @@ -/* -decoder.c - -diStorm3 - Powerful disassembler for X86/AMD64 -http://ragestorm.net/distorm/ -distorm at gmail dot com -Copyright (C) 2003-2012 Gil Dabah - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see -*/ - - -#include "decoder.h" -#include "instructions.h" -#include "insts.h" -#include "prefix.h" -#include "x86defs.h" -#include "operands.h" -#include "insts.h" -#include "../include/mnemonics.h" - - -/* Instruction Prefixes - Opcode - ModR/M - SIB - Displacement - Immediate */ - -static _DecodeType decode_get_effective_addr_size(_DecodeType dt, _iflags decodedPrefixes) -{ - /* - * This table is to map from the current decoding mode to an effective address size: - * Decode16 -> Decode32 - * Decode32 -> Decode16 - * Decode64 -> Decode32 - */ - static _DecodeType AddrSizeTable[] = {Decode32Bits, Decode16Bits, Decode32Bits}; - - /* Switch to non default mode if prefix exists, only for ADDRESS SIZE. */ - if (decodedPrefixes & INST_PRE_ADDR_SIZE) dt = AddrSizeTable[dt]; - return dt; -} - -static _DecodeType decode_get_effective_op_size(_DecodeType dt, _iflags decodedPrefixes, unsigned int rex, _iflags instFlags) -{ - /* - * This table is to map from the current decoding mode to an effective operand size: - * Decode16 -> Decode32 - * Decode32 -> Decode16 - * Decode64 -> Decode16 - * Not that in 64bits it's a bit more complicated, because of REX and promoted instructions. - */ - static _DecodeType OpSizeTable[] = {Decode32Bits, Decode16Bits, Decode16Bits}; - - if (decodedPrefixes & INST_PRE_OP_SIZE) return OpSizeTable[dt]; - - if (dt == Decode64Bits) { - /* - * REX Prefix toggles data size to 64 bits. - * Operand size prefix toggles data size to 16. - * Default data size is 32 bits. - * Promoted instructions are 64 bits if they don't require a REX perfix. - * Non promoted instructions are 64 bits if the REX prefix exists. - */ - /* Automatically promoted instructions have only INST_64BITS SET! */ - if (((instFlags & (INST_64BITS | INST_PRE_REX)) == INST_64BITS) || - /* Other instructions in 64 bits can be promoted only with a REX prefix. */ - ((decodedPrefixes & INST_PRE_REX) && (rex & PREFIX_EX_W))) dt = Decode64Bits; - else dt = Decode32Bits; /* Default. */ - } - return dt; -} - -/* A helper macro to convert from diStorm's CPU flags to EFLAGS. */ -#define CONVERT_FLAGS_TO_EFLAGS(dst, src, field) dst->field = ((src->field & D_COMPACT_SAME_FLAGS) | \ - ((src->field & D_COMPACT_IF) ? D_IF : 0) | \ - ((src->field & D_COMPACT_DF) ? D_DF : 0) | \ - ((src->field & D_COMPACT_OF) ? D_OF : 0)); - -static _DecodeResult decode_inst(_CodeInfo* ci, _PrefixState* ps, _DInst* di) -{ - /* Remember whether the instruction is privileged. */ - uint16_t privilegedFlag = 0; - - /* The ModR/M byte of the current instruction. */ - unsigned int modrm = 0; - - /* The REX/VEX prefix byte value. */ - unsigned int vrex = ps->vrex; - - /* - * Backup original input, so we can use it later if a problem occurs - * (like not enough data for decoding, invalid opcode, etc). - */ - const uint8_t* startCode = ci->code; - - /* Holds the info about the current found instruction. */ - _InstInfo* ii = NULL; - _InstSharedInfo* isi = NULL; - - /* Used only for special CMP instructions which have pseudo opcodes suffix. */ - unsigned char cmpType = 0; - - /* - * Indicates whether it is right to LOCK the instruction by decoding its first operand. - * Only then you know if it's ok to output the LOCK prefix's text... - * Used for first operand only. - */ - int lockable = FALSE; - - /* Calculate (and cache) effective-operand-size and effective-address-size only once. */ - _DecodeType effOpSz, effAdrSz; - _iflags instFlags; - - ii = inst_lookup(ci, ps); - if (ii == NULL) goto _Undecodable; - isi = &InstSharedInfoTable[ii->sharedIndex]; - instFlags = FlagsTable[isi->flagsIndex]; - - /* Copy the privileged bit and remove it from the opcodeId field ASAP. */ - privilegedFlag = ii->opcodeId & OPCODE_ID_PRIVILEGED; - ii->opcodeId &= ~OPCODE_ID_PRIVILEGED; - - /* - * If both REX and OpSize are available we will have to disable the OpSize, because REX has precedence. - * However, only if REX.W is set ! - * We had to wait with this test, since the operand size may be a mandatory prefix, - * and we know it only after prefetching. - */ - if ((ps->prefixExtType == PET_REX) && - (ps->decodedPrefixes & INST_PRE_OP_SIZE) && - (!ps->isOpSizeMandatory) && - (vrex & PREFIX_EX_W)) { - ps->decodedPrefixes &= ~INST_PRE_OP_SIZE; - prefixes_ignore(ps, PFXIDX_OP_SIZE); - } - - /* - * In this point we know the instruction we are about to decode and its operands (unless, it's an invalid one!), - * so it makes it the right time for decoding-type suitability testing. - * Which practically means, don't allow 32 bits instructions in 16 bits decoding mode, but do allow - * 16 bits instructions in 32 bits decoding mode, of course... - - * NOTE: Make sure the instruction set for 32 bits has explicitly this specific flag set. - * NOTE2: Make sure the instruction set for 64 bits has explicitly this specific flag set. - - * If this is the case, drop what we've got and restart all over after DB'ing that byte. - - * Though, don't drop an instruction which is also supported in 16 and 32 bits. - */ - - /* ! ! ! DISABLED UNTIL FURTHER NOTICE ! ! ! Decode16Bits CAN NOW DECODE 32 BITS INSTRUCTIONS ! ! !*/ - /* if (ii && (dt == Decode16Bits) && (instFlags & INST_32BITS) && (~instFlags & INST_16BITS)) ii = NULL; */ - - /* Drop instructions which are invalid in 64 bits. */ - if ((ci->dt == Decode64Bits) && (instFlags & INST_INVALID_64BITS)) goto _Undecodable; - - /* If it's only a 64 bits instruction drop it in other decoding modes. */ - if ((ci->dt != Decode64Bits) && (instFlags & INST_64BITS_FETCH)) goto _Undecodable; - - if (instFlags & INST_MODRM_REQUIRED) { - /* If the ModRM byte is not part of the opcode, skip the last byte code, so code points now to ModRM. */ - if (~instFlags & INST_MODRM_INCLUDED) { - ci->code++; - if (--ci->codeLen < 0) goto _Undecodable; - } - modrm = *ci->code; - - /* Some instructions enforce that reg=000, so validate that. (Specifically EXTRQ). */ - if ((instFlags & INST_FORCE_REG0) && (((modrm >> 3) & 7) != 0)) goto _Undecodable; - /* Some instructions enforce that mod=11, so validate that. */ - if ((instFlags & INST_MODRR_REQUIRED) && (modrm < INST_DIVIDED_MODRM)) goto _Undecodable; - } - - ci->code++; /* Skip the last byte we just read (either last opcode's byte code or a ModRM). */ - - /* Cache the effective operand-size and address-size. */ - effOpSz = decode_get_effective_op_size(ci->dt, ps->decodedPrefixes, vrex, instFlags); - effAdrSz = decode_get_effective_addr_size(ci->dt, ps->decodedPrefixes); - - memset(di, 0, sizeof(_DInst)); - di->base = R_NONE; - - /* - * Try to extract the next operand only if the latter exists. - * For example, if there is not first operand, no reason to try to extract second operand... - * I decided that a for-break is better for readability in this specific case than goto. - * Note: do-while with a constant 0 makes the compiler warning about it. - */ - for (;;) { - if (isi->d != OT_NONE) { - if (!operands_extract(ci, di, ii, instFlags, (_OpType)isi->d, ONT_1, modrm, ps, effOpSz, effAdrSz, &lockable)) goto _Undecodable; - } else break; - - if (isi->s != OT_NONE) { - if (!operands_extract(ci, di, ii, instFlags, (_OpType)isi->s, ONT_2, modrm, ps, effOpSz, effAdrSz, NULL)) goto _Undecodable; - } else break; - - /* Use third operand, only if the flags says this InstInfo requires it. */ - if (instFlags & INST_USE_OP3) { - if (!operands_extract(ci, di, ii, instFlags, (_OpType)((_InstInfoEx*)ii)->op3, ONT_3, modrm, ps, effOpSz, effAdrSz, NULL)) goto _Undecodable; - } else break; - - /* Support for a fourth operand is added for (i.e:) INSERTQ instruction. */ - if (instFlags & INST_USE_OP4) { - if (!operands_extract(ci, di, ii, instFlags, (_OpType)((_InstInfoEx*)ii)->op4, ONT_4, modrm, ps, effOpSz, effAdrSz, NULL)) goto _Undecodable; - } - break; - } /* Continue here after all operands were extracted. */ - - /* If it were a 3DNow! instruction, we will have to find the instruction itself now that we got its operands extracted. */ - if (instFlags & INST_3DNOW_FETCH) { - ii = inst_lookup_3dnow(ci); - if (ii == NULL) goto _Undecodable; - isi = &InstSharedInfoTable[ii->sharedIndex]; - instFlags = FlagsTable[isi->flagsIndex]; - } - - /* Check whether pseudo opcode is needed, only for CMP instructions: */ - if (instFlags & INST_PSEUDO_OPCODE) { - if (--ci->codeLen < 0) goto _Undecodable; - cmpType = *ci->code; - ci->code++; - if (instFlags & INST_PRE_VEX) { - /* AVX Comparison type must be between 0 to 32, otherwise Reserved. */ - if (cmpType >= INST_VCMP_MAX_RANGE) goto _Undecodable; - } else { - /* SSE Comparison type must be between 0 to 8, otherwise Reserved. */ - if (cmpType >= INST_CMP_MAX_RANGE) goto _Undecodable; - } - } - - /* - * There's a limit of 15 bytes on instruction length. The only way to violate - * this limit is by putting redundant prefixes before an instruction. - * start points to first prefix if any, otherwise it points to instruction first byte. - */ - if ((ci->code - ps->start) > INST_MAXIMUM_SIZE) goto _Undecodable; /* Drop instruction. */ - - /* - * If we reached here the instruction was fully decoded, we located the instruction in the DB and extracted operands. - * Use the correct mnemonic according to the DT. - * If we are in 32 bits decoding mode it doesn't necessarily mean we will choose mnemonic2, alas, - * it means that if there is a mnemonic2, it will be used. - */ - - /* Start with prefix LOCK. */ - if ((lockable == TRUE) && (instFlags & INST_PRE_LOCK)) { - ps->usedPrefixes |= INST_PRE_LOCK; - di->flags |= FLAG_LOCK; - } else if ((instFlags & INST_PRE_REPNZ) && (ps->decodedPrefixes & INST_PRE_REPNZ)) { - ps->usedPrefixes |= INST_PRE_REPNZ; - di->flags |= FLAG_REPNZ; - } else if ((instFlags & INST_PRE_REP) && (ps->decodedPrefixes & INST_PRE_REP)) { - ps->usedPrefixes |= INST_PRE_REP; - di->flags |= FLAG_REP; - } - - /* If it's JeCXZ the ADDR_SIZE prefix affects them. */ - if ((instFlags & (INST_PRE_ADDR_SIZE | INST_USE_EXMNEMONIC)) == (INST_PRE_ADDR_SIZE | INST_USE_EXMNEMONIC)) { - ps->usedPrefixes |= INST_PRE_ADDR_SIZE; - if (effAdrSz == Decode16Bits) di->opcode = ii->opcodeId; - else if (effAdrSz == Decode32Bits) di->opcode = ((_InstInfoEx*)ii)->opcodeId2; - /* Ignore REX.W in 64bits, JECXZ is promoted. */ - else /* Decode64Bits */ di->opcode = ((_InstInfoEx*)ii)->opcodeId3; - } - - /* LOOPxx instructions are also native instruction, but they are special case ones, ADDR_SIZE prefix affects them. */ - else if ((instFlags & (INST_PRE_ADDR_SIZE | INST_NATIVE)) == (INST_PRE_ADDR_SIZE | INST_NATIVE)) { - di->opcode = ii->opcodeId; - - /* If LOOPxx gets here from 64bits, it must be Decode32Bits because Address Size prefix is set. */ - ps->usedPrefixes |= INST_PRE_ADDR_SIZE; - } - /* - * Note: - * If the instruction is prefixed by operand size we will format it in the non-default decoding mode! - * So there might be a situation that an instruction of 32 bit gets formatted in 16 bits decoding mode. - * Both ways should end up with a correct and expected formatting of the text. - */ - else if (effOpSz == Decode16Bits) { /* Decode16Bits */ - - /* Set operand size. */ - FLAG_SET_OPSIZE(di, Decode16Bits); - - /* - * If it's a special instruction which has two mnemonics, then use the 16 bits one + update usedPrefixes. - * Note: use 16 bits mnemonic if that instruction supports 32 bit or 64 bit explicitly. - */ - if ((instFlags & INST_USE_EXMNEMONIC) && ((instFlags & (INST_32BITS | INST_64BITS)) == 0)) ps->usedPrefixes |= INST_PRE_OP_SIZE; - di->opcode = ii->opcodeId; - } else if (effOpSz == Decode32Bits) { /* Decode32Bits */ - - /* Set operand size. */ - FLAG_SET_OPSIZE(di, Decode32Bits); - - /* Give a chance for special mnemonic instruction in 32 bits decoding. */ - if (instFlags & INST_USE_EXMNEMONIC) { - ps->usedPrefixes |= INST_PRE_OP_SIZE; - /* Is it a special instruction which has another mnemonic for mod=11 ? */ - if (instFlags & INST_MNEMONIC_MODRM_BASED) { - if (modrm >= INST_DIVIDED_MODRM) di->opcode = ii->opcodeId; - else di->opcode = ((_InstInfoEx*)ii)->opcodeId2; - } else di->opcode = ((_InstInfoEx*)ii)->opcodeId2; - } else di->opcode = ii->opcodeId; - } else { /* Decode64Bits, note that some instructions might be decoded in Decode32Bits above. */ - - /* Set operand size. */ - FLAG_SET_OPSIZE(di, Decode64Bits); - - if (instFlags & (INST_USE_EXMNEMONIC | INST_USE_EXMNEMONIC2)) { - /* - * We shouldn't be here for MODRM based mnemonics with a MOD=11, - * because they must not use REX (otherwise it will get to the wrong instruction which share same opcode). - * See XRSTOR and XSAVEOPT. - */ - if ((instFlags & INST_MNEMONIC_MODRM_BASED) && (modrm >= INST_DIVIDED_MODRM)) goto _Undecodable; - - /* Use third mnemonic, for 64 bits. */ - if ((instFlags & INST_USE_EXMNEMONIC2) && (vrex & PREFIX_EX_W)) { - ps->usedPrefixes |= INST_PRE_REX; - di->opcode = ((_InstInfoEx*)ii)->opcodeId3; - } else di->opcode = ((_InstInfoEx*)ii)->opcodeId2; /* Use second mnemonic. */ - } else di->opcode = ii->opcodeId; - } - - /* If it's a native instruction use OpSize Prefix. */ - if ((instFlags & INST_NATIVE) && (ps->decodedPrefixes & INST_PRE_OP_SIZE)) ps->usedPrefixes |= INST_PRE_OP_SIZE; - - /* Check VEX mnemonics: */ - if ((instFlags & INST_PRE_VEX) && - (((((_InstInfoEx*)ii)->flagsEx & INST_MNEMONIC_VEXW_BASED) && (vrex & PREFIX_EX_W)) || - ((((_InstInfoEx*)ii)->flagsEx & INST_MNEMONIC_VEXL_BASED) && (vrex & PREFIX_EX_L)))) { - di->opcode = ((_InstInfoEx*)ii)->opcodeId2; - } - - /* Or is it a special CMP instruction which needs a pseudo opcode suffix ? */ - if (instFlags & INST_PSEUDO_OPCODE) { - /* - * The opcodeId is the offset to the FIRST pseudo compare mnemonic, - * we will have to fix it so it offsets into the corrected mnemonic. - * Therefore, we use another table to fix the offset. - */ - if (instFlags & INST_PRE_VEX) { - /* Use the AVX pseudo compare mnemonics table. */ - di->opcode = ii->opcodeId + VCmpMnemonicOffsets[cmpType]; - } else { - /* Use the SSE pseudo compare mnemonics table. */ - di->opcode = ii->opcodeId + CmpMnemonicOffsets[cmpType]; - } - } - - /* - * Store the address size inside the flags. - * This is necessary for the caller to know the size of rSP when using PUSHA for example. - */ - FLAG_SET_ADDRSIZE(di, effAdrSz); - - /* Copy DST_WR flag. */ - if (instFlags & INST_DST_WR) di->flags |= FLAG_DST_WR; - - /* Set the unused prefixes mask. */ - di->unusedPrefixesMask = prefixes_set_unused_mask(ps); - - /* Fix privileged. Assumes the privilegedFlag is 0x8000 only. */ - di->flags |= privilegedFlag; - - /* Copy instruction meta. */ - di->meta = isi->meta; - if (di->segment == 0) di->segment = R_NONE; - - /* Take into account the O_MEM base register for the mask. */ - if (di->base != R_NONE) di->usedRegistersMask |= _REGISTERTORCLASS[di->base]; - - /* Copy CPU affected flags. */ - CONVERT_FLAGS_TO_EFLAGS(di, isi, modifiedFlagsMask); - CONVERT_FLAGS_TO_EFLAGS(di, isi, testedFlagsMask); - CONVERT_FLAGS_TO_EFLAGS(di, isi, undefinedFlagsMask); - - /* Calculate the size of the instruction we've just decoded. */ - di->size = (uint8_t)((ci->code - startCode) & 0xff); - return DECRES_SUCCESS; - -_Undecodable: /* If the instruction couldn't be decoded for some reason, drop the first byte. */ - memset(di, 0, sizeof(_DInst)); - di->base = R_NONE; - - di->size = 1; - /* Clean prefixes just in case... */ - ps->usedPrefixes = 0; - - /* Special case for WAIT instruction: If it's dropped, you have to return a valid instruction! */ - if (*startCode == INST_WAIT_INDEX) { - di->opcode = I_WAIT; - META_SET_ISC(di, ISC_INTEGER); - return DECRES_SUCCESS; - } - - /* Mark that we didn't manage to decode the instruction well, caller will drop it. */ - return DECRES_INPUTERR; -} - -/* - * decode_internal - * - * supportOldIntr - Since now we work with new structure instead of the old _DecodedInst, we are still interested in backward compatibility. - * So although, the array is now of type _DInst, we want to read it in jumps of the old array element's size. - * This is in order to save memory allocation for conversion between the new and the old structures. - * It really means we can do the conversion in-place now. - */ -_DecodeResult decode_internal(_CodeInfo* _ci, int supportOldIntr, _DInst result[], unsigned int maxResultCount, unsigned int* usedInstructionsCount) -{ - _PrefixState ps; - unsigned int prefixSize; - _CodeInfo ci; - unsigned int features; - unsigned int mfc; - - _OffsetType codeOffset = _ci->codeOffset; - const uint8_t* code = _ci->code; - int codeLen = _ci->codeLen; - - /* - * This is used for printing only, it is the real offset of where the whole instruction begins. - * We need this variable in addition to codeOffset, because prefixes might change the real offset an instruction begins at. - * So we keep track of both. - */ - _OffsetType startInstOffset = 0; - - const uint8_t* p; - - /* Current working decoded instruction in results. */ - unsigned int nextPos = 0; - _DInst *pdi = NULL; - - _OffsetType addrMask = (_OffsetType)-1; - - _DecodeResult decodeResult; - -#ifdef DISTORM_LIGHT - supportOldIntr; /* Unreferenced. */ - - /* - * Only truncate address if we are using the decompose interface. - * Otherwise, we use the textual interface which needs full addresses for formatting bytes output. - * So distorm_format will truncate later. - */ - if (_ci->features & DF_MAXIMUM_ADDR32) addrMask = 0xffffffff; - else if (_ci->features & DF_MAXIMUM_ADDR16) addrMask = 0xffff; -#endif - - /* No entries are used yet. */ - *usedInstructionsCount = 0; - ci.dt = _ci->dt; - _ci->nextOffset = codeOffset; - - /* Decode instructions as long as we have what to decode/enough room in entries. */ - while (codeLen > 0) { - - /* startInstOffset holds the displayed offset of current instruction. */ - startInstOffset = codeOffset; - - memset(&ps, 0, (size_t)((char*)&ps.pfxIndexer[0] - (char*)&ps)); - memset(ps.pfxIndexer, PFXIDX_NONE, sizeof(int) * PFXIDX_MAX); - ps.start = code; - ps.last = code; - prefixSize = 0; - - if (prefixes_is_valid(*code, ci.dt)) { - prefixes_decode(code, codeLen, &ps, ci.dt); - /* Count prefixes, start points to first prefix. */ - prefixSize = (unsigned int)(ps.last - ps.start); - /* - * It might be that we will just notice that we ran out of bytes, or only prefixes - * so we will have to drop everything and halt. - * Also take into consideration of flow control instruction filter. - */ - codeLen -= prefixSize; - if ((codeLen == 0) || (prefixSize == INST_MAXIMUM_SIZE)) { - if (~_ci->features & DF_RETURN_FC_ONLY) { - /* Make sure there is enough room. */ - if (nextPos + (ps.last - code) > maxResultCount) return DECRES_MEMORYERR; - - for (p = code; p < ps.last; p++, startInstOffset++) { - /* Use next entry. */ -#ifndef DISTORM_LIGHT - if (supportOldIntr) { - pdi = (_DInst*)((char*)result + nextPos * sizeof(_DecodedInst)); - } - else -#endif /* DISTORM_LIGHT */ - { - pdi = &result[nextPos]; - } - nextPos++; - memset(pdi, 0, sizeof(_DInst)); - - pdi->flags = FLAG_NOT_DECODABLE; - pdi->imm.byte = *p; - pdi->size = 1; - pdi->addr = startInstOffset & addrMask; - } - *usedInstructionsCount = nextPos; /* Include them all. */ - } - if (codeLen == 0) break; /* Bye bye, out of bytes. */ - } - code += prefixSize; - codeOffset += prefixSize; - - /* If we got only prefixes continue to next instruction. */ - if (prefixSize == INST_MAXIMUM_SIZE) continue; - } - - /* - * Now we decode the instruction and only then we do further prefixes handling. - * This is because the instruction could not be decoded at all, or an instruction requires - * a mandatory prefix, or some of the prefixes were useless, etc... - - * Even if there were a mandatory prefix, we already took into account its size as a normal prefix. - * so prefixSize includes that, and the returned size in pdi is simply the size of the real(=without prefixes) instruction. - */ - if (ci.dt == Decode64Bits) { - if (ps.decodedPrefixes & INST_PRE_REX) { - /* REX prefix must precede first byte of instruction. */ - if (ps.rexPos != (code - 1)) { - ps.decodedPrefixes &= ~INST_PRE_REX; - ps.prefixExtType = PET_NONE; - prefixes_ignore(&ps, PFXIDX_REX); - } - /* - * We will disable operand size prefix, - * if it exists only after decoding the instruction, since it might be a mandatory prefix. - * This will be done after calling inst_lookup in decode_inst. - */ - } - /* In 64 bits, segment overrides of CS, DS, ES and SS are ignored. So don't take'em into account. */ - if (ps.decodedPrefixes & INST_PRE_SEGOVRD_MASK32) { - ps.decodedPrefixes &= ~INST_PRE_SEGOVRD_MASK32; - prefixes_ignore(&ps, PFXIDX_SEG); - } - } - - /* Make sure there is at least one more entry to use, for the upcoming instruction. */ - if (nextPos + 1 > maxResultCount) return DECRES_MEMORYERR; -#ifndef DISTORM_LIGHT - if (supportOldIntr) { - pdi = (_DInst*)((char*)result + nextPos * sizeof(_DecodedInst)); - } - else -#endif /* DISTORM_LIGHT */ - { - pdi = &result[nextPos]; - } - nextPos++; - - /* - * The reason we copy these two again is because we have to keep track on the input ourselves. - * There might be a case when an instruction is invalid, and then it will be counted as one byte only. - * But that instruction already read a byte or two from the stream and only then returned the error. - * Thus, we end up unsynchronized on the stream. - * This way, we are totally safe, because we keep track after the call to decode_inst, using the returned size. - */ - ci.code = code; - ci.codeLen = codeLen; - /* Nobody uses codeOffset in the decoder itself, so spare it. */ - - decodeResult = decode_inst(&ci, &ps, pdi); - - /* See if we need to filter this instruction. */ - if ((_ci->features & DF_RETURN_FC_ONLY) && (META_GET_FC(pdi->meta) == FC_NONE)) decodeResult = DECRES_FILTERED; - - /* Set address to the beginning of the instruction. */ - pdi->addr = startInstOffset & addrMask; - /* pdi->disp &= addrMask; */ - - if ((decodeResult == DECRES_INPUTERR) && (ps.decodedPrefixes & INST_PRE_VEX)) { - if (ps.prefixExtType == PET_VEX3BYTES) { - prefixSize -= 2; - codeLen += 2; - } else if (ps.prefixExtType == PET_VEX2BYTES) { - prefixSize -= 1; - codeLen += 1; - } - ps.last = ps.start + prefixSize - 1; - code = ps.last + 1; - codeOffset = startInstOffset + prefixSize; - } else { - /* Advance to next instruction. */ - codeLen -= pdi->size; - codeOffset += pdi->size; - code += pdi->size; - - /* Instruction's size should include prefixes. */ - pdi->size += (uint8_t)prefixSize; - } - - /* Drop all prefixes and the instruction itself, because the instruction wasn't successfully decoded. */ - if ((decodeResult == DECRES_INPUTERR) && (~_ci->features & DF_RETURN_FC_ONLY)) { - nextPos--; /* Undo last result. */ - if ((prefixSize + 1) > 0) { /* 1 for the first instruction's byte. */ - if ((nextPos + prefixSize + 1) > maxResultCount) return DECRES_MEMORYERR; - - for (p = ps.start; p < ps.last + 1; p++, startInstOffset++) { - /* Use next entry. */ -#ifndef DISTORM_LIGHT - if (supportOldIntr) { - pdi = (_DInst*)((char*)result + nextPos * sizeof(_DecodedInst)); - } - else -#endif /* DISTORM_LIGHT */ - { - pdi = &result[nextPos]; - } - nextPos++; - - memset(pdi, 0, sizeof(_DInst)); - pdi->flags = FLAG_NOT_DECODABLE; - pdi->imm.byte = *p; - pdi->size = 1; - pdi->addr = startInstOffset & addrMask; - } - } - } else if (decodeResult == DECRES_FILTERED) nextPos--; /* Return it to pool, since it was filtered. */ - - /* Alright, the caller can read, at least, up to this one. */ - *usedInstructionsCount = nextPos; - /* Fix next offset. */ - _ci->nextOffset = codeOffset; - - /* Check whether we need to stop on any flow control instruction. */ - features = _ci->features; - mfc = META_GET_FC(pdi->meta); - if ((decodeResult == DECRES_SUCCESS) && (features & DF_STOP_ON_FLOW_CONTROL)) { - if (((features & DF_STOP_ON_CALL) && (mfc == FC_CALL)) || - ((features & DF_STOP_ON_RET) && (mfc == FC_RET)) || - ((features & DF_STOP_ON_SYS) && (mfc == FC_SYS)) || - ((features & DF_STOP_ON_UNC_BRANCH) && (mfc == FC_UNC_BRANCH)) || - ((features & DF_STOP_ON_CND_BRANCH) && (mfc == FC_CND_BRANCH)) || - ((features & DF_STOP_ON_INT) && (mfc == FC_INT)) || - ((features & DF_STOP_ON_CMOV) && (mfc == FC_CMOV))) - return DECRES_SUCCESS; - } - } - - return DECRES_SUCCESS; -} diff --git a/diStorm/src/decoder.h b/diStorm/src/decoder.h deleted file mode 100644 index 2f9961a..0000000 --- a/diStorm/src/decoder.h +++ /dev/null @@ -1,33 +0,0 @@ -/* -decoder.h - -diStorm3 - Powerful disassembler for X86/AMD64 -http://ragestorm.net/distorm/ -distorm at gmail dot com -Copyright (C) 2011 Gil Dabah - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see -*/ - - -#ifndef DECODER_H -#define DECODER_H - -#include "config.h" - -typedef unsigned int _iflags; - -_DecodeResult decode_internal(_CodeInfo* ci, int supportOldIntr, _DInst result[], unsigned int maxResultCount, unsigned int* usedInstructionsCount); - -#endif /* DECODER_H */ diff --git a/diStorm/src/distorm.c b/diStorm/src/distorm.c deleted file mode 100644 index c09297f..0000000 --- a/diStorm/src/distorm.c +++ /dev/null @@ -1,425 +0,0 @@ -/* -distorm.c - -diStorm3 C Library Interface -diStorm3 - Powerful disassembler for X86/AMD64 -http://ragestorm.net/distorm/ -distorm at gmail dot com -Copyright (C) 2003-2012 Gil Dabah - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see -*/ - - -#include "../include/distorm.h" -#include "config.h" -#include "decoder.h" -#include "x86defs.h" -#include "textdefs.h" -#include "wstring.h" -#include "../include/mnemonics.h" - -/* C DLL EXPORTS */ -#ifdef SUPPORT_64BIT_OFFSET - _DLLEXPORT_ _DecodeResult distorm_decompose64(_CodeInfo* ci, _DInst result[], unsigned int maxInstructions, unsigned int* usedInstructionsCount) -#else - _DLLEXPORT_ _DecodeResult distorm_decompose32(_CodeInfo* ci, _DInst result[], unsigned int maxInstructions, unsigned int* usedInstructionsCount) -#endif -{ - if (usedInstructionsCount == NULL) { - return DECRES_SUCCESS; - } - - /* DECRES_SUCCESS still may indicate we may have something in the result, so zero it first thing. */ - *usedInstructionsCount = 0; - - if ((ci == NULL) || - (ci->codeLen < 0) || - ((ci->dt != Decode16Bits) && (ci->dt != Decode32Bits) && (ci->dt != Decode64Bits)) || - (ci->code == NULL) || - (result == NULL) || - ((ci->features & (DF_MAXIMUM_ADDR16 | DF_MAXIMUM_ADDR32)) == (DF_MAXIMUM_ADDR16 | DF_MAXIMUM_ADDR32))) - { - return DECRES_INPUTERR; - } - - /* Assume length=0 is success. */ - if (ci->codeLen == 0) { - return DECRES_SUCCESS; - } - - return decode_internal(ci, FALSE, result, maxInstructions, usedInstructionsCount); -} - -#ifndef DISTORM_LIGHT - -/* Helper function to concatenate an explicit size when it's unknown from the operands. */ -static void distorm_format_size(_WString* str, const _DInst* di, int opNum) -{ - int isSizingRequired = 0; - /* - * We only have to output the size explicitly if it's not clear from the operands. - * For example: - * mov al, [0x1234] -> The size is 8, we know it from the AL register operand. - * mov [0x1234], 0x11 -> Now we don't know the size. Pam pam pam - * - * If given operand number is higher than 2, then output the size anyways. - */ - isSizingRequired = ((opNum >= 2) || ((di->ops[0].type != O_REG) && (di->ops[1].type != O_REG))); - - /* Still not sure? Try some special instructions. */ - if (!isSizingRequired) { - /* - * INS/OUTS are exception, because DX is a port specifier and not a real src/dst register. - * A few exceptions that always requires sizing: - * MOVZX, MOVSX, MOVSXD. - * ROL, ROR, RCL, RCR, SHL, SHR, SAL, SAR. - * SHLD, SHRD. - */ - switch (di->opcode) - { - case I_INS: - case I_OUTS: - case I_MOVZX: - case I_MOVSX: - case I_MOVSXD: - case I_ROL: - case I_ROR: - case I_RCL: - case I_RCR: - case I_SHL: - case I_SHR: - case I_SAL: - case I_SAR: - case I_SHLD: - case I_SHRD: - isSizingRequired = 1; - break; - default: /* Instruction doesn't require sizing. */ break; - } - } - - if (isSizingRequired) - { - switch (di->ops[opNum].size) - { - case 0: break; /* OT_MEM's unknown size. */ - case 8: strcat_WSN(str, "BYTE "); break; - case 16: strcat_WSN(str, "WORD "); break; - case 32: strcat_WSN(str, "DWORD "); break; - case 64: strcat_WSN(str, "QWORD "); break; - case 80: strcat_WSN(str, "TBYTE "); break; - case 128: strcat_WSN(str, "DQWORD "); break; - case 256: strcat_WSN(str, "YWORD "); break; - default: /* Big oh uh if it gets here. */ break; - } - } -} - -static void distorm_format_signed_disp(_WString* str, const _DInst* di, uint64_t addrMask) -{ - int64_t tmpDisp64; - - if (di->dispSize) { - chrcat_WS(str, ((int64_t)di->disp < 0) ? MINUS_DISP_CHR : PLUS_DISP_CHR); - if ((int64_t)di->disp < 0) tmpDisp64 = -(int64_t)di->disp; - else tmpDisp64 = di->disp; - tmpDisp64 &= addrMask; - str_code_hqw(str, (uint8_t*)&tmpDisp64); - } -} - -#ifdef SUPPORT_64BIT_OFFSET - _DLLEXPORT_ void distorm_format64(const _CodeInfo* ci, const _DInst* di, _DecodedInst* result) -#else - _DLLEXPORT_ void distorm_format32(const _CodeInfo* ci, const _DInst* di, _DecodedInst* result) -#endif -{ - _WString* str; - unsigned int i, isDefault; - int64_t tmpDisp64; - uint64_t addrMask = (uint64_t)-1; - uint8_t segment; - const _WMnemonic* mnemonic; - - /* Set address mask, when default is for 64bits addresses. */ - if (ci->features & DF_MAXIMUM_ADDR32) addrMask = 0xffffffff; - else if (ci->features & DF_MAXIMUM_ADDR16) addrMask = 0xffff; - - /* Copy other fields. */ - result->size = di->size; - result->offset = di->addr; - - if (di->flags == FLAG_NOT_DECODABLE) { - str = &result->mnemonic; - result->offset &= addrMask; - strclear_WS(&result->operands); - strcpy_WSN(str, "DB "); - str_code_hb(str, di->imm.byte); - strclear_WS(&result->instructionHex); - str_hex_b(&result->instructionHex, di->imm.byte); - return; /* Skip to next instruction. */ - } - - str = &result->instructionHex; - strclear_WS(str); - /* Gotta have full address for (di->addr - ci->codeOffset) to work in all modes. */ - for (i = 0; i < di->size; i++) - str_hex_b(str, ci->code[(unsigned int)(di->addr - ci->codeOffset + i)]); - - /* Truncate address now. */ - result->offset &= addrMask; - - str = &result->mnemonic; - switch (FLAG_GET_PREFIX(di->flags)) - { - case FLAG_LOCK: - strcpy_WSN(str, "LOCK "); - break; - case FLAG_REP: - /* REP prefix for CMPS and SCAS is really a REPZ. */ - if ((di->opcode == I_CMPS) || (di->opcode == I_SCAS)) strcpy_WSN(str, "REPZ "); - else strcpy_WSN(str, "REP "); - break; - case FLAG_REPNZ: - strcpy_WSN(str, "REPNZ "); - break; - default: - /* Init mnemonic string, cause next touch is concatenation. */ - strclear_WS(str); - break; - } - - mnemonic = (const _WMnemonic*)&_MNEMONICS[di->opcode]; - memcpy((int8_t*)&str->p[str->length], mnemonic->p, mnemonic->length + 1); - str->length += mnemonic->length; - - /* Format operands: */ - str = &result->operands; - strclear_WS(str); - - /* Special treatment for String instructions. */ - if ((META_GET_ISC(di->meta) == ISC_INTEGER) && - ((di->opcode == I_MOVS) || - (di->opcode == I_CMPS) || - (di->opcode == I_STOS) || - (di->opcode == I_LODS) || - (di->opcode == I_SCAS))) - { - /* - * No operands are needed if the address size is the default one, - * and no segment is overridden, so add the suffix letter, - * to indicate size of operation and continue to next instruction. - */ - if ((FLAG_GET_ADDRSIZE(di->flags) == ci->dt) && (SEGMENT_IS_DEFAULT(di->segment))) { - str = &result->mnemonic; - switch (di->ops[0].size) - { - case 8: chrcat_WS(str, 'B'); break; - case 16: chrcat_WS(str, 'W'); break; - case 32: chrcat_WS(str, 'D'); break; - case 64: chrcat_WS(str, 'Q'); break; - } - return; - } - } - - for (i = 0; ((i < OPERANDS_NO) && (di->ops[i].type != O_NONE)); i++) { - if (i > 0) strcat_WSN(str, ", "); - switch (di->ops[i].type) - { - case O_REG: - strcat_WS(str, (const _WString*)&_REGISTERS[di->ops[i].index]); - break; - case O_IMM: - /* If the instruction is 'push', show explicit size (except byte imm). */ - if ((di->opcode == I_PUSH) && (di->ops[i].size != 8)) distorm_format_size(str, di, i); - /* Special fix for negative sign extended immediates. */ - if ((di->flags & FLAG_IMM_SIGNED) && (di->ops[i].size == 8)) { - if (di->imm.sbyte < 0) { - chrcat_WS(str, MINUS_DISP_CHR); - str_code_hb(str, -di->imm.sbyte); - break; - } - } - if (di->ops[i].size == 64) str_code_hqw(str, (uint8_t*)&di->imm.qword); - else str_code_hdw(str, di->imm.dword); - break; - case O_IMM1: - str_code_hdw(str, di->imm.ex.i1); - break; - case O_IMM2: - str_code_hdw(str, di->imm.ex.i2); - break; - case O_DISP: - distorm_format_size(str, di, i); - chrcat_WS(str, OPEN_CHR); - if ((SEGMENT_GET(di->segment) != R_NONE) && !SEGMENT_IS_DEFAULT(di->segment)) { - strcat_WS(str, (const _WString*)&_REGISTERS[SEGMENT_GET(di->segment)]); - chrcat_WS(str, SEG_OFF_CHR); - } - tmpDisp64 = di->disp & addrMask; - str_code_hqw(str, (uint8_t*)&tmpDisp64); - chrcat_WS(str, CLOSE_CHR); - break; - case O_SMEM: - distorm_format_size(str, di, i); - chrcat_WS(str, OPEN_CHR); - - /* - * This is where we need to take special care for String instructions. - * If we got here, it means we need to explicitly show their operands. - * The problem with CMPS and MOVS is that they have two(!) memory operands. - * So we have to complete it ourselves, since the structure supplies only the segment that can be overridden. - * And make the rest of the String operations explicit. - */ - segment = SEGMENT_GET(di->segment); - isDefault = SEGMENT_IS_DEFAULT(di->segment); - switch (di->opcode) - { - case I_MOVS: - isDefault = FALSE; - if (i == 0) segment = R_ES; - break; - case I_CMPS: - isDefault = FALSE; - if (i == 1) segment = R_ES; - break; - case I_INS: - case I_LODS: - case I_STOS: - case I_SCAS: isDefault = FALSE; break; - } - if (!isDefault && (segment != R_NONE)) { - strcat_WS(str, (const _WString*)&_REGISTERS[segment]); - chrcat_WS(str, SEG_OFF_CHR); - } - - strcat_WS(str, (const _WString*)&_REGISTERS[di->ops[i].index]); - - distorm_format_signed_disp(str, di, addrMask); - chrcat_WS(str, CLOSE_CHR); - break; - case O_MEM: - distorm_format_size(str, di, i); - chrcat_WS(str, OPEN_CHR); - if ((SEGMENT_GET(di->segment) != R_NONE) && !SEGMENT_IS_DEFAULT(di->segment)) { - strcat_WS(str, (const _WString*)&_REGISTERS[SEGMENT_GET(di->segment)]); - chrcat_WS(str, SEG_OFF_CHR); - } - if (di->base != R_NONE) { - strcat_WS(str, (const _WString*)&_REGISTERS[di->base]); - chrcat_WS(str, PLUS_DISP_CHR); - } - strcat_WS(str, (const _WString*)&_REGISTERS[di->ops[i].index]); - if (di->scale != 0) { - chrcat_WS(str, '*'); - if (di->scale == 2) chrcat_WS(str, '2'); - else if (di->scale == 4) chrcat_WS(str, '4'); - else /* if (di->scale == 8) */ chrcat_WS(str, '8'); - } - - distorm_format_signed_disp(str, di, addrMask); - chrcat_WS(str, CLOSE_CHR); - break; - case O_PC: -#ifdef SUPPORT_64BIT_OFFSET - str_off64(str, (di->imm.sqword + di->addr + di->size) & addrMask); -#else - str_code_hdw(str, ((_OffsetType)di->imm.sdword + di->addr + di->size) & (uint32_t)addrMask); -#endif - break; - case O_PTR: - str_code_hdw(str, di->imm.ptr.seg); - chrcat_WS(str, SEG_OFF_CHR); - str_code_hdw(str, di->imm.ptr.off); - break; - } - } - - if (di->flags & FLAG_HINT_TAKEN) strcat_WSN(str, " ;TAKEN"); - else if (di->flags & FLAG_HINT_NOT_TAKEN) strcat_WSN(str, " ;NOT TAKEN"); -} - -#ifdef SUPPORT_64BIT_OFFSET - _DLLEXPORT_ _DecodeResult distorm_decode64(_OffsetType codeOffset, const unsigned char* code, int codeLen, _DecodeType dt, _DecodedInst result[], unsigned int maxInstructions, unsigned int* usedInstructionsCount) -#else - _DLLEXPORT_ _DecodeResult distorm_decode32(_OffsetType codeOffset, const unsigned char* code, int codeLen, _DecodeType dt, _DecodedInst result[], unsigned int maxInstructions, unsigned int* usedInstructionsCount) -#endif -{ - _DecodeResult res; - _DInst di; - _CodeInfo ci; - unsigned int instsCount = 0, i; - - *usedInstructionsCount = 0; - - /* I use codeLen as a signed variable in order to ease detection of underflow... and besides - */ - if (codeLen < 0) { - return DECRES_INPUTERR; - } - - if ((dt != Decode16Bits) && (dt != Decode32Bits) && (dt != Decode64Bits)) { - return DECRES_INPUTERR; - } - - if (code == NULL || result == NULL) { - return DECRES_INPUTERR; - } - - /* Assume length=0 is success. */ - if (codeLen == 0) { - return DECRES_SUCCESS; - } - - /* - * We have to format the result into text. But the interal decoder works with the new structure of _DInst. - * Therefore, we will pass the result array(!) from the caller and the interal decoder will fill it in with _DInst's. - * Then we will copy each result to a temporary structure, and use it to reformat that specific result. - * - * This is all done to save memory allocation and to work on the same result array in-place!!! - * It's a bit ugly, I have to admit, but worth it. - */ - - ci.codeOffset = codeOffset; - ci.code = code; - ci.codeLen = codeLen; - ci.dt = dt; - ci.features = DF_NONE; - if (dt == Decode16Bits) ci.features = DF_MAXIMUM_ADDR16; - else if (dt == Decode32Bits) ci.features = DF_MAXIMUM_ADDR32; - - res = decode_internal(&ci, TRUE, (_DInst*)result, maxInstructions, &instsCount); - for (i = 0; i < instsCount; i++) { - if ((*usedInstructionsCount + i) >= maxInstructions) return DECRES_MEMORYERR; - - /* Copy the current decomposed result to a temp structure, so we can override the result with text. */ - memcpy(&di, (char*)result + (i * sizeof(_DecodedInst)), sizeof(_DInst)); -#ifdef SUPPORT_64BIT_OFFSET - distorm_format64(&ci, &di, &result[i]); -#else - distorm_format32(&ci, &di, &result[i]); -#endif - } - - *usedInstructionsCount = instsCount; - return res; -} - -#endif /* DISTORM_LIGHT */ - -_DLLEXPORT_ unsigned int distorm_version() -{ - return __DISTORMV__; -} diff --git a/diStorm/src/instructions.c b/diStorm/src/instructions.c deleted file mode 100644 index b0193e7..0000000 --- a/diStorm/src/instructions.c +++ /dev/null @@ -1,593 +0,0 @@ -/* -instructions.c - -diStorm3 - Powerful disassembler for X86/AMD64 -http://ragestorm.net/distorm/ -distorm at gmail dot com -Copyright (C) 2003-2012 Gil Dabah - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see -*/ - - -#include "instructions.h" - -#include "insts.h" -#include "prefix.h" -#include "x86defs.h" -#include "../include/mnemonics.h" - - -/* Helper macros to extract the type or index from an inst-node value. */ -#define INST_NODE_INDEX(n) ((n) & 0x1fff) -#define INST_NODE_TYPE(n) ((n) >> 13) - -/* Helper macro to read the actual flags that are associated with an inst-info. */ -#define INST_INFO_FLAGS(ii) (FlagsTable[InstSharedInfoTable[(ii)->sharedIndex].flagsIndex]) - -/* -I use the trie data structure as I found it most fitting to a disassembler mechanism. -When you read a byte and have to decide if it's enough or you should read more bytes, 'till you get to the instruction information. -It's really fast because you POP the instruction info in top 3 iterates on the DB, because an instruction can be formed from two bytes + 3 bits reg from the ModR/M byte. -For a simple explanation, check this out: -http://www.csse.monash.edu.au/~lloyd/tildeAlgDS/Tree/Trie/ -Further reading: http://en.wikipedia.org/wiki/Trie - -The first GATE (array you read off a trie data structure), as I call them, is statically allocated by the compiler. -The second and third gates if used are being allocated dynamically by the instructions-insertion functionality. - -How would such a thing look in memory, say we support 4 instructions with 3 bytes top (means 2 dynamically allocated gates). - --> -|-------| 0, -|0| -------------------------------> |-------| -|1|RET | 1, |0|AND | -|2| -----> |-------| |1|XOR | -|3|INT3 | |0|PUSH | |2|OR | 0,3, -|-------| |1|POP | |3| --------->|-------| - |2|PUSHF| |-------| |0|ROR | - |3|POPF | |1|ROL | - |-------| |2|SHR | - |3|SHL | - |-------| - -Of course, this is NOT how Intel instructions set looks!!! -but I just wanted to give a small demonstration. -Now the instructions you get from such a trie DB goes like this: - -0, 0 - AND -0, 1 - XOR -0, 2 - OR -0, 3, 0, ROR -0, 3, 1, ROL -0, 3, 2, SHR -0, 3, 3, SHL -1 - RET -2, 0 - PUSH -2, 1 - POP -2, 2 - PUSHF -2, 3 - POPF -3 - INT3 - -I guess it's clear by now. -So now, if you read 0, you know that you have to enter the second gate(list) with the second byte specifying the index. -But if you read 1, you know that you go to an instruction (in this case, a RET). -That's why there's an Instruction-Node structure, it tells you whether you got to an instruction or another list -so you should keep on reading byte). - -In Intel, you could go through 4 gates at top, because there are instructions which are built from 2 bytes and another smaller list -for the REG part, or newest SSE4 instructions which use 4 bytes for opcode. -Therefore, Intel's first gate is 256 long, and other gates are 256 (/72) or 8 long, yes, it costs pretty much a lot of memory -for non-used defined instructions, but I think that it still rocks. -*/ - -/* - * A helper function to look up the correct inst-info structure. - * It does one fetch from the index-table, and then another to get the inst-info. - * Note that it takes care about basic inst-info or inst-info-ex. - * The caller should worry about boundary checks and whether it accesses a last-level table. - */ -static _InstInfo* inst_get_info(_InstNode in, int index) -{ - int instIndex = 0; - - in = InstructionsTree[INST_NODE_INDEX(in) + index]; - if (in == INT_NOTEXISTS) return NULL; - - instIndex = INST_NODE_INDEX(in); - return INST_NODE_TYPE(in) == INT_INFO ? &InstInfos[instIndex] : (_InstInfo*)&InstInfosEx[instIndex]; -} - -/* - * This function is responsible to return the instruction information of the first found in code. - * It returns the _InstInfo of the found instruction, otherwise NULL. - * code should point to the ModR/M byte upon exit (if used), or after the instruction binary code itself. - * This function is NOT decoding-type dependant, it is up to the caller to see whether the instruction is valid. - * Get the instruction info, using a Trie data structure. - * - * Sometimes normal prefixes become mandatory prefixes, which means they are now part of the instruction opcode bytes. - - * This is a bit tricky now, - * if the first byte is a REP (F3) prefix, we will have to give a chance to an SSE instruction. - * If an instruction doesn't exist, we will make it as a prefix and re-locateinst. - * A case such that a REP prefix is being changed into an instruction byte and also an SSE instruction will not be found can't happen, - * simply because there are no collisions between string instruction and SSE instructions (they are escaped). - - * As for S/SSE2/3, check for F2 and 66 as well. - - * In 64 bits, we have to make sure that we will skip the REX prefix, if it exists. - * There's a specific case, where a 66 is mandatory but it was dropped because REG.W was used, - * but it doesn't behave as an operand size prefix but as a mandatory, so we will have to take it into account. - - * For example (64 bits decoding mode): - * 66 98 CBW - * 48 98 CDQE - * 66 48 98: db 0x66; CDQE - * Shows that operand size is dropped. - - * Now, it's a mandatory prefix and NOT an operand size one. - * 66480f2dc0 db 0x48; CVTPD2PI XMM0, XMM0 - * Although this instruction doesn't require a REX.W, it just shows, that even if it did - it doesn't matter. - * REX.W is dropped because it's not required, but the decode function disabled the operand size even so. - */ -static _InstInfo* inst_lookup_prefixed(_InstNode in, _PrefixState* ps) -{ - int checkOpSize = FALSE; - int index = 0; - _InstInfo* ii = NULL; - - /* Check prefixes of current decoded instruction (None, 0x66, 0xf3, 0xf2). */ - switch (ps->decodedPrefixes & (INST_PRE_OP_SIZE | INST_PRE_REPS)) - { - case 0: - /* Non-prefixed, index = 0. */ - index = 0; - break; - case INST_PRE_OP_SIZE: - /* 0x66, index = 1. */ - index = 1; - /* Mark that we used it as a mandatory prefix. */ - ps->isOpSizeMandatory = TRUE; - ps->decodedPrefixes &= ~INST_PRE_OP_SIZE; - break; - case INST_PRE_REP: - /* 0xf3, index = 2. */ - index = 2; - ps->decodedPrefixes &= ~INST_PRE_REP; - break; - case INST_PRE_REPNZ: - /* 0xf2, index = 3. */ - index = 3; - ps->decodedPrefixes &= ~INST_PRE_REPNZ; - break; - default: - /* - * Now we got a problem, since there are a few mandatory prefixes at once. - * There is only one case when it's ok, when the operand size prefix is for real (not mandatory). - * Otherwise we will have to return NULL, since the instruction is illegal. - * Therefore we will start with REPNZ and REP prefixes, - * try to get the instruction and only then check for the operand size prefix. - */ - - /* If both REPNZ and REP are together, it's illegal for sure. */ - if ((ps->decodedPrefixes & INST_PRE_REPS) == INST_PRE_REPS) return NULL; - - /* Now we know it's either REPNZ+OPSIZE or REP+OPSIZE, so examine the instruction. */ - if (ps->decodedPrefixes & INST_PRE_REPNZ) { - index = 3; - ps->decodedPrefixes &= ~INST_PRE_REPNZ; - } else if (ps->decodedPrefixes & INST_PRE_REP) { - index = 2; - ps->decodedPrefixes &= ~INST_PRE_REP; - } - /* Mark to verify the operand-size prefix of the fetched instruction below. */ - checkOpSize = TRUE; - break; - } - - /* Fetch the inst-info from the index. */ - ii = inst_get_info(in, index); - - if (checkOpSize) { - /* If the instruction doesn't support operand size prefix, then it's illegal. */ - if ((ii == NULL) || (~INST_INFO_FLAGS(ii) & INST_PRE_OP_SIZE)) return NULL; - } - - /* If there was a prefix, but the instruction wasn't found. Try to fall back to use the normal instruction. */ - if (ii == NULL) ii = inst_get_info(in, 0); - return ii; -} - -/* A helper function to look up special VEX instructions. - * See if it's a MOD based instruction and fix index if required. - * Only after a first lookup (that was done by caller), we can tell if we need to fix the index. - * Because these are coupled instructions - * (which means that the base instruction hints about the other instruction). - * Note that caller should check if it's a MOD dependent instruction before getting in here. - */ -static _InstInfo* inst_vex_mod_lookup(_CodeInfo* ci, _InstNode in, _InstInfo* ii, unsigned int index) -{ - /* Advance to read the MOD from ModRM byte. */ - ci->code += 1; - ci->codeLen -= 1; - if (ci->codeLen < 0) return NULL; - if (*ci->code < INST_DIVIDED_MODRM) { - /* MOD is not 11, therefore change the index to 8 - 12 range in the prefixed table. */ - index += 4; - /* Make a second lookup for this special instruction. */ - return inst_get_info(in, index); - } - /* Return the original one, in case we didn't find a suited instruction. */ - return ii; -} - -static _InstInfo* inst_vex_lookup(_CodeInfo* ci, _PrefixState* ps) -{ - _InstNode in = 0; - unsigned int pp = 0, start = 0; - unsigned int index = 4; /* VEX instructions start at index 4 in the Prefixed table. */ - uint8_t vex = *ps->vexPos, vex2 = 0, v = 0; - int instType = 0, instIndex = 0; - - /* The VEX instruction will #ud if any of 66, f0, f2, f3, REX prefixes precede. */ - _iflags illegal = (INST_PRE_OP_SIZE | INST_PRE_LOCK | INST_PRE_REP | INST_PRE_REPNZ | INST_PRE_REX); - if ((ps->decodedPrefixes & illegal) != 0) return NULL; - - /* Read the some fields from the VEX prefix we need to extract the instruction. */ - if (ps->prefixExtType == PET_VEX2BYTES) { - ps->vexV = v = (~vex >> 3) & 0xf; - pp = vex & 3; - /* Implied leading 0x0f byte by default for 2 bytes VEX prefix. */ - start = 1; - } else { /* PET_VEX3BYTES */ - start = vex & 0x1f; - vex2 = *(ps->vexPos + 1); - ps->vexV = v = (~vex2 >> 3) & 0xf; - pp = vex2 & 3; - } - - /* start can be either 1 (0x0f), 2 (0x0f, 0x038) or 3 (0x0f, 0x3a), otherwise it's illegal. */ - switch (start) - { - case 1: in = Table_0F; break; - case 2: in = Table_0F_38; break; - case 3: in = Table_0F_3A; break; - default: return NULL; - } - - /* pp is actually the implied mandatory prefix, apply it to the index. */ - index += pp; /* (None, 0x66, 0xf3, 0xf2) */ - - /* Read a byte from the stream. */ - ci->codeLen -= 1; - if (ci->codeLen < 0) return NULL; - - in = InstructionsTree[INST_NODE_INDEX(in) + *ci->code]; - if (in == INT_NOTEXISTS) return NULL; - - instType = INST_NODE_TYPE(in); - instIndex = INST_NODE_INDEX(in); - - /* - * If we started with 0f38 or 0f3a so it's a prefixed table, - * therefore it's surely a VEXed instruction (because of a high index). - * However, starting with 0f, could also lead immediately to a prefixed table for some bytes. - * it might return NULL, if the index is invalid. - */ - if (instType == INT_LIST_PREFIXED) { - _InstInfo* ii = inst_get_info(in, index); - /* See if the instruction is dependent on MOD. */ - if ((ii != NULL) && (((_InstInfoEx*)ii)->flagsEx & INST_MODRR_BASED)) { - ii = inst_vex_mod_lookup(ci, in, ii, index); - } - return ii; - } - - /* - * If we reached here, obviously we started with 0f. VEXed instructions must be nodes of a prefixed table. - * But since we found an instruction (or divided one), just return NULL. - * They cannot lead to a VEXed instruction. - */ - if ((instType == INT_INFO) || (instType == INT_INFOEX) || (instType == INT_LIST_DIVIDED)) return NULL; - - /* Now we are left with handling either GROUP or FULL tables, therefore we will read another byte from the stream. */ - ci->code += 1; - ci->codeLen -= 1; - if (ci->codeLen < 0) return NULL; - - if (instType == INT_LIST_GROUP) { - in = InstructionsTree[instIndex + ((*ci->code >> 3) & 7)]; - /* Continue below to check prefixed table. */ - } else if (instType == INT_LIST_FULL) { - in = InstructionsTree[instIndex + *ci->code]; - /* Continue below to check prefixed table. */ - } - - /* Now that we got to the last table in the trie, check for a prefixed table. */ - if (INST_NODE_TYPE(in) == INT_LIST_PREFIXED) { - _InstInfo* ii = inst_get_info(in, index); - /* See if the instruction is dependent on MOD. */ - if ((ii != NULL) && (((_InstInfoEx*)ii)->flagsEx & INST_MODRR_BASED)) { - ii = inst_vex_mod_lookup(ci, in, ii, index); - } - return ii; - } - - /* No VEXed instruction was found. */ - return NULL; -} - -_InstInfo* inst_lookup(_CodeInfo* ci, _PrefixState* ps) -{ - unsigned int tmpIndex0 = 0, tmpIndex1 = 0, tmpIndex2 = 0, rex = ps->vrex; - int instType = 0; - _InstNode in = 0; - _InstInfo* ii = NULL; - int isWaitIncluded = FALSE; - - /* See whether we have to handle a VEX prefixed instruction. */ - if (ps->decodedPrefixes & INST_PRE_VEX) { - ii = inst_vex_lookup(ci, ps); - if (ii != NULL) { - /* Make sure that VEX.L exists when forced. */ - if ((((_InstInfoEx*)ii)->flagsEx & INST_FORCE_VEXL) && (~ps->vrex & PREFIX_EX_L)) return NULL; - /* If the instruction doesn't use VEX.vvvv it must be zero. */ - if ((((_InstInfoEx*)ii)->flagsEx & INST_VEX_V_UNUSED) && ps->vexV) return NULL; - } - return ii; - } - - /* Read first byte. */ - ci->codeLen -= 1; - if (ci->codeLen < 0) return NULL; - tmpIndex0 = *ci->code; - - /* Check for special 0x9b, WAIT instruction, which can be part of some instructions(x87). */ - if (tmpIndex0 == INST_WAIT_INDEX) { - /* Only OCST_1dBYTES get a chance to include this byte as part of the opcode. */ - isWaitIncluded = TRUE; - - /* Ignore all prefixes, since they are useless and operate on the WAIT instruction itself. */ - prefixes_ignore_all(ps); - - /* Move to next code byte as a new whole instruction. */ - ci->code += 1; - ci->codeLen -= 1; - if (ci->codeLen < 0) return NULL; /* Faster to return NULL, it will be detected as WAIT later anyway. */ - /* Since we got a WAIT prefix, we re-read the first byte. */ - tmpIndex0 = *ci->code; - } - - /* Walk first byte in InstructionsTree root. */ - in = InstructionsTree[tmpIndex0]; - if (in == INT_NOTEXISTS) return NULL; - instType = INST_NODE_TYPE(in); - - /* Single byte instruction (OCST_1BYTE). */ - if ((instType < INT_INFOS) && (!isWaitIncluded)) { - /* Some single byte instructions need extra treatment. */ - switch (tmpIndex0) - { - case INST_ARPL_INDEX: - /* - * ARPL/MOVSXD share the same opcode, and both have different operands and mnemonics, of course. - * Practically, I couldn't come up with a comfortable way to merge the operands' types of ARPL/MOVSXD. - * And since the DB can't be patched dynamically, because the DB has to be multi-threaded compliant, - * I have no choice but to check for ARPL/MOVSXD right here - "right about now, the funk soul brother, check it out now, the funk soul brother...", fatboy slim - */ - if (ci->dt == Decode64Bits) { - return &II_MOVSXD; - } /* else ARPL will be returned because its defined in the DB already. */ - break; - - case INST_NOP_INDEX: /* Nopnopnop */ - /* Check for Pause, since it's prefixed with 0xf3, which is not a real mandatory prefix. */ - if (ps->decodedPrefixes & INST_PRE_REP) { - /* Flag this prefix as used. */ - ps->usedPrefixes |= INST_PRE_REP; - return &II_PAUSE; - } - - /* - * Treat NOP/XCHG specially. - * If we're not in 64bits restore XCHG to NOP, since in the DB it's XCHG. - * Else if we're in 64bits examine REX, if exists, and decide which instruction should go to output. - * 48 90 XCHG RAX, RAX is a true NOP (eat REX in this case because it's valid). - * 90 XCHG EAX, EAX is a true NOP (and not high dword of RAX = 0 although it should be a 32 bits operation). - * Note that if the REX.B is used, then the register is not RAX anymore but R8, which means it's not a NOP. - */ - if (rex & PREFIX_EX_W) ps->usedPrefixes |= INST_PRE_REX; - if ((ci->dt != Decode64Bits) || (~rex & PREFIX_EX_B)) return &II_NOP; - break; - - case INST_LEA_INDEX: - /* Ignore segment override prefixes for LEA instruction. */ - ps->decodedPrefixes &= ~INST_PRE_SEGOVRD_MASK; - /* Update unused mask for ignoring segment prefix. */ - prefixes_ignore(ps, PFXIDX_SEG); - break; - } - - /* Return the 1 byte instruction we found. */ - return instType == INT_INFO ? &InstInfos[INST_NODE_INDEX(in)] : (_InstInfo*)&InstInfosEx[INST_NODE_INDEX(in)]; - } - - /* Read second byte, still doesn't mean all of its bits are used (I.E: ModRM). */ - ci->code += 1; - ci->codeLen -= 1; - if (ci->codeLen < 0) return NULL; - tmpIndex1 = *ci->code; - - /* Try single byte instruction + reg bits (OCST_13BYTES). */ - if ((instType == INT_LIST_GROUP) && (!isWaitIncluded)) return inst_get_info(in, (tmpIndex1 >> 3) & 7); - - /* Try single byte instruction + reg byte OR one whole byte (OCST_1dBYTES). */ - if (instType == INT_LIST_DIVIDED) { - /* OCST_1dBYTES is relatively similar to OCST_2dBYTES, since it's really divided at 0xc0. */ - if (tmpIndex1 < INST_DIVIDED_MODRM) { - /* An instruction which requires a ModR/M byte. Thus it's 1.3 bytes long instruction. */ - tmpIndex1 = (tmpIndex1 >> 3) & 7; /* Isolate the 3 REG/OPCODE bits. */ - } else { /* Normal 2 bytes instruction. */ - /* - * Divided instructions can't be in the range of 0x8-0xc0. - * That's because 0-8 are used for 3 bits group. - * And 0xc0-0xff are used for not-divided instruction. - * So the in between range is omitted, thus saving some more place in the tables. - */ - tmpIndex1 -= INST_DIVIDED_MODRM - 8; - } - - in = InstructionsTree[INST_NODE_INDEX(in) + tmpIndex1]; - if (in == INT_NOTEXISTS) return NULL; - instType = INST_NODE_TYPE(in); - - if (instType < INT_INFOS) { - /* If the instruction doesn't support the wait (marked as opsize) as part of the opcode, it's illegal. */ - ii = instType == INT_INFO ? &InstInfos[INST_NODE_INDEX(in)] : (_InstInfo*)&InstInfosEx[INST_NODE_INDEX(in)]; - if ((~INST_INFO_FLAGS(ii) & INST_PRE_OP_SIZE) && (isWaitIncluded)) return NULL; - return ii; - } - /* - * If we got here the instruction can support the wait prefix, so see if it was part of the stream. - * Examine prefixed table, specially used for 0x9b, since it's optional. - * No Wait: index = 0. - * Wait Exists, index = 1. - */ - return inst_get_info(in, isWaitIncluded); - } - - /* Don't allow to continue if WAIT is part of the opcode, because there are no instructions that include it. */ - if (isWaitIncluded) return NULL; - - /* Try 2 bytes long instruction (doesn't include ModRM byte). */ - if (instType == INT_LIST_FULL) { - in = InstructionsTree[INST_NODE_INDEX(in) + tmpIndex1]; - if (in == INT_NOTEXISTS) return NULL; - instType = INST_NODE_TYPE(in); - - /* This is where we check if we just read two escape bytes in a row, which means it is a 3DNow! instruction. */ - if ((tmpIndex0 == _3DNOW_ESCAPE_BYTE) && (tmpIndex1 == _3DNOW_ESCAPE_BYTE)) return &II_3DNOW; - - /* 2 bytes instruction (OCST_2BYTES). */ - if (instType < INT_INFOS) - return instType == INT_INFO ? &InstInfos[INST_NODE_INDEX(in)] : (_InstInfo*)&InstInfosEx[INST_NODE_INDEX(in)]; - - /* - * 2 bytes + mandatory prefix. - * Mandatory prefixes can be anywhere in the prefixes. - * There cannot be more than one mandatory prefix, unless it's a normal operand size prefix. - */ - if (instType == INT_LIST_PREFIXED) return inst_lookup_prefixed(in, ps); - } - - /* Read third byte, still doesn't mean all of its bits are used (I.E: ModRM). */ - ci->code += 1; - ci->codeLen -= 1; - if (ci->codeLen < 0) return NULL; - tmpIndex2 = *ci->code; - - /* Try 2 bytes + reg instruction (OCST_23BYTES). */ - if (instType == INT_LIST_GROUP) { - in = InstructionsTree[INST_NODE_INDEX(in) + ((tmpIndex2 >> 3) & 7)]; - if (in == INT_NOTEXISTS) return NULL; - instType = INST_NODE_TYPE(in); - - if (instType < INT_INFOS) - return instType == INT_INFO ? &InstInfos[INST_NODE_INDEX(in)] : (_InstInfo*)&InstInfosEx[INST_NODE_INDEX(in)]; - - /* It has to be a prefixed table then. */ - ii = inst_lookup_prefixed(in, ps); - /* RDRAND and VMPTRLD share same 2.3 bytes opcode, and alternate on the MOD bits. See insts.h for more info. */ - if ((ii != NULL) && (ii->opcodeId == I_VMPTRLD) && (tmpIndex1 >= INST_DIVIDED_MODRM)) return &II_RDRAND; - return ii; - } - - /* Try 2 bytes + divided range (OCST_2dBYTES). */ - if (instType == INT_LIST_DIVIDED) { - _InstNode in2 = InstructionsTree[INST_NODE_INDEX(in) + ((tmpIndex2 >> 3) & 7)]; - /* - * Do NOT check for NULL here, since we do a bit of a guess work, - * hence we don't override 'in', cause we might still need it. - */ - instType = INST_NODE_TYPE(in2); - - if (instType == INT_INFO) ii = &InstInfos[INST_NODE_INDEX(in2)]; - else if (instType == INT_INFOEX) ii = (_InstInfo*)&InstInfosEx[INST_NODE_INDEX(in2)]; - - /* - * OCST_2dBYTES is complex, because there are a few instructions which are not divided in some special cases. - * If the instruction wasn't divided (but still it must be a 2.3 because we are in divided category) - * or it was an official 2.3 (because its index was less than 0xc0) - - * Then it means the instruction should be using the REG bits, otherwise give a chance to range 0xc0-0xff. - */ - /* If we found an instruction only by its REG bits, AND it is not divided, then return it. */ - if ((ii != NULL) && (INST_INFO_FLAGS(ii) & INST_NOT_DIVIDED)) return ii; - /* Otherwise, if the range is above 0xc0, try the special divided range (range 0x8-0xc0 is omitted). */ - if (tmpIndex2 >= INST_DIVIDED_MODRM) return inst_get_info(in, tmpIndex2 - INST_DIVIDED_MODRM + 8); - - /* It might be that we got here without touching ii in the above if statements, then it becomes an invalid instruction prolly. */ - return ii; - } - - /* Try 3 full bytes (OCST_3BYTES - no ModRM byte). */ - if (instType == INT_LIST_FULL) { - /* OCST_3BYTES. */ - in = InstructionsTree[INST_NODE_INDEX(in) + tmpIndex2]; - if (in == INT_NOTEXISTS) return NULL; - instType = INST_NODE_TYPE(in); - - if (instType < INT_INFOS) - return instType == INT_INFO ? &InstInfos[INST_NODE_INDEX(in)] : (_InstInfo*)&InstInfosEx[INST_NODE_INDEX(in)]; - - if (instType == INT_LIST_PREFIXED) return inst_lookup_prefixed(in, ps); - } - - /* Kahtchinggg, damn. */ - return NULL; -} - -/* -* 3DNow! instruction handling: - -* This is used when we encounter a 3DNow! instruction. -* We can't really locate a 3DNow! instruction before we see two escaped bytes, -* 0x0f, 0x0f. Then we have to extract operands which are, dest=mmx register, src=mmx register or quadword indirection. -* When we are finished with the extraction of operands we can resume to locate the instruction by reading another byte -* which tells us which 3DNow instruction we really tracked down... -* So in order to tell the extract operands function which operands the 3DNow! instruction require, we need to set up some -* generic instruction info for 3DNow! instructions. - -* In the inst_lookup itself, when we read an OCST_3BYTES which the two first bytes are 0x0f and 0x0f. -* we will return this special generic II for the specific operands we are interested in (MM, MM64). -* Then after extracting the operand, we'll call a completion routine for locating the instruction -* which will be called only for 3DNow! instructions, distinguished by a flag, and it will read the last byte of the 3 bytes. -* -* The id of this opcode should not be used, the following function should change it anyway. -*/ -_InstInfo* inst_lookup_3dnow(_CodeInfo* ci) -{ - /* Start off from the two escape bytes gates... which is 3DNow! table.*/ - _InstNode in = Table_0F_0F; - - int index; - - /* Make sure we can read a byte off the stream. */ - if (ci->codeLen < 1) return NULL; - - index = *ci->code; - - ci->codeLen -= 1; - ci->code += 1; - return inst_get_info(in, index); -} diff --git a/diStorm/src/instructions.h b/diStorm/src/instructions.h deleted file mode 100644 index 812e211..0000000 --- a/diStorm/src/instructions.h +++ /dev/null @@ -1,475 +0,0 @@ -/* -instructions.h - -diStorm3 - Powerful disassembler for X86/AMD64 -http://ragestorm.net/distorm/ -distorm at gmail dot com -Copyright (C) 2003-2012 Gil Dabah - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see -*/ - - -#ifndef INSTRUCTIONS_H -#define INSTRUCTIONS_H - -#include "config.h" -#include "prefix.h" - - -/* - * Operand type possibilities: - * Note "_FULL" suffix indicates to decode the operand as 16 bits or 32 bits depends on DecodeType - - * actually, it depends on the decoding mode, unless there's an operand/address size prefix. - * For example, the code: 33 c0 could be decoded/executed as XOR AX, AX or XOR EAX, EAX. - */ -typedef enum OpType { - /* No operand is set */ - OT_NONE = 0, - - /* Read a byte(8 bits) immediate */ - OT_IMM8, - /* Force a read of a word(16 bits) immediate, used by ret only */ - OT_IMM16, - /* Read a word/dword immediate */ - OT_IMM_FULL, - /* Read a double-word(32 bits) immediate */ - OT_IMM32, - - /* Read a signed extended byte(8 bits) immediate */ - OT_SEIMM8, - - /* - * Special immediates for instructions which have more than one immediate, - * which is an exception from standard instruction format. - * As to version v1.0: ENTER, INSERTQ, EXTRQ are the only problematic ones. - */ - /* 16 bits immediate using the first imm-slot */ - OT_IMM16_1, - /* 8 bits immediate using the first imm-slot */ - OT_IMM8_1, - /* 8 bits immediate using the second imm-slot */ - OT_IMM8_2, - - /* Use a 8bit register */ - OT_REG8, - /* Use a 16bit register */ - OT_REG16, - /* Use a 16/32/64bit register */ - OT_REG_FULL, - /* Use a 32bit register */ - OT_REG32, - /* - * If used with REX the reg operand size becomes 64 bits, otherwise 32 bits. - * VMX instructions are promoted automatically without a REX prefix. - */ - OT_REG32_64, - /* Used only by MOV CR/DR(n). Promoted with REX onlly. */ - OT_FREG32_64_RM, - - /* Use or read (indirection) a 8bit register or immediate byte */ - OT_RM8, - /* Some instructions force 16 bits (mov sreg, rm16) */ - OT_RM16, - /* Use or read a 16/32/64bit register or immediate word/dword/qword */ - OT_RM_FULL, - /* - * 32 or 64 bits (with REX) operand size indirection memory operand. - * Some instructions are promoted automatically without a REX prefix. - */ - OT_RM32_64, - /* 16 or 32 bits RM. This is used only with MOVZXD instruction in 64bits. */ - OT_RM16_32, - /* Same as OT_RMXX but POINTS to 16 bits [cannot use GENERAL-PURPOSE REG!] */ - OT_FPUM16, - /* Same as OT_RMXX but POINTS to 32 bits (single precision) [cannot use GENERAL-PURPOSE REG!] */ - OT_FPUM32, - /* Same as OT_RMXX but POINTS to 64 bits (double precision) [cannot use GENERAL-PURPOSE REG!] */ - OT_FPUM64, - /* Same as OT_RMXX but POINTS to 80 bits (extended precision) [cannot use GENERAL-PURPOSE REG!] */ - OT_FPUM80, - - /* - * Special operand type for SSE4 where the ModR/M might - * be a 32 bits register or 8 bits memory indirection operand. - */ - OT_R32_M8, - /* - * Special ModR/M for PINSRW, which need a 16 bits memory operand or 32 bits register. - * In 16 bits decoding mode R32 becomes R16, operand size cannot affect this. - */ - OT_R32_M16, - /* - * Special type for SSE4, ModR/M might be a 32 bits or 64 bits (with REX) register or - * a 8 bits memory indirection operand. - */ - OT_R32_64_M8, - /* - * Special type for SSE4, ModR/M might be a 32 bits or 64 bits (with REX) register or - * a 16 bits memory indirection operand. - */ - OT_R32_64_M16, - /* - * Special operand type for MOV reg16/32/64/mem16, segReg 8C /r. and SMSW. - * It supports all decoding modes, but if used as a memory indirection it's a 16 bit ModR/M indirection. - */ - OT_RFULL_M16, - - /* Use a control register */ - OT_CREG, - /* Use a debug register */ - OT_DREG, - /* Use a segment register */ - OT_SREG, - /* - * SEG is encoded in the flags of the opcode itself! - * This is used for specific "push SS" where SS is a segment where - * each "push SS" has an absolutely different opcode byte. - * We need this to detect whether an operand size prefix is used. - */ - OT_SEG, - - /* Use AL */ - OT_ACC8, - /* Use AX (FSTSW) */ - OT_ACC16, - /* Use AX/EAX/RAX */ - OT_ACC_FULL, - /* Use AX/EAX, no REX is possible for RAX, used only with IN/OUT which don't support 64 bit registers */ - OT_ACC_FULL_NOT64, - - /* - * Read one word (seg), and a word/dword/qword (depends on operand size) from memory. - * JMP FAR [EBX] means EBX point to 16:32 ptr. - */ - OT_MEM16_FULL, - /* Read one word (seg) and a word/dword/qword (depends on operand size), usually SEG:OFF, JMP 1234:1234 */ - OT_PTR16_FULL, - /* Read one word (limit) and a dword/qword (limit) (depends on operand size), used by SGDT, SIDT, LGDT, LIDT. */ - OT_MEM16_3264, - - /* Read a byte(8 bits) immediate and calculate it relatively to the current offset of the instruction being decoded */ - OT_RELCB, - /* Read a word/dword immediate and calculate it relatively to the current offset of the instruction being decoded */ - OT_RELC_FULL, - - /* Use general memory indirection, with varying sizes: */ - OT_MEM, - /* Used when a memory indirection is required, but if the mod field is 11, this operand will be ignored. */ - OT_MEM_OPT, - OT_MEM32, - /* Memory dereference for MOVNTI, either 32 or 64 bits (with REX). */ - OT_MEM32_64, - OT_MEM64, - OT_MEM128, - /* Used for cmpxchg8b/16b. */ - OT_MEM64_128, - - /* Read an immediate as an absolute address, size is known by instruction, used by MOV (memory offset) only */ - OT_MOFFS8, - OT_MOFFS_FULL, - /* Use an immediate of 1, as for SHR R/M, 1 */ - OT_CONST1, - /* Use CL, as for SHR R/M, CL */ - OT_REGCL, - - /* - * Instruction-Block for one byte long instructions, used by INC/DEC/PUSH/POP/XCHG, - * REG is extracted from the value of opcode - * Use a 8bit register - */ - OT_IB_RB, - /* Use a 16/32/64bit register */ - OT_IB_R_FULL, - - /* Use [(r)SI] as INDIRECTION, for repeatable instructions */ - OT_REGI_ESI, - /* Use [(r)DI] as INDIRECTION, for repeatable instructions */ - OT_REGI_EDI, - /* Use [(r)BX + AL] as INDIRECTIOM, used by XLAT only */ - OT_REGI_EBXAL, - /* Use [(r)AX] as INDIRECTION, used by AMD's SVM instructions */ - OT_REGI_EAX, - /* Use DX, as for OUTS DX, BYTE [SI] */ - OT_REGDX, - /* Use ECX in INVLPGA instruction */ - OT_REGECX, - - /* FPU registers: */ - OT_FPU_SI, /* ST(i) */ - OT_FPU_SSI, /* ST(0), ST(i) */ - OT_FPU_SIS, /* ST(i), ST(0) */ - - /* MMX registers: */ - OT_MM, - /* Extract the MMX register from the RM bits this time (used when the REG bits are used for opcode extension) */ - OT_MM_RM, - /* ModR/M points to 32 bits MMX variable */ - OT_MM32, - /* ModR/M points to 32 bits MMX variable */ - OT_MM64, - - /* SSE registers: */ - OT_XMM, - /* Extract the SSE register from the RM bits this time (used when the REG bits are used for opcode extension) */ - OT_XMM_RM, - /* ModR/M points to 16 bits SSE variable */ - OT_XMM16, - /* ModR/M points to 32 bits SSE variable */ - OT_XMM32, - /* ModR/M points to 64 bits SSE variable */ - OT_XMM64, - /* ModR/M points to 128 bits SSE variable */ - OT_XMM128, - /* Implied XMM0 register as operand, used in SSE4. */ - OT_REGXMM0, - - /* AVX operands: */ - - /* ModR/M for 32 bits. */ - OT_RM32, - /* Reg32/Reg64 (prefix width) or Mem8. */ - OT_REG32_64_M8, - /* Reg32/Reg64 (prefix width) or Mem16. */ - OT_REG32_64_M16, - /* Reg32/Reg 64 depends on prefix width only. */ - OT_WREG32_64, - /* RM32/RM64 depends on prefix width only. */ - OT_WRM32_64, - /* XMM or Mem32/Mem64 depends on perfix width only. */ - OT_WXMM32_64, - /* XMM is encoded in VEX.VVVV. */ - OT_VXMM, - /* XMM is encoded in the high nibble of an immediate byte. */ - OT_XMM_IMM, - /* YMM/XMM is dependent on VEX.L. */ - OT_YXMM, - /* YMM/XMM (depends on prefix length) is encoded in the high nibble of an immediate byte. */ - OT_YXMM_IMM, - /* YMM is encoded in reg. */ - OT_YMM, - /* YMM or Mem256. */ - OT_YMM256, - /* YMM is encoded in VEX.VVVV. */ - OT_VYMM, - /* YMM/XMM is dependent on VEX.L, and encoded in VEX.VVVV. */ - OT_VYXMM, - /* YMM/XMM or Mem64/Mem256 is dependent on VEX.L. */ - OT_YXMM64_256, - /* YMM/XMM or Mem128/Mem256 is dependent on VEX.L. */ - OT_YXMM128_256, - /* XMM or Mem64/Mem256 is dependent on VEX.L. */ - OT_LXMM64_128, - /* Mem128/Mem256 is dependent on VEX.L. */ - OT_LMEM128_256 -} _OpType; - -/* Flags for instruction: */ - -/* Empty flags indicator: */ -#define INST_FLAGS_NONE (0) -/* The instruction we are going to decode requires ModR/M encoding. */ -#define INST_MODRM_REQUIRED (1) -/* Special treatment for instructions which are in the divided-category but still needs the whole byte for ModR/M... */ -#define INST_NOT_DIVIDED (1 << 1) -/* - * Used explicitly in repeatable instructions, - * which needs a suffix letter in their mnemonic to specify operation-size (depend on operands). - */ -#define INST_16BITS (1 << 2) -/* If the opcode is supported by 80286 and upper models (16/32 bits). */ -#define INST_32BITS (1 << 3) -/* - * Prefix flags (6 types: lock/rep, seg override, addr-size, oper-size, REX, VEX) - * There are several specific instructions that can follow LOCK prefix, - * note that they must be using a memory operand form, otherwise they generate an exception. - */ -#define INST_PRE_LOCK (1 << 4) -/* REPNZ prefix for string instructions only - means an instruction can follow it. */ -#define INST_PRE_REPNZ (1 << 5) -/* REP prefix for string instructions only - means an instruction can follow it. */ -#define INST_PRE_REP (1 << 6) -/* CS override prefix. */ -#define INST_PRE_CS (1 << 7) -/* SS override prefix. */ -#define INST_PRE_SS (1 << 8) -/* DS override prefix. */ -#define INST_PRE_DS (1 << 9) -/* ES override prefix. */ -#define INST_PRE_ES (1 << 10) -/* FS override prefix. Funky Segment :) */ -#define INST_PRE_FS (1 << 11) -/* GS override prefix. Groovy Segment, of course not, duh ! */ -#define INST_PRE_GS (1 << 12) -/* Switch operand size from 32 to 16 and vice versa. */ -#define INST_PRE_OP_SIZE (1 << 13) -/* Switch address size from 32 to 16 and vice versa. */ -#define INST_PRE_ADDR_SIZE (1 << 14) -/* Native instructions which needs suffix letter to indicate their operation-size (and don't depend on operands). */ -#define INST_NATIVE (1 << 15) -/* Use extended mnemonic, means it's an _InstInfoEx structure, which contains another mnemonic for 32 bits specifically. */ -#define INST_USE_EXMNEMONIC (1 << 16) -/* Use third operand, means it's an _InstInfoEx structure, which contains another operand for special instructions. */ -#define INST_USE_OP3 (1 << 17) -/* Use fourth operand, means it's an _InstInfoEx structure, which contains another operand for special instructions. */ -#define INST_USE_OP4 (1 << 18) -/* The instruction's mnemonic depends on the mod value of the ModR/M byte (mod=11, mod!=11). */ -#define INST_MNEMONIC_MODRM_BASED (1 << 19) -/* The instruction uses a ModR/M byte which the MOD must be 11 (for registers operands only). */ -#define INST_MODRR_REQUIRED (1 << 20) -/* The way of 3DNow! instructions are built, we have to handle their locating specially. Suffix imm8 tells which instruction it is. */ -#define INST_3DNOW_FETCH (1 << 21) -/* The instruction needs two suffixes, one for the comparison type (imm8) and the second for its operation size indication (second mnemonic). */ -#define INST_PSEUDO_OPCODE (1 << 22) -/* Invalid instruction at 64 bits decoding mode. */ -#define INST_INVALID_64BITS (1 << 23) -/* Specific instruction can be promoted to 64 bits (without REX, it is promoted automatically). */ -#define INST_64BITS (1 << 24) -/* Indicates the instruction must be REX prefixed in order to use 64 bits operands. */ -#define INST_PRE_REX (1 << 25) -/* Third mnemonic is set. */ -#define INST_USE_EXMNEMONIC2 (1 << 26) -/* Instruction is only valid in 64 bits decoding mode. */ -#define INST_64BITS_FETCH (1 << 27) -/* Forces that the ModRM-REG/Opcode field will be 0. (For EXTRQ). */ -#define INST_FORCE_REG0 (1 << 28) -/* Indicates that instruction is encoded with a VEX prefix. */ -#define INST_PRE_VEX (1 << 29) -/* Indicates that the instruction is encoded with a ModRM byte (REG field specifically). */ -#define INST_MODRM_INCLUDED (1 << 30) -/* Indicates that the first (/destination) operand of the instruction is writable. */ -#define INST_DST_WR (1 << 31) - -#define INST_PRE_REPS (INST_PRE_REPNZ | INST_PRE_REP) -#define INST_PRE_LOKREP_MASK (INST_PRE_LOCK | INST_PRE_REPNZ | INST_PRE_REP) -#define INST_PRE_SEGOVRD_MASK32 (INST_PRE_CS | INST_PRE_SS | INST_PRE_DS | INST_PRE_ES) -#define INST_PRE_SEGOVRD_MASK64 (INST_PRE_FS | INST_PRE_GS) -#define INST_PRE_SEGOVRD_MASK (INST_PRE_SEGOVRD_MASK32 | INST_PRE_SEGOVRD_MASK64) - -/* Extended flags for VEX: */ -/* Indicates that the instruction might have VEX.L encoded. */ -#define INST_VEX_L (1) -/* Indicates that the instruction might have VEX.W encoded. */ -#define INST_VEX_W (1 << 1) -/* Indicates that the mnemonic of the instruction is based on the VEX.W bit. */ -#define INST_MNEMONIC_VEXW_BASED (1 << 2) -/* Indicates that the mnemonic of the instruction is based on the VEX.L bit. */ -#define INST_MNEMONIC_VEXL_BASED (1 << 3) -/* Forces the instruction to be encoded with VEX.L, otherwise it's undefined. */ -#define INST_FORCE_VEXL (1 << 4) -/* - * Indicates that the instruction is based on the MOD field of the ModRM byte. - * (MOD==11: got the right instruction, else skip +4 in prefixed table for the correct instruction). - */ -#define INST_MODRR_BASED (1 << 5) -/* Indicates that the instruction doesn't use the VVVV field of the VEX prefix, if it does then it's undecodable. */ -#define INST_VEX_V_UNUSED (1 << 6) - -/* Indication that the instruction is privileged (Ring 0), this should be checked on the opcodeId field. */ -#define OPCODE_ID_PRIVILEGED ((uint16_t)0x8000) - -/* - * Indicates which operand is being decoded. - * Destination (1st), Source (2nd), op3 (3rd), op4 (4th). - * Used to set the operands' fields in the _DInst structure! - */ -typedef enum {ONT_NONE = -1, ONT_1 = 0, ONT_2 = 1, ONT_3 = 2, ONT_4 = 3} _OperandNumberType; - -/* CPU Flags that instructions modify, test or undefine, in compacted form (CF,PF,AF,ZF,SF are 1:1 map to EFLAGS). */ -#define D_COMPACT_CF 1 /* Carry */ -#define D_COMPACT_PF 4 /* Parity */ -#define D_COMPACT_AF 0x10 /* Auxiliary */ -#define D_COMPACT_ZF 0x40 /* Zero */ -#define D_COMPACT_SF 0x80 /* Sign */ -/* The following flags have to be translated to EFLAGS. */ -#define D_COMPACT_IF 2 /* Interrupt */ -#define D_COMPACT_DF 8 /* Direction */ -#define D_COMPACT_OF 0x20 /* Overflow */ - -/* The mask of flags that are already compatible with EFLAGS. */ -#define D_COMPACT_SAME_FLAGS (D_COMPACT_CF | D_COMPACT_PF | D_COMPACT_AF | D_COMPACT_ZF | D_COMPACT_SF) - -/* - * In order to save more space for storing the DB statically, - * I came up with another level of shared info. - * Because I saw that most of the information that instructions use repeats itself. - * - * Info about the instruction, source/dest types, meta and flags. - * _InstInfo points to a table of _InstSharedInfo. - */ -typedef struct { - uint8_t flagsIndex; /* An index into FlagsTables */ - uint8_t s, d; /* OpType. */ - uint8_t meta; /* Hi 5 bits = Instruction set class | Lo 3 bits = flow control flags. */ - /* - * The following are CPU flag masks that the instruction changes. - * The flags are compacted so 8 bits representation is enough. - * They will be expanded in runtime to be compatible to EFLAGS. - */ - uint8_t modifiedFlagsMask; - uint8_t testedFlagsMask; - uint8_t undefinedFlagsMask; -} _InstSharedInfo; - -/* - * This structure is used for the instructions DB and NOT for the disassembled result code! - * This is the BASE structure, there are extensions to this structure below. - */ -typedef struct { - uint16_t sharedIndex; /* An index into the SharedInfoTable. */ - uint16_t opcodeId; /* The opcodeId is really a byte-offset into the mnemonics table. MSB is a privileged indication. */ -} _InstInfo; - -/* - * There are merely few instructions which need a second mnemonic for 32 bits. - * Or a third for 64 bits. Therefore sometimes the second mnemonic is empty but not the third. - * In all decoding modes the first mnemonic is the default. - * A flag will indicate it uses another mnemonic. - * - * There are a couple of (SSE4) instructions in the whole DB which need both op3 and 3rd mnemonic for 64bits, - * therefore, I decided to make the extended structure contain all extra info in the same structure. - * There are a few instructions (SHLD/SHRD/IMUL and SSE too) which use third operand (or a fourth). - * A flag will indicate it uses a third/fourth operand. - */ -typedef struct { - /* Base structure (doesn't get accessed directly from code). */ - _InstInfo BASE; - - /* Extended starts here. */ - uint8_t flagsEx; /* 8 bits are enough, in the future we might make it a bigger integer. */ - uint8_t op3, op4; /* OpType. */ - uint16_t opcodeId2, opcodeId3; -} _InstInfoEx; - -/* Trie data structure node type: */ -typedef enum { - INT_NOTEXISTS = 0, /* Not exists. */ - INT_INFO = 1, /* It's an instruction info. */ - INT_INFOEX, - INT_LIST_GROUP, - INT_LIST_FULL, - INT_LIST_DIVIDED, - INT_LIST_PREFIXED -} _InstNodeType; - -/* Used to check instType < INT_INFOS, means we got an inst-info. Cause it has to be only one of them. */ -#define INT_INFOS (INT_LIST_GROUP) - -/* Instruction node is treated as { int index:13; int type:3; } */ -typedef uint16_t _InstNode; - -_InstInfo* inst_lookup(_CodeInfo* ci, _PrefixState* ps); -_InstInfo* inst_lookup_3dnow(_CodeInfo* ci); - -#endif /* INSTRUCTIONS_H */ diff --git a/diStorm/src/insts.c b/diStorm/src/insts.c deleted file mode 100644 index a644d2c..0000000 --- a/diStorm/src/insts.c +++ /dev/null @@ -1,7816 +0,0 @@ -/* -insts.c - -diStorm3 - Powerful disassembler for X86/AMD64 -http://ragestorm.net/distorm/ -distorm at gmail dot com -Copyright (C) 2003-2012 Gil Dabah - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see -*/ - - -#include "config.h" -#include "insts.h" -#include "instructions.h" - - -/* - * GENERATED BY disOps at Sat Dec 13 21:47:42 2014 - */ - -_InstInfo II_MOVSXD = /*II*/ {0x1d0, 10005}; -_InstInfo II_NOP = /*II*/ {0x53, 581}; -_InstInfo II_PAUSE = /*II*/ {0x88, 10013}; -_InstInfo II_WAIT = /*II*/ {0x53, 10020}; -_InstInfo II_RDRAND = /*II*/ {0x1d1, 10026}; -_InstInfo II_3DNOW = /*II*/ {0x1d2, 10034}; - -_iflags FlagsTable[100] = { -0x80000011, -0x80000000, -0x800400, -0x80800400, -0x800080, -0x800100, -0x80800100, -0x800200, -0x80800200, -0x800000, -0x1, -0x0, -0x80800000, -0x1000000, -0x81000000, -0x808000, -0x800001, -0x80020001, -0x1002000, -0x60, -0x64, -0x80000001, -0x4010000, -0x1008000, -0x80000060, -0x83000064, -0x3000064, -0x83000000, -0x3008000, -0x200, -0xc000, -0x4014000, -0x8, -0x81000009, -0x9, -0x80000009, -0x1000808, -0x81000808, -0x80020009, -0x1001008, -0x81001008, -0x80000019, -0x3000009, -0x83000009, -0x83000008, -0xc0000011, -0x40000001, -0xc0800011, -0x40800001, -0xc0000019, -0xc1000001, -0xc0000001, -0x40000000, -0x40000008, -0x40000009, -0x41000001, -0x43000001, -0xc0000003, -0x40000003, -0x48000000, -0x200009, -0x20000009, -0x60020009, -0x60000009, -0x80090009, -0x200b0009, -0x20020009, -0x80100009, -0x21100009, -0x87000009, -0x20009, -0x20000008, -0x1000009, -0x10020009, -0x160009, -0x100009, -0x47000009, -0x47090009, -0x40090009, -0x80002009, -0xc0000009, -0x2001, -0x80002001, -0x410009, -0x20420009, -0x20060009, -0x120009, -0x21020009, -0xc7000019, -0x20100009, -0xc0002009, -0x40002008, -0xc0000000, -0xc0002008, -0x4020009, -0x40100009, -0x60120009, -0x41000009, -0x83000001, -0x200001 -}; - -_InstNode Table_0F = 256; -_InstNode Table_0F_0F = 1312; -_InstNode Table_0F_38 = 1768; -_InstNode Table_0F_3A = 2024; - -_InstInfo InstInfos[1243] = { - /*II_00*/ {0x0, 11}, - /*II_01*/ {0x1, 11}, - /*II_02*/ {0x2, 11}, - /*II_03*/ {0x3, 11}, - /*II_04*/ {0x4, 11}, - /*II_05*/ {0x5, 11}, - /*II_06*/ {0x6, 16}, - /*II_07*/ {0x7, 22}, - /*II_08*/ {0x8, 27}, - /*II_09*/ {0x9, 27}, - /*II_0A*/ {0xa, 27}, - /*II_0B*/ {0xb, 27}, - /*II_0C*/ {0xc, 27}, - /*II_0D*/ {0xd, 27}, - /*II_0E*/ {0xe, 16}, - /*II_10*/ {0xf, 31}, - /*II_11*/ {0x10, 31}, - /*II_12*/ {0x11, 31}, - /*II_13*/ {0x12, 31}, - /*II_14*/ {0x13, 31}, - /*II_15*/ {0x14, 31}, - /*II_16*/ {0x15, 16}, - /*II_17*/ {0x16, 22}, - /*II_18*/ {0xf, 36}, - /*II_19*/ {0x10, 36}, - /*II_1A*/ {0x11, 36}, - /*II_1B*/ {0x12, 36}, - /*II_1C*/ {0x13, 36}, - /*II_1D*/ {0x14, 36}, - /*II_1E*/ {0x17, 16}, - /*II_1F*/ {0x18, 22}, - /*II_20*/ {0x19, 41}, - /*II_21*/ {0x1a, 41}, - /*II_22*/ {0x1b, 41}, - /*II_23*/ {0x1c, 41}, - /*II_24*/ {0x1d, 41}, - /*II_25*/ {0x1e, 41}, - /*II_27*/ {0x1f, 46}, - /*II_28*/ {0x0, 51}, - /*II_29*/ {0x1, 51}, - /*II_2A*/ {0x2, 51}, - /*II_2B*/ {0x3, 51}, - /*II_2C*/ {0x4, 51}, - /*II_2D*/ {0x5, 51}, - /*II_2F*/ {0x1f, 56}, - /*II_30*/ {0x20, 61}, - /*II_31*/ {0x21, 61}, - /*II_32*/ {0x22, 61}, - /*II_33*/ {0x23, 61}, - /*II_34*/ {0x24, 61}, - /*II_35*/ {0x25, 61}, - /*II_37*/ {0x26, 66}, - /*II_38*/ {0x27, 71}, - /*II_39*/ {0x28, 71}, - /*II_3A*/ {0x29, 71}, - /*II_3B*/ {0x2a, 71}, - /*II_3C*/ {0x2b, 71}, - /*II_3D*/ {0x2c, 71}, - /*II_3F*/ {0x26, 76}, - /*II_40*/ {0x2d, 81}, - /*II_40*/ {0x2d, 81}, - /*II_40*/ {0x2d, 81}, - /*II_40*/ {0x2d, 81}, - /*II_40*/ {0x2d, 81}, - /*II_40*/ {0x2d, 81}, - /*II_40*/ {0x2d, 81}, - /*II_40*/ {0x2d, 81}, - /*II_48*/ {0x2d, 86}, - /*II_48*/ {0x2d, 86}, - /*II_48*/ {0x2d, 86}, - /*II_48*/ {0x2d, 86}, - /*II_48*/ {0x2d, 86}, - /*II_48*/ {0x2d, 86}, - /*II_48*/ {0x2d, 86}, - /*II_48*/ {0x2d, 86}, - /*II_50*/ {0x2e, 16}, - /*II_50*/ {0x2e, 16}, - /*II_50*/ {0x2e, 16}, - /*II_50*/ {0x2e, 16}, - /*II_50*/ {0x2e, 16}, - /*II_50*/ {0x2e, 16}, - /*II_50*/ {0x2e, 16}, - /*II_50*/ {0x2e, 16}, - /*II_58*/ {0x2f, 22}, - /*II_58*/ {0x2f, 22}, - /*II_58*/ {0x2f, 22}, - /*II_58*/ {0x2f, 22}, - /*II_58*/ {0x2f, 22}, - /*II_58*/ {0x2f, 22}, - /*II_58*/ {0x2f, 22}, - /*II_58*/ {0x2f, 22}, - /*II_60*/ {0x30, 91}, - /*II_61*/ {0x30, 98}, - /*II_62*/ {0x31, 104}, - /*II_63*/ {0x32, 111}, - /*II_68*/ {0x33, 16}, - /*II_6A*/ {0x35, 16}, - /*II_6C*/ {0x36, 32891}, - /*II_6D*/ {0x37, 32891}, - /*II_6E*/ {0x38, 32896}, - /*II_6F*/ {0x39, 32896}, - /*II_70*/ {0x3a, 134}, - /*II_71*/ {0x3a, 138}, - /*II_72*/ {0x3b, 143}, - /*II_73*/ {0x3b, 147}, - /*II_74*/ {0x3c, 152}, - /*II_75*/ {0x3c, 156}, - /*II_76*/ {0x3d, 161}, - /*II_77*/ {0x3d, 166}, - /*II_78*/ {0x3e, 170}, - /*II_79*/ {0x3e, 174}, - /*II_7A*/ {0x3f, 179}, - /*II_7B*/ {0x3f, 183}, - /*II_7C*/ {0x40, 188}, - /*II_7D*/ {0x40, 192}, - /*II_7E*/ {0x41, 197}, - /*II_7F*/ {0x41, 202}, - /*II_84*/ {0x42, 206}, - /*II_85*/ {0x43, 206}, - /*II_86*/ {0x44, 212}, - /*II_87*/ {0x45, 212}, - /*II_88*/ {0x46, 218}, - /*II_89*/ {0x47, 218}, - /*II_8A*/ {0x48, 218}, - /*II_8B*/ {0x49, 218}, - /*II_8C*/ {0x4a, 218}, - /*II_8D*/ {0x4b, 223}, - /*II_8E*/ {0x4c, 218}, - /*II_90*/ {0x4d, 212}, - /*II_91*/ {0x4d, 212}, - /*II_92*/ {0x4d, 212}, - /*II_93*/ {0x4d, 212}, - /*II_94*/ {0x4d, 212}, - /*II_95*/ {0x4d, 212}, - /*II_96*/ {0x4d, 212}, - /*II_97*/ {0x4d, 212}, - /*II_9A*/ {0x4f, 260}, - /*II_9C*/ {0x50, 270}, - /*II_9D*/ {0x51, 277}, - /*II_9E*/ {0x52, 283}, - /*II_9F*/ {0x53, 289}, - /*II_A0*/ {0x54, 218}, - /*II_A1*/ {0x55, 218}, - /*II_A2*/ {0x56, 218}, - /*II_A3*/ {0x57, 218}, - /*II_A4*/ {0x58, 295}, - /*II_A5*/ {0x59, 295}, - /*II_A6*/ {0x5a, 301}, - /*II_A7*/ {0x5b, 301}, - /*II_A8*/ {0x5c, 206}, - /*II_A9*/ {0x5d, 206}, - /*II_AA*/ {0x5e, 307}, - /*II_AB*/ {0x5f, 307}, - /*II_AC*/ {0x60, 313}, - /*II_AD*/ {0x61, 313}, - /*II_AE*/ {0x62, 319}, - /*II_AF*/ {0x63, 319}, - /*II_B0*/ {0x64, 218}, - /*II_B0*/ {0x64, 218}, - /*II_B0*/ {0x64, 218}, - /*II_B0*/ {0x64, 218}, - /*II_B0*/ {0x64, 218}, - /*II_B0*/ {0x64, 218}, - /*II_B0*/ {0x64, 218}, - /*II_B0*/ {0x64, 218}, - /*II_B8*/ {0x65, 218}, - /*II_B8*/ {0x65, 218}, - /*II_B8*/ {0x65, 218}, - /*II_B8*/ {0x65, 218}, - /*II_B8*/ {0x65, 218}, - /*II_B8*/ {0x65, 218}, - /*II_B8*/ {0x65, 218}, - /*II_B8*/ {0x65, 218}, - /*II_C2*/ {0x66, 325}, - /*II_C3*/ {0x67, 325}, - /*II_C4*/ {0x68, 330}, - /*II_C5*/ {0x68, 335}, - /*II_C8*/ {0x69, 340}, - /*II_C9*/ {0x6a, 347}, - /*II_CA*/ {0x6b, 354}, - /*II_CB*/ {0x6c, 354}, - /*II_CC*/ {0x6d, 360}, - /*II_CD*/ {0x6e, 367}, - /*II_CE*/ {0x6f, 372}, - /*II_CF*/ {0x70, 33146}, - /*II_D4*/ {0x71, 384}, - /*II_D5*/ {0x71, 389}, - /*II_D6*/ {0x72, 394}, - /*II_D7*/ {0x73, 400}, - /*II_E0*/ {0x74, 406}, - /*II_E1*/ {0x74, 414}, - /*II_E2*/ {0x75, 421}, - /*II_E4*/ {0x77, 33215}, - /*II_E5*/ {0x78, 33215}, - /*II_E6*/ {0x79, 33219}, - /*II_E7*/ {0x7a, 33219}, - /*II_E8*/ {0x7b, 456}, - /*II_E9*/ {0x7c, 462}, - /*II_EA*/ {0x7d, 467}, - /*II_EB*/ {0x7e, 462}, - /*II_EC*/ {0x7f, 33215}, - /*II_ED*/ {0x80, 33215}, - /*II_EE*/ {0x81, 33219}, - /*II_EF*/ {0x82, 33219}, - /*II_F1*/ {0x6d, 476}, - /*II_F4*/ {0x53, 33250}, - /*II_F5*/ {0x83, 487}, - /*II_F8*/ {0x83, 492}, - /*II_F9*/ {0x83, 497}, - /*II_FA*/ {0x84, 33270}, - /*II_FB*/ {0x84, 33275}, - /*II_FC*/ {0x85, 512}, - /*II_FD*/ {0x85, 517}, - /*II_0F_02*/ {0x86, 522}, - /*II_0F_03*/ {0x86, 527}, - /*II_0F_05*/ {0x87, 532}, - /*II_0F_06*/ {0x88, 33309}, - /*II_0F_07*/ {0x87, 547}, - /*II_0F_08*/ {0x88, 33323}, - /*II_0F_09*/ {0x88, 33329}, - /*II_0F_0B*/ {0x89, 569}, - /*II_0F_0E*/ {0x8a, 574}, - /*II_0F_1F*/ {0x8b, 581}, - /*II_0F_20*/ {0x8c, 32986}, - /*II_0F_21*/ {0x8d, 32986}, - /*II_0F_22*/ {0x8e, 32986}, - /*II_0F_23*/ {0x8f, 32986}, - /*II_0F_30*/ {0x88, 33354}, - /*II_0F_31*/ {0x88, 33361}, - /*II_0F_32*/ {0x88, 33368}, - /*II_0F_33*/ {0x88, 33375}, - /*II_0F_34*/ {0x87, 614}, - /*II_0F_35*/ {0x87, 624}, - /*II_0F_37*/ {0x90, 633}, - /*II_0F_40*/ {0x91, 641}, - /*II_0F_41*/ {0x91, 648}, - /*II_0F_42*/ {0x92, 656}, - /*II_0F_43*/ {0x92, 663}, - /*II_0F_44*/ {0x93, 671}, - /*II_0F_45*/ {0x93, 678}, - /*II_0F_46*/ {0x94, 686}, - /*II_0F_47*/ {0x94, 694}, - /*II_0F_48*/ {0x95, 701}, - /*II_0F_49*/ {0x95, 708}, - /*II_0F_4A*/ {0x96, 716}, - /*II_0F_4B*/ {0x96, 723}, - /*II_0F_4C*/ {0x97, 731}, - /*II_0F_4D*/ {0x97, 738}, - /*II_0F_4E*/ {0x98, 746}, - /*II_0F_4F*/ {0x98, 754}, - /*II_0F_80*/ {0x99, 134}, - /*II_0F_81*/ {0x99, 138}, - /*II_0F_82*/ {0x9a, 143}, - /*II_0F_83*/ {0x9a, 147}, - /*II_0F_84*/ {0x9b, 152}, - /*II_0F_85*/ {0x9b, 156}, - /*II_0F_86*/ {0x9c, 161}, - /*II_0F_87*/ {0x9c, 166}, - /*II_0F_88*/ {0x9d, 170}, - /*II_0F_89*/ {0x9d, 174}, - /*II_0F_8A*/ {0x9e, 179}, - /*II_0F_8B*/ {0x9e, 183}, - /*II_0F_8C*/ {0x9f, 188}, - /*II_0F_8D*/ {0x9f, 192}, - /*II_0F_8E*/ {0xa0, 197}, - /*II_0F_8F*/ {0xa0, 202}, - /*II_0F_90*/ {0xa1, 761}, - /*II_0F_91*/ {0xa1, 767}, - /*II_0F_92*/ {0xa2, 774}, - /*II_0F_93*/ {0xa2, 780}, - /*II_0F_94*/ {0xa3, 787}, - /*II_0F_95*/ {0xa3, 793}, - /*II_0F_96*/ {0xa4, 800}, - /*II_0F_97*/ {0xa4, 807}, - /*II_0F_98*/ {0xa5, 813}, - /*II_0F_99*/ {0xa5, 819}, - /*II_0F_9A*/ {0xa6, 826}, - /*II_0F_9B*/ {0xa6, 832}, - /*II_0F_9C*/ {0xa7, 839}, - /*II_0F_9D*/ {0xa7, 845}, - /*II_0F_9E*/ {0xa8, 852}, - /*II_0F_9F*/ {0xa8, 859}, - /*II_0F_A0*/ {0xa9, 16}, - /*II_0F_A1*/ {0xaa, 22}, - /*II_0F_A2*/ {0x88, 865}, - /*II_0F_A3*/ {0xab, 872}, - /*II_0F_A8*/ {0xad, 16}, - /*II_0F_A9*/ {0xae, 22}, - /*II_0F_AA*/ {0xaf, 882}, - /*II_0F_AB*/ {0xb0, 887}, - /*II_0F_AF*/ {0xb1, 117}, - /*II_0F_B0*/ {0xb2, 898}, - /*II_0F_B1*/ {0xb3, 898}, - /*II_0F_B2*/ {0xb4, 907}, - /*II_0F_B3*/ {0xb0, 912}, - /*II_0F_B4*/ {0xb4, 917}, - /*II_0F_B5*/ {0xb4, 922}, - /*II_0F_B6*/ {0xb5, 927}, - /*II_0F_B7*/ {0xb6, 927}, - /*II_0F_B9*/ {0x89, 569}, - /*II_0F_BB*/ {0xb0, 934}, - /*II_0F_BE*/ {0xb5, 939}, - /*II_0F_BF*/ {0xb6, 939}, - /*II_0F_C0*/ {0xb2, 946}, - /*II_0F_C1*/ {0xb3, 946}, - /*II_0F_C3*/ {0xb7, 952}, - /*II_0F_C8*/ {0xb8, 960}, - /*II_0F_C8*/ {0xb8, 960}, - /*II_0F_C8*/ {0xb8, 960}, - /*II_0F_C8*/ {0xb8, 960}, - /*II_0F_C8*/ {0xb8, 960}, - /*II_0F_C8*/ {0xb8, 960}, - /*II_0F_C8*/ {0xb8, 960}, - /*II_0F_C8*/ {0xb8, 960}, - /*II_80_00*/ {0xb9, 11}, - /*II_80_01*/ {0xba, 27}, - /*II_80_02*/ {0xbb, 31}, - /*II_80_03*/ {0xbb, 36}, - /*II_80_04*/ {0xbc, 41}, - /*II_80_05*/ {0xb9, 51}, - /*II_80_06*/ {0xbd, 61}, - /*II_80_07*/ {0xbe, 71}, - /*II_81_00*/ {0xbf, 11}, - /*II_81_01*/ {0xc0, 27}, - /*II_81_02*/ {0xc1, 31}, - /*II_81_03*/ {0xc1, 36}, - /*II_81_04*/ {0xc2, 41}, - /*II_81_05*/ {0xbf, 51}, - /*II_81_06*/ {0xc3, 61}, - /*II_81_07*/ {0xc4, 71}, - /*II_82_00*/ {0xc5, 11}, - /*II_82_01*/ {0xc6, 27}, - /*II_82_02*/ {0xc7, 31}, - /*II_82_03*/ {0xc7, 36}, - /*II_82_04*/ {0xc8, 41}, - /*II_82_05*/ {0xc5, 51}, - /*II_82_06*/ {0xc9, 61}, - /*II_82_07*/ {0xca, 71}, - /*II_83_00*/ {0xcb, 11}, - /*II_83_01*/ {0xcc, 27}, - /*II_83_02*/ {0xcd, 31}, - /*II_83_03*/ {0xcd, 36}, - /*II_83_04*/ {0xce, 41}, - /*II_83_05*/ {0xcb, 51}, - /*II_83_06*/ {0xcf, 61}, - /*II_83_07*/ {0xd0, 71}, - /*II_8F_00*/ {0xd1, 22}, - /*II_C0_00*/ {0xd2, 967}, - /*II_C0_01*/ {0xd2, 972}, - /*II_C0_02*/ {0xd3, 977}, - /*II_C0_03*/ {0xd3, 982}, - /*II_C0_04*/ {0xd4, 987}, - /*II_C0_05*/ {0xd4, 992}, - /*II_C0_06*/ {0xd4, 997}, - /*II_C0_07*/ {0xd4, 1002}, - /*II_C1_00*/ {0xd5, 967}, - /*II_C1_01*/ {0xd5, 972}, - /*II_C1_02*/ {0xd6, 977}, - /*II_C1_03*/ {0xd6, 982}, - /*II_C1_04*/ {0xd7, 987}, - /*II_C1_05*/ {0xd7, 992}, - /*II_C1_06*/ {0xd7, 997}, - /*II_C1_07*/ {0xd7, 1002}, - /*II_C6_00*/ {0xd8, 218}, - /*II_C7_00*/ {0xd9, 218}, - /*II_D0_00*/ {0xda, 967}, - /*II_D0_01*/ {0xda, 972}, - /*II_D0_02*/ {0xdb, 977}, - /*II_D0_03*/ {0xdb, 982}, - /*II_D0_04*/ {0xdc, 987}, - /*II_D0_05*/ {0xdc, 992}, - /*II_D0_06*/ {0xdc, 997}, - /*II_D0_07*/ {0xdc, 1002}, - /*II_D1_00*/ {0xdd, 967}, - /*II_D1_01*/ {0xdd, 972}, - /*II_D1_02*/ {0xde, 977}, - /*II_D1_03*/ {0xde, 982}, - /*II_D1_04*/ {0xdf, 987}, - /*II_D1_05*/ {0xdf, 992}, - /*II_D1_06*/ {0xdf, 997}, - /*II_D1_07*/ {0xdf, 1002}, - /*II_D2_00*/ {0xe0, 967}, - /*II_D2_01*/ {0xe0, 972}, - /*II_D2_02*/ {0xe1, 977}, - /*II_D2_03*/ {0xe1, 982}, - /*II_D2_04*/ {0xe2, 987}, - /*II_D2_05*/ {0xe2, 992}, - /*II_D2_06*/ {0xe2, 997}, - /*II_D2_07*/ {0xe2, 1002}, - /*II_D3_00*/ {0xe3, 967}, - /*II_D3_01*/ {0xe3, 972}, - /*II_D3_02*/ {0xe4, 977}, - /*II_D3_03*/ {0xe4, 982}, - /*II_D3_04*/ {0xe5, 987}, - /*II_D3_05*/ {0xe5, 992}, - /*II_D3_06*/ {0xe5, 997}, - /*II_D3_07*/ {0xe5, 1002}, - /*II_D8_00*/ {0xe6, 1007}, - /*II_D8_01*/ {0xe6, 1013}, - /*II_D8_02*/ {0xe6, 1019}, - /*II_D8_03*/ {0xe6, 1025}, - /*II_D8_04*/ {0xe6, 1032}, - /*II_D8_05*/ {0xe6, 1038}, - /*II_D8_06*/ {0xe6, 1045}, - /*II_D8_07*/ {0xe6, 1051}, - /*II_D8_C0*/ {0xe7, 1007}, - /*II_D8_C0*/ {0xe7, 1007}, - /*II_D8_C0*/ {0xe7, 1007}, - /*II_D8_C0*/ {0xe7, 1007}, - /*II_D8_C0*/ {0xe7, 1007}, - /*II_D8_C0*/ {0xe7, 1007}, - /*II_D8_C0*/ {0xe7, 1007}, - /*II_D8_C0*/ {0xe7, 1007}, - /*II_D8_C8*/ {0xe7, 1013}, - /*II_D8_C8*/ {0xe7, 1013}, - /*II_D8_C8*/ {0xe7, 1013}, - /*II_D8_C8*/ {0xe7, 1013}, - /*II_D8_C8*/ {0xe7, 1013}, - /*II_D8_C8*/ {0xe7, 1013}, - /*II_D8_C8*/ {0xe7, 1013}, - /*II_D8_C8*/ {0xe7, 1013}, - /*II_D8_D0*/ {0xe8, 1019}, - /*II_D8_D0*/ {0xe8, 1019}, - /*II_D8_D0*/ {0xe8, 1019}, - /*II_D8_D0*/ {0xe8, 1019}, - /*II_D8_D0*/ {0xe8, 1019}, - /*II_D8_D0*/ {0xe8, 1019}, - /*II_D8_D0*/ {0xe8, 1019}, - /*II_D8_D0*/ {0xe8, 1019}, - /*II_D8_D8*/ {0xe8, 1025}, - /*II_D8_D9*/ {0xe9, 1025}, - /*II_D8_D8*/ {0xe8, 1025}, - /*II_D8_D8*/ {0xe8, 1025}, - /*II_D8_D8*/ {0xe8, 1025}, - /*II_D8_D8*/ {0xe8, 1025}, - /*II_D8_D8*/ {0xe8, 1025}, - /*II_D8_D8*/ {0xe8, 1025}, - /*II_D8_E0*/ {0xe7, 1032}, - /*II_D8_E0*/ {0xe7, 1032}, - /*II_D8_E0*/ {0xe7, 1032}, - /*II_D8_E0*/ {0xe7, 1032}, - /*II_D8_E0*/ {0xe7, 1032}, - /*II_D8_E0*/ {0xe7, 1032}, - /*II_D8_E0*/ {0xe7, 1032}, - /*II_D8_E0*/ {0xe7, 1032}, - /*II_D8_E8*/ {0xe7, 1038}, - /*II_D8_E8*/ {0xe7, 1038}, - /*II_D8_E8*/ {0xe7, 1038}, - /*II_D8_E8*/ {0xe7, 1038}, - /*II_D8_E8*/ {0xe7, 1038}, - /*II_D8_E8*/ {0xe7, 1038}, - /*II_D8_E8*/ {0xe7, 1038}, - /*II_D8_E8*/ {0xe7, 1038}, - /*II_D8_F0*/ {0xe7, 1045}, - /*II_D8_F0*/ {0xe7, 1045}, - /*II_D8_F0*/ {0xe7, 1045}, - /*II_D8_F0*/ {0xe7, 1045}, - /*II_D8_F0*/ {0xe7, 1045}, - /*II_D8_F0*/ {0xe7, 1045}, - /*II_D8_F0*/ {0xe7, 1045}, - /*II_D8_F0*/ {0xe7, 1045}, - /*II_D8_F8*/ {0xe7, 1051}, - /*II_D8_F8*/ {0xe7, 1051}, - /*II_D8_F8*/ {0xe7, 1051}, - /*II_D8_F8*/ {0xe7, 1051}, - /*II_D8_F8*/ {0xe7, 1051}, - /*II_D8_F8*/ {0xe7, 1051}, - /*II_D8_F8*/ {0xe7, 1051}, - /*II_D8_F8*/ {0xe7, 1051}, - /*II_D9_00*/ {0xe6, 1058}, - /*II_D9_02*/ {0xea, 1063}, - /*II_D9_03*/ {0xea, 1068}, - /*II_D9_04*/ {0xeb, 1074}, - /*II_D9_05*/ {0xec, 1082}, - /*II_D9_C0*/ {0xe8, 1058}, - /*II_D9_C0*/ {0xe8, 1058}, - /*II_D9_C0*/ {0xe8, 1058}, - /*II_D9_C0*/ {0xe8, 1058}, - /*II_D9_C0*/ {0xe8, 1058}, - /*II_D9_C0*/ {0xe8, 1058}, - /*II_D9_C0*/ {0xe8, 1058}, - /*II_D9_C0*/ {0xe8, 1058}, - /*II_D9_C8*/ {0xe8, 1089}, - /*II_D9_C9*/ {0xe9, 1089}, - /*II_D9_C8*/ {0xe8, 1089}, - /*II_D9_C8*/ {0xe8, 1089}, - /*II_D9_C8*/ {0xe8, 1089}, - /*II_D9_C8*/ {0xe8, 1089}, - /*II_D9_C8*/ {0xe8, 1089}, - /*II_D9_C8*/ {0xe8, 1089}, - /*II_D9_D0*/ {0xe9, 1095}, - /*II_D9_E0*/ {0xe9, 1101}, - /*II_D9_E1*/ {0xe9, 1107}, - /*II_D9_E4*/ {0xe9, 1113}, - /*II_D9_E5*/ {0xe9, 1119}, - /*II_D9_E8*/ {0xe9, 1125}, - /*II_D9_E9*/ {0xe9, 1131}, - /*II_D9_EA*/ {0xe9, 1139}, - /*II_D9_EB*/ {0xe9, 1147}, - /*II_D9_EC*/ {0xe9, 1154}, - /*II_D9_ED*/ {0xe9, 1162}, - /*II_D9_EE*/ {0xe9, 1170}, - /*II_D9_F0*/ {0xe9, 1176}, - /*II_D9_F1*/ {0xe9, 1183}, - /*II_D9_F2*/ {0xe9, 1190}, - /*II_D9_F3*/ {0xe9, 1197}, - /*II_D9_F4*/ {0xe9, 1205}, - /*II_D9_F5*/ {0xe9, 1214}, - /*II_D9_F6*/ {0xe9, 1222}, - /*II_D9_F7*/ {0xe9, 1231}, - /*II_D9_F8*/ {0xe9, 1240}, - /*II_D9_F9*/ {0xe9, 1247}, - /*II_D9_FA*/ {0xe9, 1256}, - /*II_D9_FB*/ {0xe9, 1263}, - /*II_D9_FC*/ {0xe9, 1272}, - /*II_D9_FD*/ {0xe9, 1281}, - /*II_D9_FE*/ {0xe9, 1289}, - /*II_D9_FF*/ {0xe9, 1295}, - /*II_DA_00*/ {0xe6, 1301}, - /*II_DA_01*/ {0xe6, 1308}, - /*II_DA_02*/ {0xe6, 1315}, - /*II_DA_03*/ {0xe6, 1322}, - /*II_DA_04*/ {0xe6, 1330}, - /*II_DA_05*/ {0xe6, 1337}, - /*II_DA_06*/ {0xe6, 1345}, - /*II_DA_07*/ {0xe6, 1352}, - /*II_DA_C0*/ {0xed, 1360}, - /*II_DA_C0*/ {0xed, 1360}, - /*II_DA_C0*/ {0xed, 1360}, - /*II_DA_C0*/ {0xed, 1360}, - /*II_DA_C0*/ {0xed, 1360}, - /*II_DA_C0*/ {0xed, 1360}, - /*II_DA_C0*/ {0xed, 1360}, - /*II_DA_C0*/ {0xed, 1360}, - /*II_DA_C8*/ {0xee, 1368}, - /*II_DA_C8*/ {0xee, 1368}, - /*II_DA_C8*/ {0xee, 1368}, - /*II_DA_C8*/ {0xee, 1368}, - /*II_DA_C8*/ {0xee, 1368}, - /*II_DA_C8*/ {0xee, 1368}, - /*II_DA_C8*/ {0xee, 1368}, - /*II_DA_C8*/ {0xee, 1368}, - /*II_DA_D0*/ {0xef, 1376}, - /*II_DA_D0*/ {0xef, 1376}, - /*II_DA_D0*/ {0xef, 1376}, - /*II_DA_D0*/ {0xef, 1376}, - /*II_DA_D0*/ {0xef, 1376}, - /*II_DA_D0*/ {0xef, 1376}, - /*II_DA_D0*/ {0xef, 1376}, - /*II_DA_D0*/ {0xef, 1376}, - /*II_DA_D8*/ {0xf0, 1385}, - /*II_DA_D8*/ {0xf0, 1385}, - /*II_DA_D8*/ {0xf0, 1385}, - /*II_DA_D8*/ {0xf0, 1385}, - /*II_DA_D8*/ {0xf0, 1385}, - /*II_DA_D8*/ {0xf0, 1385}, - /*II_DA_D8*/ {0xf0, 1385}, - /*II_DA_D8*/ {0xf0, 1385}, - /*II_DA_E9*/ {0xe9, 1393}, - /*II_DB_00*/ {0xe6, 1402}, - /*II_DB_01*/ {0xf1, 1408}, - /*II_DB_02*/ {0xea, 1416}, - /*II_DB_03*/ {0xea, 1422}, - /*II_DB_05*/ {0xf2, 1058}, - /*II_DB_07*/ {0xf3, 1068}, - /*II_DB_C0*/ {0xed, 1429}, - /*II_DB_C0*/ {0xed, 1429}, - /*II_DB_C0*/ {0xed, 1429}, - /*II_DB_C0*/ {0xed, 1429}, - /*II_DB_C0*/ {0xed, 1429}, - /*II_DB_C0*/ {0xed, 1429}, - /*II_DB_C0*/ {0xed, 1429}, - /*II_DB_C0*/ {0xed, 1429}, - /*II_DB_C8*/ {0xee, 1438}, - /*II_DB_C8*/ {0xee, 1438}, - /*II_DB_C8*/ {0xee, 1438}, - /*II_DB_C8*/ {0xee, 1438}, - /*II_DB_C8*/ {0xee, 1438}, - /*II_DB_C8*/ {0xee, 1438}, - /*II_DB_C8*/ {0xee, 1438}, - /*II_DB_C8*/ {0xee, 1438}, - /*II_DB_D0*/ {0xef, 1447}, - /*II_DB_D0*/ {0xef, 1447}, - /*II_DB_D0*/ {0xef, 1447}, - /*II_DB_D0*/ {0xef, 1447}, - /*II_DB_D0*/ {0xef, 1447}, - /*II_DB_D0*/ {0xef, 1447}, - /*II_DB_D0*/ {0xef, 1447}, - /*II_DB_D0*/ {0xef, 1447}, - /*II_DB_D8*/ {0xf0, 1457}, - /*II_DB_D8*/ {0xf0, 1457}, - /*II_DB_D8*/ {0xf0, 1457}, - /*II_DB_D8*/ {0xf0, 1457}, - /*II_DB_D8*/ {0xf0, 1457}, - /*II_DB_D8*/ {0xf0, 1457}, - /*II_DB_D8*/ {0xf0, 1457}, - /*II_DB_D8*/ {0xf0, 1457}, - /*II_DB_E0*/ {0xe9, 1466}, - /*II_DB_E1*/ {0xe9, 1472}, - /*II_DB_E4*/ {0xe9, 1480}, - /*II_DB_E8*/ {0xf4, 1488}, - /*II_DB_E8*/ {0xf4, 1488}, - /*II_DB_E8*/ {0xf4, 1488}, - /*II_DB_E8*/ {0xf4, 1488}, - /*II_DB_E8*/ {0xf4, 1488}, - /*II_DB_E8*/ {0xf4, 1488}, - /*II_DB_E8*/ {0xf4, 1488}, - /*II_DB_E8*/ {0xf4, 1488}, - /*II_DB_F0*/ {0xf5, 1496}, - /*II_DB_F0*/ {0xf5, 1496}, - /*II_DB_F0*/ {0xf5, 1496}, - /*II_DB_F0*/ {0xf5, 1496}, - /*II_DB_F0*/ {0xf5, 1496}, - /*II_DB_F0*/ {0xf5, 1496}, - /*II_DB_F0*/ {0xf5, 1496}, - /*II_DB_F0*/ {0xf5, 1496}, - /*II_DC_00*/ {0xf6, 1007}, - /*II_DC_01*/ {0xf6, 1013}, - /*II_DC_02*/ {0xf6, 1019}, - /*II_DC_03*/ {0xf6, 1025}, - /*II_DC_04*/ {0xf6, 1032}, - /*II_DC_05*/ {0xf6, 1038}, - /*II_DC_06*/ {0xf6, 1045}, - /*II_DC_07*/ {0xf6, 1051}, - /*II_DC_C0*/ {0xf7, 1007}, - /*II_DC_C0*/ {0xf7, 1007}, - /*II_DC_C0*/ {0xf7, 1007}, - /*II_DC_C0*/ {0xf7, 1007}, - /*II_DC_C0*/ {0xf7, 1007}, - /*II_DC_C0*/ {0xf7, 1007}, - /*II_DC_C0*/ {0xf7, 1007}, - /*II_DC_C0*/ {0xf7, 1007}, - /*II_DC_C8*/ {0xf7, 1013}, - /*II_DC_C8*/ {0xf7, 1013}, - /*II_DC_C8*/ {0xf7, 1013}, - /*II_DC_C8*/ {0xf7, 1013}, - /*II_DC_C8*/ {0xf7, 1013}, - /*II_DC_C8*/ {0xf7, 1013}, - /*II_DC_C8*/ {0xf7, 1013}, - /*II_DC_C8*/ {0xf7, 1013}, - /*II_DC_E0*/ {0xf7, 1038}, - /*II_DC_E0*/ {0xf7, 1038}, - /*II_DC_E0*/ {0xf7, 1038}, - /*II_DC_E0*/ {0xf7, 1038}, - /*II_DC_E0*/ {0xf7, 1038}, - /*II_DC_E0*/ {0xf7, 1038}, - /*II_DC_E0*/ {0xf7, 1038}, - /*II_DC_E0*/ {0xf7, 1038}, - /*II_DC_E8*/ {0xf7, 1032}, - /*II_DC_E8*/ {0xf7, 1032}, - /*II_DC_E8*/ {0xf7, 1032}, - /*II_DC_E8*/ {0xf7, 1032}, - /*II_DC_E8*/ {0xf7, 1032}, - /*II_DC_E8*/ {0xf7, 1032}, - /*II_DC_E8*/ {0xf7, 1032}, - /*II_DC_E8*/ {0xf7, 1032}, - /*II_DC_F0*/ {0xf7, 1051}, - /*II_DC_F0*/ {0xf7, 1051}, - /*II_DC_F0*/ {0xf7, 1051}, - /*II_DC_F0*/ {0xf7, 1051}, - /*II_DC_F0*/ {0xf7, 1051}, - /*II_DC_F0*/ {0xf7, 1051}, - /*II_DC_F0*/ {0xf7, 1051}, - /*II_DC_F0*/ {0xf7, 1051}, - /*II_DC_F8*/ {0xf7, 1045}, - /*II_DC_F8*/ {0xf7, 1045}, - /*II_DC_F8*/ {0xf7, 1045}, - /*II_DC_F8*/ {0xf7, 1045}, - /*II_DC_F8*/ {0xf7, 1045}, - /*II_DC_F8*/ {0xf7, 1045}, - /*II_DC_F8*/ {0xf7, 1045}, - /*II_DC_F8*/ {0xf7, 1045}, - /*II_DD_00*/ {0xf6, 1058}, - /*II_DD_01*/ {0xf8, 1408}, - /*II_DD_02*/ {0xf9, 1063}, - /*II_DD_03*/ {0xf9, 1068}, - /*II_DD_04*/ {0xeb, 1503}, - /*II_DD_C0*/ {0xe8, 1511}, - /*II_DD_C0*/ {0xe8, 1511}, - /*II_DD_C0*/ {0xe8, 1511}, - /*II_DD_C0*/ {0xe8, 1511}, - /*II_DD_C0*/ {0xe8, 1511}, - /*II_DD_C0*/ {0xe8, 1511}, - /*II_DD_C0*/ {0xe8, 1511}, - /*II_DD_C0*/ {0xe8, 1511}, - /*II_DD_D0*/ {0xe8, 1063}, - /*II_DD_D0*/ {0xe8, 1063}, - /*II_DD_D0*/ {0xe8, 1063}, - /*II_DD_D0*/ {0xe8, 1063}, - /*II_DD_D0*/ {0xe8, 1063}, - /*II_DD_D0*/ {0xe8, 1063}, - /*II_DD_D0*/ {0xe8, 1063}, - /*II_DD_D0*/ {0xe8, 1063}, - /*II_DD_D8*/ {0xe8, 1068}, - /*II_DD_D8*/ {0xe8, 1068}, - /*II_DD_D8*/ {0xe8, 1068}, - /*II_DD_D8*/ {0xe8, 1068}, - /*II_DD_D8*/ {0xe8, 1068}, - /*II_DD_D8*/ {0xe8, 1068}, - /*II_DD_D8*/ {0xe8, 1068}, - /*II_DD_D8*/ {0xe8, 1068}, - /*II_DD_E0*/ {0xf7, 1518}, - /*II_DD_E1*/ {0xe9, 1518}, - /*II_DD_E0*/ {0xf7, 1518}, - /*II_DD_E0*/ {0xf7, 1518}, - /*II_DD_E0*/ {0xf7, 1518}, - /*II_DD_E0*/ {0xf7, 1518}, - /*II_DD_E0*/ {0xf7, 1518}, - /*II_DD_E0*/ {0xf7, 1518}, - /*II_DD_E8*/ {0xe8, 1525}, - /*II_DD_E9*/ {0xe9, 1525}, - /*II_DD_E8*/ {0xe8, 1525}, - /*II_DD_E8*/ {0xe8, 1525}, - /*II_DD_E8*/ {0xe8, 1525}, - /*II_DD_E8*/ {0xe8, 1525}, - /*II_DD_E8*/ {0xe8, 1525}, - /*II_DD_E8*/ {0xe8, 1525}, - /*II_DE_00*/ {0xec, 1301}, - /*II_DE_01*/ {0xec, 1308}, - /*II_DE_02*/ {0xec, 1315}, - /*II_DE_03*/ {0xec, 1322}, - /*II_DE_04*/ {0xec, 1330}, - /*II_DE_05*/ {0xec, 1337}, - /*II_DE_06*/ {0xec, 1345}, - /*II_DE_07*/ {0xec, 1352}, - /*II_DE_C0*/ {0xf7, 1533}, - /*II_DE_C1*/ {0xe9, 1533}, - /*II_DE_C0*/ {0xf7, 1533}, - /*II_DE_C0*/ {0xf7, 1533}, - /*II_DE_C0*/ {0xf7, 1533}, - /*II_DE_C0*/ {0xf7, 1533}, - /*II_DE_C0*/ {0xf7, 1533}, - /*II_DE_C0*/ {0xf7, 1533}, - /*II_DE_C8*/ {0xf7, 1540}, - /*II_DE_C9*/ {0xe9, 1540}, - /*II_DE_C8*/ {0xf7, 1540}, - /*II_DE_C8*/ {0xf7, 1540}, - /*II_DE_C8*/ {0xf7, 1540}, - /*II_DE_C8*/ {0xf7, 1540}, - /*II_DE_C8*/ {0xf7, 1540}, - /*II_DE_C8*/ {0xf7, 1540}, - /*II_DE_D9*/ {0xe9, 1547}, - /*II_DE_E0*/ {0xf7, 1555}, - /*II_DE_E1*/ {0xe9, 1555}, - /*II_DE_E0*/ {0xf7, 1555}, - /*II_DE_E0*/ {0xf7, 1555}, - /*II_DE_E0*/ {0xf7, 1555}, - /*II_DE_E0*/ {0xf7, 1555}, - /*II_DE_E0*/ {0xf7, 1555}, - /*II_DE_E0*/ {0xf7, 1555}, - /*II_DE_E8*/ {0xf7, 1563}, - /*II_DE_E9*/ {0xe9, 1563}, - /*II_DE_E8*/ {0xf7, 1563}, - /*II_DE_E8*/ {0xf7, 1563}, - /*II_DE_E8*/ {0xf7, 1563}, - /*II_DE_E8*/ {0xf7, 1563}, - /*II_DE_E8*/ {0xf7, 1563}, - /*II_DE_E8*/ {0xf7, 1563}, - /*II_DE_F0*/ {0xf7, 1570}, - /*II_DE_F1*/ {0xe9, 1570}, - /*II_DE_F0*/ {0xf7, 1570}, - /*II_DE_F0*/ {0xf7, 1570}, - /*II_DE_F0*/ {0xf7, 1570}, - /*II_DE_F0*/ {0xf7, 1570}, - /*II_DE_F0*/ {0xf7, 1570}, - /*II_DE_F0*/ {0xf7, 1570}, - /*II_DE_F8*/ {0xf7, 1578}, - /*II_DE_F9*/ {0xe9, 1578}, - /*II_DE_F8*/ {0xf7, 1578}, - /*II_DE_F8*/ {0xf7, 1578}, - /*II_DE_F8*/ {0xf7, 1578}, - /*II_DE_F8*/ {0xf7, 1578}, - /*II_DE_F8*/ {0xf7, 1578}, - /*II_DE_F8*/ {0xf7, 1578}, - /*II_DF_00*/ {0xec, 1402}, - /*II_DF_01*/ {0xfa, 1408}, - /*II_DF_02*/ {0xfb, 1416}, - /*II_DF_03*/ {0xfb, 1422}, - /*II_DF_04*/ {0xf2, 1585}, - /*II_DF_05*/ {0xf6, 1402}, - /*II_DF_06*/ {0xf3, 1591}, - /*II_DF_07*/ {0xf9, 1422}, - /*II_DF_E8*/ {0xf4, 1598}, - /*II_DF_E8*/ {0xf4, 1598}, - /*II_DF_E8*/ {0xf4, 1598}, - /*II_DF_E8*/ {0xf4, 1598}, - /*II_DF_E8*/ {0xf4, 1598}, - /*II_DF_E8*/ {0xf4, 1598}, - /*II_DF_E8*/ {0xf4, 1598}, - /*II_DF_E8*/ {0xf4, 1598}, - /*II_DF_F0*/ {0xf4, 1607}, - /*II_DF_F0*/ {0xf4, 1607}, - /*II_DF_F0*/ {0xf4, 1607}, - /*II_DF_F0*/ {0xf4, 1607}, - /*II_DF_F0*/ {0xf4, 1607}, - /*II_DF_F0*/ {0xf4, 1607}, - /*II_DF_F0*/ {0xf4, 1607}, - /*II_DF_F0*/ {0xf4, 1607}, - /*II_F6_00*/ {0xfc, 206}, - /*II_F6_02*/ {0xfd, 1615}, - /*II_F6_03*/ {0xfe, 1620}, - /*II_F6_04*/ {0xff, 1625}, - /*II_F6_05*/ {0xff, 117}, - /*II_F6_06*/ {0x100, 1630}, - /*II_F6_07*/ {0x100, 1635}, - /*II_F7_00*/ {0x101, 206}, - /*II_F7_02*/ {0x102, 1615}, - /*II_F7_03*/ {0x103, 1620}, - /*II_F7_04*/ {0x104, 1625}, - /*II_F7_05*/ {0x104, 117}, - /*II_F7_06*/ {0x105, 1630}, - /*II_F7_07*/ {0x105, 1635}, - /*II_FE_00*/ {0x106, 81}, - /*II_FE_01*/ {0x106, 86}, - /*II_FF_00*/ {0x107, 81}, - /*II_FF_01*/ {0x107, 86}, - /*II_FF_02*/ {0x108, 456}, - /*II_FF_03*/ {0x109, 260}, - /*II_FF_04*/ {0x10a, 462}, - /*II_FF_05*/ {0x10b, 467}, - /*II_FF_06*/ {0x10c, 16}, - /*II_0F_00_00*/ {0x10d, 1641}, - /*II_0F_00_01*/ {0x10e, 1647}, - /*II_0F_00_02*/ {0x10e, 34420}, - /*II_0F_00_03*/ {0x10f, 34426}, - /*II_0F_00_04*/ {0x110, 1663}, - /*II_0F_00_05*/ {0x110, 1669}, - /*II_0F_01_00*/ {0x111, 1675}, - /*II_0F_01_01*/ {0x111, 1681}, - /*II_0F_01_02*/ {0x111, 34455}, - /*II_0F_01_03*/ {0x111, 34461}, - /*II_0F_01_04*/ {0x112, 1699}, - /*II_0F_01_06*/ {0x113, 34473}, - /*II_0F_01_07*/ {0x114, 34479}, - /*II_0F_01_C1*/ {0x115, 1719}, - /*II_0F_01_C2*/ {0x115, 1727}, - /*II_0F_01_C3*/ {0x115, 1737}, - /*II_0F_01_C4*/ {0x115, 1747}, - /*II_0F_01_C8*/ {0x116, 1755}, - /*II_0F_01_C9*/ {0x116, 1764}, - /*II_0F_01_D0*/ {0x88, 1771}, - /*II_0F_01_D1*/ {0x88, 1779}, - /*II_0F_01_D4*/ {0x115, 1787}, - /*II_0F_01_D8*/ {0x117, 1795}, - /*II_0F_01_D9*/ {0x118, 1802}, - /*II_0F_01_DA*/ {0x119, 1811}, - /*II_0F_01_DB*/ {0x119, 1819}, - /*II_0F_01_DC*/ {0x118, 1827}, - /*II_0F_01_DD*/ {0x118, 1833}, - /*II_0F_01_DE*/ {0x119, 1839}, - /*II_0F_01_DF*/ {0x11a, 1847}, - /*II_0F_01_F8*/ {0x11b, 1856}, - /*II_0F_01_F9*/ {0x11b, 1864}, - /*II_0F_0D_00*/ {0x11c, 1872}, - /*II_0F_0D_01*/ {0x11c, 1882}, - /*II_0F_0F_0C*/ {0x11d, 1893}, - /*II_0F_0F_0D*/ {0x11e, 1900}, - /*II_0F_0F_1C*/ {0x11d, 1907}, - /*II_0F_0F_1D*/ {0x11e, 1914}, - /*II_0F_0F_8A*/ {0x11d, 1921}, - /*II_0F_0F_8E*/ {0x11d, 1929}, - /*II_0F_0F_90*/ {0x11e, 1938}, - /*II_0F_0F_94*/ {0x11e, 1947}, - /*II_0F_0F_96*/ {0x11e, 1954}, - /*II_0F_0F_97*/ {0x11e, 1961}, - /*II_0F_0F_9A*/ {0x11e, 1970}, - /*II_0F_0F_9E*/ {0x11e, 1977}, - /*II_0F_0F_A0*/ {0x11e, 1984}, - /*II_0F_0F_A4*/ {0x11e, 1993}, - /*II_0F_0F_A6*/ {0x11e, 2000}, - /*II_0F_0F_A7*/ {0x11e, 2010}, - /*II_0F_0F_AA*/ {0x11e, 2020}, - /*II_0F_0F_AE*/ {0x11e, 2028}, - /*II_0F_0F_B0*/ {0x11e, 2035}, - /*II_0F_0F_B4*/ {0x11e, 2044}, - /*II_0F_0F_B6*/ {0x11e, 2051}, - /*II_0F_0F_B7*/ {0x11e, 2061}, - /*II_0F_0F_BB*/ {0x11d, 2070}, - /*II_0F_0F_BF*/ {0x11e, 2078}, - /*II_0F_10*/ {0x11f, 2087}, - /*II_66_0F_10*/ {0x120, 2095}, - /*II_F3_0F_10*/ {0x121, 2103}, - /*II_F2_0F_10*/ {0x122, 2110}, - /*II_0F_11*/ {0x127, 2087}, - /*II_66_0F_11*/ {0x128, 2095}, - /*II_F3_0F_11*/ {0x129, 2103}, - /*II_F2_0F_11*/ {0x12a, 2110}, - /*II_66_0F_12*/ {0x12f, 2168}, - /*II_F3_0F_12*/ {0x130, 2176}, - /*II_F2_0F_12*/ {0x130, 2186}, - /*II_0F_13*/ {0x134, 2160}, - /*II_66_0F_13*/ {0x135, 2168}, - /*II_0F_14*/ {0x137, 2244}, - /*II_66_0F_14*/ {0x138, 2254}, - /*II_0F_15*/ {0x137, 2286}, - /*II_66_0F_15*/ {0x138, 2296}, - /*II_66_0F_16*/ {0x12f, 2345}, - /*II_F3_0F_16*/ {0x13a, 2353}, - /*II_0F_17*/ {0x134, 2337}, - /*II_66_0F_17*/ {0x135, 2345}, - /*II_0F_18_00*/ {0x13b, 2402}, - /*II_0F_18_01*/ {0x13b, 2415}, - /*II_0F_18_02*/ {0x13b, 2427}, - /*II_0F_18_03*/ {0x13b, 2439}, - /*II_0F_28*/ {0x11f, 2451}, - /*II_66_0F_28*/ {0x120, 2459}, - /*II_0F_29*/ {0x127, 2451}, - /*II_66_0F_29*/ {0x128, 2459}, - /*II_0F_2A*/ {0x13c, 2485}, - /*II_66_0F_2A*/ {0x13d, 2495}, - /*II_F3_0F_2A*/ {0x13e, 2505}, - /*II_F2_0F_2A*/ {0x13f, 2515}, - /*II_0F_2B*/ {0x140, 2547}, - /*II_66_0F_2B*/ {0x141, 2556}, - /*II_F3_0F_2B*/ {0x142, 2565}, - /*II_F2_0F_2B*/ {0x143, 2574}, - /*II_0F_2C*/ {0x145, 2603}, - /*II_66_0F_2C*/ {0x146, 2614}, - /*II_F3_0F_2C*/ {0x147, 2625}, - /*II_F2_0F_2C*/ {0x148, 2636}, - /*II_0F_2D*/ {0x145, 2671}, - /*II_66_0F_2D*/ {0x138, 2681}, - /*II_F3_0F_2D*/ {0x147, 2691}, - /*II_F2_0F_2D*/ {0x148, 2701}, - /*II_0F_2E*/ {0x14a, 2733}, - /*II_66_0F_2E*/ {0x14b, 2742}, - /*II_0F_2F*/ {0x14a, 2771}, - /*II_66_0F_2F*/ {0x14b, 2779}, - /*II_0F_50*/ {0x14e, 2805}, - /*II_66_0F_50*/ {0x14f, 2815}, - /*II_0F_51*/ {0x137, 2847}, - /*II_66_0F_51*/ {0x138, 2855}, - /*II_F3_0F_51*/ {0x151, 2863}, - /*II_F2_0F_51*/ {0x14b, 2871}, - /*II_0F_52*/ {0x137, 2915}, - /*II_F3_0F_52*/ {0x151, 2924}, - /*II_0F_53*/ {0x137, 2953}, - /*II_F3_0F_53*/ {0x151, 2960}, - /*II_0F_54*/ {0x137, 2983}, - /*II_66_0F_54*/ {0x138, 2990}, - /*II_0F_55*/ {0x137, 3013}, - /*II_66_0F_55*/ {0x138, 3021}, - /*II_0F_56*/ {0x137, 3047}, - /*II_66_0F_56*/ {0x138, 3053}, - /*II_0F_57*/ {0x137, 3073}, - /*II_66_0F_57*/ {0x138, 3080}, - /*II_0F_58*/ {0x137, 3103}, - /*II_66_0F_58*/ {0x138, 3110}, - /*II_F3_0F_58*/ {0x151, 3117}, - /*II_F2_0F_58*/ {0x14b, 3124}, - /*II_0F_59*/ {0x137, 3163}, - /*II_66_0F_59*/ {0x138, 3170}, - /*II_F3_0F_59*/ {0x151, 3177}, - /*II_F2_0F_59*/ {0x14b, 3184}, - /*II_0F_5A*/ {0x14b, 3223}, - /*II_66_0F_5A*/ {0x138, 3233}, - /*II_F3_0F_5A*/ {0x152, 3243}, - /*II_F2_0F_5A*/ {0x14b, 3253}, - /*II_0F_5B*/ {0x138, 3307}, - /*II_66_0F_5B*/ {0x138, 3317}, - /*II_F3_0F_5B*/ {0x138, 3327}, - /*II_0F_5C*/ {0x137, 3372}, - /*II_66_0F_5C*/ {0x138, 3379}, - /*II_F3_0F_5C*/ {0x151, 3386}, - /*II_F2_0F_5C*/ {0x14b, 3393}, - /*II_0F_5D*/ {0x137, 3432}, - /*II_66_0F_5D*/ {0x138, 3439}, - /*II_F3_0F_5D*/ {0x151, 3446}, - /*II_F2_0F_5D*/ {0x14b, 3453}, - /*II_0F_5E*/ {0x137, 3492}, - /*II_66_0F_5E*/ {0x138, 3499}, - /*II_F3_0F_5E*/ {0x151, 3506}, - /*II_F2_0F_5E*/ {0x14b, 3513}, - /*II_0F_5F*/ {0x137, 3552}, - /*II_66_0F_5F*/ {0x138, 3559}, - /*II_F3_0F_5F*/ {0x151, 3566}, - /*II_F2_0F_5F*/ {0x14b, 3573}, - /*II_0F_60*/ {0x155, 3612}, - /*II_66_0F_60*/ {0x138, 3612}, - /*II_0F_61*/ {0x155, 3635}, - /*II_66_0F_61*/ {0x138, 3635}, - /*II_0F_62*/ {0x155, 3658}, - /*II_66_0F_62*/ {0x138, 3658}, - /*II_0F_63*/ {0x156, 3681}, - /*II_66_0F_63*/ {0x138, 3681}, - /*II_0F_64*/ {0x156, 3702}, - /*II_66_0F_64*/ {0x138, 3702}, - /*II_0F_65*/ {0x156, 3721}, - /*II_66_0F_65*/ {0x138, 3721}, - /*II_0F_66*/ {0x156, 3740}, - /*II_66_0F_66*/ {0x138, 3740}, - /*II_0F_67*/ {0x156, 3759}, - /*II_66_0F_67*/ {0x138, 3759}, - /*II_0F_68*/ {0x156, 3780}, - /*II_66_0F_68*/ {0x138, 3780}, - /*II_0F_69*/ {0x156, 3803}, - /*II_66_0F_69*/ {0x138, 3803}, - /*II_0F_6A*/ {0x156, 3826}, - /*II_66_0F_6A*/ {0x138, 3826}, - /*II_0F_6B*/ {0x156, 3849}, - /*II_66_0F_6B*/ {0x138, 3849}, - /*II_66_0F_6C*/ {0x138, 3870}, - /*II_66_0F_6D*/ {0x138, 3895}, - /*II_0F_6F*/ {0x15a, 3926}, - /*II_66_0F_6F*/ {0x120, 3946}, - /*II_F3_0F_6F*/ {0x120, 3954}, - /*II_0F_74*/ {0x156, 4043}, - /*II_66_0F_74*/ {0x138, 4043}, - /*II_0F_75*/ {0x156, 4062}, - /*II_66_0F_75*/ {0x138, 4062}, - /*II_0F_76*/ {0x156, 4081}, - /*II_66_0F_76*/ {0x138, 4081}, - /*II_0F_77*/ {0x15e, 4100}, - /*II_0F_78*/ {0x160, 4128}, - /*II_0F_79*/ {0x163, 4152}, - /*II_66_0F_79*/ {0x164, 4136}, - /*II_F2_0F_79*/ {0x165, 4143}, - /*II_0F_7A_30*/ {0x166, 4161}, - /*II_0F_7A_31*/ {0x167, 4171}, - /*II_66_0F_7C*/ {0x168, 4181}, - /*II_F2_0F_7C*/ {0x168, 4189}, - /*II_66_0F_7D*/ {0x168, 4215}, - /*II_F2_0F_7D*/ {0x168, 4223}, - /*II_F3_0F_7E*/ {0x122, 3926}, - /*II_0F_7F*/ {0x16c, 3926}, - /*II_66_0F_7F*/ {0x128, 3946}, - /*II_F3_0F_7F*/ {0x128, 3954}, - /*II_F3_0F_B8*/ {0x170, 4338}, - /*II_0F_BA_04*/ {0x171, 872}, - /*II_0F_BA_05*/ {0x172, 887}, - /*II_0F_BA_06*/ {0x172, 912}, - /*II_0F_BA_07*/ {0x172, 934}, - /*II_0F_BC*/ {0x173, 4346}, - /*II_F3_0F_BC*/ {0x174, 4351}, - /*II_0F_BD*/ {0x173, 4358}, - /*II_F3_0F_BD*/ {0x175, 4363}, - /*II_0F_C7_07*/ {0x185, 6385}, - /*II_66_0F_D0*/ {0x168, 6394}, - /*II_F2_0F_D0*/ {0x168, 6404}, - /*II_0F_D1*/ {0x156, 6436}, - /*II_66_0F_D1*/ {0x138, 6436}, - /*II_0F_D2*/ {0x156, 6451}, - /*II_66_0F_D2*/ {0x138, 6451}, - /*II_0F_D3*/ {0x156, 6466}, - /*II_66_0F_D3*/ {0x138, 6466}, - /*II_0F_D4*/ {0x14b, 6481}, - /*II_66_0F_D4*/ {0x138, 6481}, - /*II_0F_D5*/ {0x156, 6496}, - /*II_66_0F_D5*/ {0x138, 6496}, - /*II_66_0F_D6*/ {0x12a, 3926}, - /*II_F3_0F_D6*/ {0x186, 6513}, - /*II_F2_0F_D6*/ {0x187, 6522}, - /*II_0F_D7*/ {0x189, 6531}, - /*II_66_0F_D7*/ {0x18a, 6531}, - /*II_0F_D8*/ {0x156, 6552}, - /*II_66_0F_D8*/ {0x138, 6552}, - /*II_0F_D9*/ {0x156, 6571}, - /*II_66_0F_D9*/ {0x138, 6571}, - /*II_0F_DA*/ {0x18c, 6590}, - /*II_66_0F_DA*/ {0x138, 6590}, - /*II_0F_DB*/ {0x156, 6607}, - /*II_66_0F_DB*/ {0x138, 6607}, - /*II_0F_DC*/ {0x156, 6620}, - /*II_66_0F_DC*/ {0x138, 6620}, - /*II_0F_DD*/ {0x156, 6639}, - /*II_66_0F_DD*/ {0x138, 6639}, - /*II_0F_DE*/ {0x18c, 6648}, - /*II_66_0F_DE*/ {0x138, 6648}, - /*II_0F_DF*/ {0x156, 6665}, - /*II_66_0F_DF*/ {0x138, 6665}, - /*II_0F_E0*/ {0x18c, 6680}, - /*II_66_0F_E0*/ {0x138, 6680}, - /*II_0F_E1*/ {0x156, 6695}, - /*II_66_0F_E1*/ {0x138, 6695}, - /*II_0F_E2*/ {0x156, 6710}, - /*II_66_0F_E2*/ {0x138, 6710}, - /*II_0F_E3*/ {0x18c, 6725}, - /*II_66_0F_E3*/ {0x138, 6725}, - /*II_0F_E4*/ {0x18c, 6740}, - /*II_66_0F_E4*/ {0x138, 6740}, - /*II_0F_E5*/ {0x156, 6759}, - /*II_66_0F_E5*/ {0x138, 6759}, - /*II_66_0F_E6*/ {0x138, 6776}, - /*II_F3_0F_E6*/ {0x14b, 6787}, - /*II_F2_0F_E6*/ {0x138, 6797}, - /*II_0F_E7*/ {0x18d, 6841}, - /*II_66_0F_E7*/ {0x141, 6849}, - /*II_0F_E8*/ {0x156, 6868}, - /*II_66_0F_E8*/ {0x138, 6868}, - /*II_0F_E9*/ {0x156, 6885}, - /*II_66_0F_E9*/ {0x138, 6885}, - /*II_0F_EA*/ {0x18c, 6902}, - /*II_66_0F_EA*/ {0x138, 6902}, - /*II_0F_EB*/ {0x156, 6919}, - /*II_66_0F_EB*/ {0x138, 6919}, - /*II_0F_EC*/ {0x156, 6930}, - /*II_66_0F_EC*/ {0x138, 6930}, - /*II_0F_ED*/ {0x156, 6947}, - /*II_66_0F_ED*/ {0x138, 6947}, - /*II_0F_EE*/ {0x18c, 6964}, - /*II_66_0F_EE*/ {0x138, 6964}, - /*II_0F_EF*/ {0x156, 6981}, - /*II_66_0F_EF*/ {0x138, 6981}, - /*II_F2_0F_F0*/ {0x18e, 6994}, - /*II_0F_F1*/ {0x156, 7009}, - /*II_66_0F_F1*/ {0x138, 7009}, - /*II_0F_F2*/ {0x156, 7024}, - /*II_66_0F_F2*/ {0x138, 7024}, - /*II_0F_F3*/ {0x156, 7039}, - /*II_66_0F_F3*/ {0x138, 7039}, - /*II_0F_F4*/ {0x190, 7054}, - /*II_66_0F_F4*/ {0x138, 7054}, - /*II_0F_F5*/ {0x156, 7073}, - /*II_66_0F_F5*/ {0x138, 7073}, - /*II_0F_F6*/ {0x18c, 7092}, - /*II_66_0F_F6*/ {0x138, 7092}, - /*II_0F_F7*/ {0x191, 7109}, - /*II_66_0F_F7*/ {0x192, 7119}, - /*II_0F_F8*/ {0x156, 7144}, - /*II_66_0F_F8*/ {0x138, 7144}, - /*II_0F_F9*/ {0x156, 7159}, - /*II_66_0F_F9*/ {0x138, 7159}, - /*II_0F_FA*/ {0x156, 7174}, - /*II_66_0F_FA*/ {0x138, 7174}, - /*II_0F_FB*/ {0x190, 7189}, - /*II_66_0F_FB*/ {0x138, 7189}, - /*II_0F_FC*/ {0x156, 7204}, - /*II_66_0F_FC*/ {0x138, 7204}, - /*II_0F_FD*/ {0x156, 7219}, - /*II_66_0F_FD*/ {0x138, 7219}, - /*II_0F_FE*/ {0x156, 7234}, - /*II_66_0F_FE*/ {0x138, 7234}, - /*II_D9_06*/ {0x194, 7249}, - /*II_9B_D9_06*/ {0x195, 7258}, - /*II_D9_07*/ {0xfb, 7266}, - /*II_9B_D9_07*/ {0x196, 7274}, - /*II_DB_E2*/ {0xe9, 7281}, - /*II_9B_DB_E2*/ {0x197, 7289}, - /*II_DB_E3*/ {0xe9, 7296}, - /*II_9B_DB_E3*/ {0x197, 7304}, - /*II_DD_06*/ {0x194, 7311}, - /*II_9B_DD_06*/ {0x195, 7319}, - /*II_DD_07*/ {0xfb, 7326}, - /*II_9B_DD_07*/ {0x196, 7334}, - /*II_DF_E0*/ {0x198, 7326}, - /*II_9B_DF_E0*/ {0x199, 7334}, - /*II_0F_38_00*/ {0x19a, 7341}, - /*II_66_0F_38_00*/ {0x19b, 7341}, - /*II_0F_38_01*/ {0x19a, 7358}, - /*II_66_0F_38_01*/ {0x19b, 7358}, - /*II_0F_38_02*/ {0x19a, 7375}, - /*II_66_0F_38_02*/ {0x19b, 7375}, - /*II_0F_38_03*/ {0x19a, 7392}, - /*II_66_0F_38_03*/ {0x19b, 7392}, - /*II_0F_38_04*/ {0x19a, 7411}, - /*II_66_0F_38_04*/ {0x19b, 7411}, - /*II_0F_38_05*/ {0x19a, 7434}, - /*II_66_0F_38_05*/ {0x19b, 7434}, - /*II_0F_38_06*/ {0x19a, 7451}, - /*II_66_0F_38_06*/ {0x19b, 7451}, - /*II_0F_38_07*/ {0x19a, 7468}, - /*II_66_0F_38_07*/ {0x19b, 7468}, - /*II_0F_38_08*/ {0x19a, 7487}, - /*II_66_0F_38_08*/ {0x19b, 7487}, - /*II_0F_38_09*/ {0x19a, 7504}, - /*II_66_0F_38_09*/ {0x19b, 7504}, - /*II_0F_38_0A*/ {0x19a, 7521}, - /*II_66_0F_38_0A*/ {0x19b, 7521}, - /*II_0F_38_0B*/ {0x19a, 7538}, - /*II_66_0F_38_0B*/ {0x19b, 7538}, - /*II_66_0F_38_17*/ {0x19d, 7629}, - /*II_0F_38_1C*/ {0x19a, 7688}, - /*II_66_0F_38_1C*/ {0x19b, 7688}, - /*II_0F_38_1D*/ {0x19a, 7703}, - /*II_66_0F_38_1D*/ {0x19b, 7703}, - /*II_0F_38_1E*/ {0x19a, 7718}, - /*II_66_0F_38_1E*/ {0x19b, 7718}, - /*II_66_0F_38_20*/ {0x1a2, 7733}, - /*II_66_0F_38_21*/ {0x1a3, 7754}, - /*II_66_0F_38_22*/ {0x1a4, 7775}, - /*II_66_0F_38_23*/ {0x1a2, 7796}, - /*II_66_0F_38_24*/ {0x1a3, 7817}, - /*II_66_0F_38_25*/ {0x1a2, 7838}, - /*II_66_0F_38_28*/ {0x1a6, 7859}, - /*II_66_0F_38_29*/ {0x1a6, 7876}, - /*II_66_0F_38_2A*/ {0x1a7, 7895}, - /*II_66_0F_38_2B*/ {0x1a6, 7916}, - /*II_66_0F_38_30*/ {0x1a2, 7961}, - /*II_66_0F_38_31*/ {0x1a3, 7982}, - /*II_66_0F_38_32*/ {0x1a4, 8003}, - /*II_66_0F_38_33*/ {0x1a2, 8024}, - /*II_66_0F_38_34*/ {0x1a3, 8045}, - /*II_66_0F_38_35*/ {0x1a2, 8066}, - /*II_66_0F_38_37*/ {0x19d, 8087}, - /*II_66_0F_38_38*/ {0x1a6, 8106}, - /*II_66_0F_38_39*/ {0x1a6, 8123}, - /*II_66_0F_38_3A*/ {0x1a6, 8140}, - /*II_66_0F_38_3B*/ {0x1a6, 8157}, - /*II_66_0F_38_3C*/ {0x1a6, 8174}, - /*II_66_0F_38_3D*/ {0x1a6, 8191}, - /*II_66_0F_38_3E*/ {0x1a6, 8208}, - /*II_66_0F_38_3F*/ {0x1a6, 8225}, - /*II_66_0F_38_40*/ {0x1a6, 8242}, - /*II_66_0F_38_41*/ {0x1a6, 8259}, - /*II_66_0F_38_80*/ {0x1aa, 8284}, - /*II_66_0F_38_81*/ {0x1aa, 8292}, - /*II_66_0F_38_82*/ {0x1aa, 8301}, - /*II_66_0F_38_DB*/ {0x1ad, 9150}, - /*II_66_0F_38_DC*/ {0x1ad, 9167}, - /*II_66_0F_38_DD*/ {0x1ad, 9184}, - /*II_66_0F_38_DE*/ {0x1ad, 9209}, - /*II_66_0F_38_DF*/ {0x1ad, 9226}, - /*II_0F_38_F0*/ {0x1b0, 9251}, - /*II_F2_0F_38_F0*/ {0x1b1, 9258}, - /*II_0F_38_F1*/ {0x1b2, 9251}, - /*II_F2_0F_38_F1*/ {0x1b3, 9258}, - /*II_0F_71_02*/ {0x1ca, 6436}, - /*II_66_0F_71_02*/ {0x1cb, 6436}, - /*II_0F_71_04*/ {0x1ca, 6695}, - /*II_66_0F_71_04*/ {0x1cb, 6695}, - /*II_0F_71_06*/ {0x1ca, 7009}, - /*II_66_0F_71_06*/ {0x1cb, 7009}, - /*II_0F_72_02*/ {0x1ca, 6451}, - /*II_66_0F_72_02*/ {0x1cb, 6451}, - /*II_0F_72_04*/ {0x1ca, 6710}, - /*II_66_0F_72_04*/ {0x1cb, 6710}, - /*II_0F_72_06*/ {0x1ca, 7024}, - /*II_66_0F_72_06*/ {0x1cb, 7024}, - /*II_0F_73_02*/ {0x1ca, 6466}, - /*II_66_0F_73_02*/ {0x1cb, 6466}, - /*II_66_0F_73_03*/ {0x1cb, 9830}, - /*II_0F_73_06*/ {0x1ca, 7039}, - /*II_66_0F_73_06*/ {0x1cb, 7039}, - /*II_66_0F_73_07*/ {0x1cb, 9847}, - /*II_F3_0F_AE_00*/ {0x1cd, 9882}, - /*II_F3_0F_AE_01*/ {0x1cd, 9912}, - /*II_0F_AE_02*/ {0x114, 9922}, - /*II_F3_0F_AE_02*/ {0x1cd, 9931}, - /*II_0F_AE_03*/ {0x114, 9951}, - /*II_F3_0F_AE_03*/ {0x1cd, 9960}, - /*II_0F_C7_06*/ {0x1cf, 9980}, - /*II_66_0F_C7_06*/ {0x185, 9989}, - /*II_F3_0F_C7_06*/ {0x185, 9998} -}; - -_InstInfoEx InstInfosEx[381] = { - /*II_69*/ {0x34, 117, 0x0, 3, 0, 0, 0}, - /*II_6B*/ {0x34, 117, 0x0, 5, 0, 0, 0}, - /*II_98*/ {0x4e, 228, 0x0, 0, 0, 233, 239}, - /*II_99*/ {0x4e, 245, 0x0, 0, 0, 250, 255}, - /*II_E3*/ {0x76, 427, 0x0, 0, 0, 433, 440}, - /*II_0F_A4*/ {0xac, 876, 0x0, 1, 0, 0, 0}, - /*II_0F_A5*/ {0xac, 876, 0x0, 52, 0, 0, 0}, - /*II_0F_AC*/ {0xac, 892, 0x0, 1, 0, 0, 0}, - /*II_0F_AD*/ {0xac, 892, 0x0, 52, 0, 0, 0}, - /*II_V_0F_10*/ {0x123, 2117, 0x41, 0, 0, 0, 0}, - /*II_V_66_0F_10*/ {0x123, 2126, 0x41, 0, 0, 0, 0}, - /*II_V_F3_0F_10*/ {0x124, 2135, 0x20, 69, 0, 0, 0}, - /*II_V_F2_0F_10*/ {0x124, 2143, 0x20, 69, 0, 0, 0}, - /*II_VRR_F3_0F_10*/ {0x125, 2135, 0x60, 0, 0, 0, 0}, - /*II_VRR_F2_0F_10*/ {0x126, 2143, 0x60, 0, 0, 0, 0}, - /*II_V_0F_11*/ {0x12b, 2117, 0x41, 0, 0, 0, 0}, - /*II_V_66_0F_11*/ {0x12b, 2126, 0x41, 0, 0, 0, 0}, - /*II_V_F3_0F_11*/ {0x124, 2135, 0x20, 69, 0, 0, 0}, - /*II_V_F2_0F_11*/ {0x124, 2143, 0x20, 69, 0, 0, 0}, - /*II_VRR_F3_0F_11*/ {0x12c, 2135, 0x60, 0, 0, 0, 0}, - /*II_VRR_F2_0F_11*/ {0x12d, 2143, 0x60, 0, 0, 0, 0}, - /*II_0F_12*/ {0x12e, 2151, 0x0, 0, 0, 2160, 0}, - /*II_V_0F_12*/ {0x131, 2195, 0x0, 72, 0, 2205, 0}, - /*II_V_66_0F_12*/ {0x132, 2214, 0x0, 46, 0, 0, 0}, - /*II_V_F3_0F_12*/ {0x123, 2223, 0x41, 0, 0, 0, 0}, - /*II_V_F2_0F_12*/ {0x133, 2234, 0x41, 0, 0, 0, 0}, - /*II_V_0F_13*/ {0x136, 2205, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_13*/ {0x136, 2214, 0x40, 0, 0, 0, 0}, - /*II_V_0F_14*/ {0x139, 2264, 0x1, 90, 0, 0, 0}, - /*II_V_66_0F_14*/ {0x139, 2275, 0x1, 90, 0, 0, 0}, - /*II_V_0F_15*/ {0x139, 2306, 0x1, 90, 0, 0, 0}, - /*II_V_66_0F_15*/ {0x139, 2317, 0x1, 90, 0, 0, 0}, - /*II_0F_16*/ {0x12e, 2328, 0x0, 0, 0, 2337, 0}, - /*II_V_0F_16*/ {0x131, 2363, 0x0, 72, 0, 2373, 0}, - /*II_V_66_0F_16*/ {0x132, 2382, 0x0, 46, 0, 0, 0}, - /*II_V_F3_0F_16*/ {0x123, 2391, 0x41, 0, 0, 0, 0}, - /*II_V_0F_17*/ {0x136, 2373, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_17*/ {0x136, 2382, 0x40, 0, 0, 0, 0}, - /*II_V_0F_28*/ {0x123, 2467, 0x41, 0, 0, 0, 0}, - /*II_V_66_0F_28*/ {0x123, 2476, 0x41, 0, 0, 0, 0}, - /*II_V_0F_29*/ {0x12b, 2467, 0x41, 0, 0, 0, 0}, - /*II_V_66_0F_29*/ {0x12b, 2476, 0x41, 0, 0, 0, 0}, - /*II_V_F3_0F_2A*/ {0x132, 2525, 0x2, 79, 0, 0, 0}, - /*II_V_F2_0F_2A*/ {0x132, 2536, 0x2, 79, 0, 0, 0}, - /*II_V_0F_2B*/ {0x144, 2583, 0x41, 0, 0, 0, 0}, - /*II_V_66_0F_2B*/ {0x144, 2593, 0x41, 0, 0, 0, 0}, - /*II_V_F3_0F_2C*/ {0x149, 2647, 0x42, 0, 0, 0, 0}, - /*II_V_F2_0F_2C*/ {0x149, 2659, 0x42, 0, 0, 0, 0}, - /*II_V_F3_0F_2D*/ {0x149, 2711, 0x42, 0, 0, 0, 0}, - /*II_V_F2_0F_2D*/ {0x149, 2722, 0x42, 0, 0, 0, 0}, - /*II_V_0F_2E*/ {0x14c, 2751, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_2E*/ {0x14d, 2761, 0x40, 0, 0, 0, 0}, - /*II_V_0F_2F*/ {0x14c, 2787, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_2F*/ {0x14d, 2796, 0x40, 0, 0, 0, 0}, - /*II_V_0F_50*/ {0x150, 2825, 0x41, 0, 0, 0, 0}, - /*II_V_66_0F_50*/ {0x150, 2836, 0x41, 0, 0, 0, 0}, - /*II_V_0F_51*/ {0x123, 2879, 0x41, 0, 0, 0, 0}, - /*II_V_66_0F_51*/ {0x123, 2888, 0x41, 0, 0, 0, 0}, - /*II_V_F3_0F_51*/ {0x132, 2897, 0x0, 71, 0, 0, 0}, - /*II_V_F2_0F_51*/ {0x132, 2906, 0x0, 72, 0, 0, 0}, - /*II_V_0F_52*/ {0x123, 2933, 0x41, 0, 0, 0, 0}, - /*II_V_F3_0F_52*/ {0x132, 2943, 0x0, 71, 0, 0, 0}, - /*II_V_0F_53*/ {0x123, 2967, 0x41, 0, 0, 0, 0}, - /*II_V_F3_0F_53*/ {0x132, 2975, 0x0, 71, 0, 0, 0}, - /*II_V_0F_54*/ {0x139, 2997, 0x1, 90, 0, 0, 0}, - /*II_V_66_0F_54*/ {0x139, 3005, 0x1, 90, 0, 0, 0}, - /*II_V_0F_55*/ {0x139, 3029, 0x1, 90, 0, 0, 0}, - /*II_V_66_0F_55*/ {0x139, 3038, 0x1, 90, 0, 0, 0}, - /*II_V_0F_56*/ {0x139, 3059, 0x1, 90, 0, 0, 0}, - /*II_V_66_0F_56*/ {0x139, 3066, 0x1, 90, 0, 0, 0}, - /*II_V_0F_57*/ {0x139, 3087, 0x1, 90, 0, 0, 0}, - /*II_V_66_0F_57*/ {0x139, 3095, 0x1, 90, 0, 0, 0}, - /*II_V_0F_58*/ {0x139, 3131, 0x1, 90, 0, 0, 0}, - /*II_V_66_0F_58*/ {0x139, 3139, 0x1, 90, 0, 0, 0}, - /*II_V_F3_0F_58*/ {0x132, 3147, 0x0, 71, 0, 0, 0}, - /*II_V_F2_0F_58*/ {0x132, 3155, 0x0, 72, 0, 0, 0}, - /*II_V_0F_59*/ {0x139, 3191, 0x1, 90, 0, 0, 0}, - /*II_V_66_0F_59*/ {0x139, 3199, 0x1, 90, 0, 0, 0}, - /*II_V_F3_0F_59*/ {0x132, 3207, 0x0, 71, 0, 0, 0}, - /*II_V_F2_0F_59*/ {0x132, 3215, 0x0, 72, 0, 0, 0}, - /*II_V_0F_5A*/ {0x153, 3263, 0x41, 0, 0, 0, 0}, - /*II_V_66_0F_5A*/ {0x154, 3274, 0x41, 0, 0, 0, 0}, - /*II_V_F3_0F_5A*/ {0x132, 3285, 0x0, 71, 0, 0, 0}, - /*II_V_F2_0F_5A*/ {0x132, 3296, 0x0, 72, 0, 0, 0}, - /*II_V_0F_5B*/ {0x123, 3338, 0x41, 0, 0, 0, 0}, - /*II_V_66_0F_5B*/ {0x123, 3349, 0x41, 0, 0, 0, 0}, - /*II_V_F3_0F_5B*/ {0x123, 3360, 0x41, 0, 0, 0, 0}, - /*II_V_0F_5C*/ {0x139, 3400, 0x1, 90, 0, 0, 0}, - /*II_V_66_0F_5C*/ {0x139, 3408, 0x1, 90, 0, 0, 0}, - /*II_V_F3_0F_5C*/ {0x132, 3416, 0x0, 71, 0, 0, 0}, - /*II_V_F2_0F_5C*/ {0x132, 3424, 0x0, 72, 0, 0, 0}, - /*II_V_0F_5D*/ {0x139, 3460, 0x1, 90, 0, 0, 0}, - /*II_V_66_0F_5D*/ {0x139, 3468, 0x1, 90, 0, 0, 0}, - /*II_V_F3_0F_5D*/ {0x132, 3476, 0x0, 71, 0, 0, 0}, - /*II_V_F2_0F_5D*/ {0x132, 3484, 0x0, 72, 0, 0, 0}, - /*II_V_0F_5E*/ {0x139, 3520, 0x1, 90, 0, 0, 0}, - /*II_V_66_0F_5E*/ {0x139, 3528, 0x1, 90, 0, 0, 0}, - /*II_V_F3_0F_5E*/ {0x132, 3536, 0x0, 71, 0, 0, 0}, - /*II_V_F2_0F_5E*/ {0x132, 3544, 0x0, 72, 0, 0, 0}, - /*II_V_0F_5F*/ {0x139, 3580, 0x1, 90, 0, 0, 0}, - /*II_V_66_0F_5F*/ {0x139, 3588, 0x1, 90, 0, 0, 0}, - /*II_V_F3_0F_5F*/ {0x132, 3596, 0x0, 71, 0, 0, 0}, - /*II_V_F2_0F_5F*/ {0x132, 3604, 0x0, 72, 0, 0, 0}, - /*II_V_66_0F_60*/ {0x132, 3623, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_61*/ {0x132, 3646, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_62*/ {0x132, 3669, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_63*/ {0x132, 3691, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_64*/ {0x132, 3711, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_65*/ {0x132, 3730, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_66*/ {0x132, 3749, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_67*/ {0x132, 3769, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_68*/ {0x132, 3791, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_69*/ {0x132, 3814, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_6A*/ {0x132, 3837, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_6B*/ {0x132, 3859, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_6C*/ {0x132, 3882, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_6D*/ {0x132, 3907, 0x0, 73, 0, 0, 0}, - /*II_0F_6E*/ {0x157, 3920, 0x0, 0, 0, 0, 3926}, - /*II_66_0F_6E*/ {0x158, 3920, 0x0, 0, 0, 0, 3926}, - /*II_V_66_0F_6E*/ {0x159, 3932, 0x46, 0, 0, 3939, 0}, - /*II_V_66_0F_6F*/ {0x123, 3962, 0x41, 0, 0, 0, 0}, - /*II_V_F3_0F_6F*/ {0x123, 3971, 0x41, 0, 0, 0, 0}, - /*II_0F_70*/ {0x15b, 3980, 0x0, 1, 0, 0, 0}, - /*II_66_0F_70*/ {0x15c, 3988, 0x0, 1, 0, 0, 0}, - /*II_F3_0F_70*/ {0x15c, 3996, 0x0, 1, 0, 0, 0}, - /*II_F2_0F_70*/ {0x15c, 4005, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_70*/ {0x15d, 4014, 0x40, 1, 0, 0, 0}, - /*II_V_F3_0F_70*/ {0x15d, 4023, 0x40, 1, 0, 0, 0}, - /*II_V_F2_0F_70*/ {0x15d, 4033, 0x40, 1, 0, 0, 0}, - /*II_V_66_0F_74*/ {0x132, 4052, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_75*/ {0x132, 4071, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_76*/ {0x132, 4090, 0x0, 73, 0, 0, 0}, - /*II_V_0F_77*/ {0x15f, 4106, 0x49, 0, 0, 4118, 0}, - /*II_66_0F_78*/ {0x161, 4136, 0x0, 8, 0, 0, 0}, - /*II_F2_0F_78*/ {0x162, 4143, 0x0, 7, 8, 0, 0}, - /*II_V_66_0F_7C*/ {0x139, 4197, 0x1, 90, 0, 0, 0}, - /*II_V_F2_0F_7C*/ {0x139, 4206, 0x1, 90, 0, 0, 0}, - /*II_V_66_0F_7D*/ {0x139, 4231, 0x1, 90, 0, 0, 0}, - /*II_V_F2_0F_7D*/ {0x139, 4240, 0x1, 90, 0, 0, 0}, - /*II_0F_7E*/ {0x169, 3920, 0x0, 0, 0, 0, 3926}, - /*II_66_0F_7E*/ {0x16a, 3920, 0x0, 0, 0, 0, 3926}, - /*II_V_66_0F_7E*/ {0x16b, 3932, 0x46, 0, 0, 3939, 0}, - /*II_V_F3_0F_7E*/ {0x14d, 3939, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_7F*/ {0x12b, 3962, 0x41, 0, 0, 0, 0}, - /*II_V_F3_0F_7F*/ {0x12b, 3971, 0x41, 0, 0, 0, 0}, - /*II_0F_AE_04*/ {0x16d, 4249, 0x0, 0, 0, 0, 4256}, - /*II_0F_AE_05*/ {0x16e, 4265, 0x0, 0, 0, 4273, 4281}, - /*II_0F_AE_06*/ {0x16e, 4291, 0x0, 0, 0, 4299, 4309}, - /*II_0F_AE_07*/ {0x16f, 4321, 0x0, 0, 0, 4329, 0}, - /*II_0F_C2*/ {0x176, 4370, 0x0, 0, 0, 4379, 4388}, - /*II_66_0F_C2*/ {0x177, 4449, 0x0, 0, 0, 4458, 4467}, - /*II_F3_0F_C2*/ {0x178, 4528, 0x0, 0, 0, 4537, 4546}, - /*II_F2_0F_C2*/ {0x179, 4607, 0x0, 0, 0, 4616, 4625}, - /*II_V_0F_C2*/ {0x17a, 4686, 0x1, 90, 0, 4696, 4706}, - /*II_V_66_0F_C2*/ {0x17a, 5088, 0x1, 90, 0, 5098, 5108}, - /*II_V_F3_0F_C2*/ {0x17b, 5490, 0x0, 71, 0, 5500, 5510}, - /*II_V_F2_0F_C2*/ {0x17b, 5892, 0x0, 72, 0, 5902, 5912}, - /*II_0F_C4*/ {0x17c, 6294, 0x0, 1, 0, 0, 0}, - /*II_66_0F_C4*/ {0x17d, 6294, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_C4*/ {0x17e, 6302, 0x0, 25, 1, 0, 0}, - /*II_0F_C5*/ {0x17f, 6311, 0x0, 1, 0, 0, 0}, - /*II_66_0F_C5*/ {0x180, 6311, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_C5*/ {0x181, 6319, 0x40, 1, 0, 0, 0}, - /*II_0F_C6*/ {0x182, 6328, 0x0, 1, 0, 0, 0}, - /*II_66_0F_C6*/ {0x15c, 6336, 0x0, 1, 0, 0, 0}, - /*II_V_0F_C6*/ {0x183, 6344, 0x1, 90, 1, 0, 0}, - /*II_V_66_0F_C6*/ {0x183, 6353, 0x1, 90, 1, 0, 0}, - /*II_0F_C7_01*/ {0x184, 6362, 0x0, 0, 0, 0, 6373}, - /*II_V_66_0F_D0*/ {0x139, 6414, 0x1, 90, 0, 0, 0}, - /*II_V_F2_0F_D0*/ {0x139, 6425, 0x1, 90, 0, 0, 0}, - /*II_V_66_0F_D1*/ {0x132, 6443, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_D2*/ {0x132, 6458, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_D3*/ {0x132, 6473, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_D4*/ {0x132, 6488, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_D5*/ {0x132, 6504, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_D6*/ {0x188, 3939, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_D7*/ {0x18b, 6541, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_D8*/ {0x132, 6561, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_D9*/ {0x132, 6580, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_DA*/ {0x132, 6598, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_DB*/ {0x132, 6613, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_DC*/ {0x132, 6629, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_DD*/ {0x132, 6629, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_DE*/ {0x132, 6656, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_DF*/ {0x132, 6672, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_E0*/ {0x132, 6687, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_E1*/ {0x132, 6702, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_E2*/ {0x132, 6717, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_E3*/ {0x132, 6732, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_E4*/ {0x132, 6749, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_E5*/ {0x132, 6767, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_E6*/ {0x154, 6807, 0x41, 0, 0, 0, 0}, - /*II_V_F3_0F_E6*/ {0x153, 6819, 0x41, 0, 0, 0, 0}, - /*II_V_F2_0F_E6*/ {0x154, 6830, 0x41, 0, 0, 0, 0}, - /*II_V_66_0F_E7*/ {0x144, 6858, 0x41, 0, 0, 0, 0}, - /*II_V_66_0F_E8*/ {0x132, 6876, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_E9*/ {0x132, 6893, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_EA*/ {0x132, 6910, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_EB*/ {0x132, 6924, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_EC*/ {0x132, 6938, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_ED*/ {0x132, 6955, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_EE*/ {0x132, 6972, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_EF*/ {0x132, 6987, 0x0, 73, 0, 0, 0}, - /*II_V_F2_0F_F0*/ {0x18f, 7001, 0x41, 0, 0, 0, 0}, - /*II_V_66_0F_F1*/ {0x132, 7016, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_F2*/ {0x132, 7031, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_F3*/ {0x132, 7046, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_F4*/ {0x132, 7063, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_F5*/ {0x132, 7082, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_F6*/ {0x132, 7100, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_F7*/ {0x193, 7131, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_F8*/ {0x132, 7151, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_F9*/ {0x132, 7166, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_FA*/ {0x132, 7181, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_FB*/ {0x132, 7196, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_FC*/ {0x132, 7211, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_FD*/ {0x132, 7226, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_FE*/ {0x132, 7241, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_00*/ {0x132, 7349, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_01*/ {0x132, 7366, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_02*/ {0x132, 7383, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_03*/ {0x132, 7401, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_04*/ {0x132, 7422, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_05*/ {0x132, 7442, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_06*/ {0x132, 7459, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_07*/ {0x132, 7477, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_08*/ {0x132, 7495, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_09*/ {0x132, 7512, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_0A*/ {0x132, 7529, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_0B*/ {0x132, 7548, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_0C*/ {0x139, 7559, 0x1, 90, 0, 0, 0}, - /*II_V_66_0F_38_0D*/ {0x139, 7570, 0x1, 90, 0, 0, 0}, - /*II_V_66_0F_38_0E*/ {0x123, 7581, 0x41, 0, 0, 0, 0}, - /*II_V_66_0F_38_0F*/ {0x123, 7590, 0x41, 0, 0, 0, 0}, - /*II_66_0F_38_10*/ {0x19c, 7599, 0x0, 74, 0, 0, 0}, - /*II_66_0F_38_14*/ {0x19c, 7609, 0x0, 74, 0, 0, 0}, - /*II_66_0F_38_15*/ {0x19c, 7619, 0x0, 74, 0, 0, 0}, - /*II_V_66_0F_38_17*/ {0x123, 7636, 0x41, 0, 0, 0, 0}, - /*II_V_66_0F_38_18*/ {0x19e, 7644, 0x41, 0, 0, 0, 0}, - /*II_V_66_0F_38_19*/ {0x19f, 7658, 0x50, 0, 0, 0, 0}, - /*II_V_66_0F_38_1A*/ {0x1a0, 7672, 0x50, 0, 0, 0, 0}, - /*II_V_66_0F_38_1C*/ {0x1a1, 7695, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_38_1D*/ {0x1a1, 7710, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_38_1E*/ {0x1a1, 7725, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_38_20*/ {0x14d, 7743, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_38_21*/ {0x14c, 7764, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_38_22*/ {0x1a5, 7785, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_38_23*/ {0x14d, 7806, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_38_24*/ {0x14c, 7827, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_38_25*/ {0x14d, 7848, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_38_28*/ {0x132, 7867, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_29*/ {0x132, 7885, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_2A*/ {0x1a8, 7905, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_38_2B*/ {0x132, 7926, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_2C*/ {0x139, 7937, 0x1, 92, 0, 0, 0}, - /*II_V_66_0F_38_2D*/ {0x139, 7949, 0x1, 92, 0, 0, 0}, - /*II_V_66_0F_38_2E*/ {0x1a9, 7937, 0x1, 83, 0, 0, 0}, - /*II_V_66_0F_38_2F*/ {0x1a9, 7949, 0x1, 83, 0, 0, 0}, - /*II_V_66_0F_38_30*/ {0x14d, 7971, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_38_31*/ {0x14c, 7992, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_38_32*/ {0x1a5, 8013, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_38_33*/ {0x14d, 8034, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_38_34*/ {0x14c, 8055, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_38_35*/ {0x14d, 8076, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_38_37*/ {0x132, 8096, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_38*/ {0x132, 8114, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_39*/ {0x132, 8131, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_3A*/ {0x132, 8148, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_3B*/ {0x132, 8165, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_3C*/ {0x132, 8182, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_3D*/ {0x132, 8199, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_3E*/ {0x132, 8216, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_3F*/ {0x132, 8233, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_40*/ {0x132, 8250, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_41*/ {0x1a1, 8271, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_38_96*/ {0x1ab, 8310, 0x7, 90, 0, 8326, 0}, - /*II_V_66_0F_38_97*/ {0x1ab, 8342, 0x7, 90, 0, 8358, 0}, - /*II_V_66_0F_38_98*/ {0x1ab, 8374, 0x7, 90, 0, 8387, 0}, - /*II_V_66_0F_38_99*/ {0x1ac, 8400, 0x6, 80, 0, 8413, 0}, - /*II_V_66_0F_38_9A*/ {0x1ab, 8426, 0x7, 90, 0, 8439, 0}, - /*II_V_66_0F_38_9B*/ {0x1ac, 8452, 0x6, 80, 0, 8465, 0}, - /*II_V_66_0F_38_9C*/ {0x1ab, 8478, 0x7, 90, 0, 8492, 0}, - /*II_V_66_0F_38_9D*/ {0x1ac, 8506, 0x6, 80, 0, 8520, 0}, - /*II_V_66_0F_38_9E*/ {0x1ab, 8534, 0x7, 90, 0, 8548, 0}, - /*II_V_66_0F_38_9F*/ {0x1ac, 8562, 0x6, 80, 0, 8576, 0}, - /*II_V_66_0F_38_A6*/ {0x1ab, 8590, 0x7, 90, 0, 8606, 0}, - /*II_V_66_0F_38_A7*/ {0x1ab, 8622, 0x7, 90, 0, 8638, 0}, - /*II_V_66_0F_38_A8*/ {0x1ab, 8654, 0x7, 90, 0, 8667, 0}, - /*II_V_66_0F_38_A9*/ {0x1ac, 8680, 0x6, 80, 0, 8693, 0}, - /*II_V_66_0F_38_AA*/ {0x1ab, 8706, 0x7, 90, 0, 8719, 0}, - /*II_V_66_0F_38_AB*/ {0x1ac, 8732, 0x6, 80, 0, 8745, 0}, - /*II_V_66_0F_38_AC*/ {0x1ab, 8758, 0x7, 90, 0, 8772, 0}, - /*II_V_66_0F_38_AD*/ {0x1ac, 8786, 0x6, 80, 0, 8800, 0}, - /*II_V_66_0F_38_AE*/ {0x1ab, 8814, 0x7, 90, 0, 8828, 0}, - /*II_V_66_0F_38_AF*/ {0x1ac, 8842, 0x6, 80, 0, 8856, 0}, - /*II_V_66_0F_38_B6*/ {0x1ab, 8870, 0x7, 90, 0, 8886, 0}, - /*II_V_66_0F_38_B7*/ {0x1ab, 8902, 0x7, 90, 0, 8918, 0}, - /*II_V_66_0F_38_B8*/ {0x1ab, 8934, 0x7, 90, 0, 8947, 0}, - /*II_V_66_0F_38_B9*/ {0x1ac, 8960, 0x6, 80, 0, 8973, 0}, - /*II_V_66_0F_38_BA*/ {0x1ab, 8986, 0x7, 90, 0, 8999, 0}, - /*II_V_66_0F_38_BB*/ {0x1ac, 9012, 0x6, 80, 0, 9025, 0}, - /*II_V_66_0F_38_BC*/ {0x1ab, 9038, 0x7, 90, 0, 9052, 0}, - /*II_V_66_0F_38_BD*/ {0x1ac, 9066, 0x6, 80, 0, 9080, 0}, - /*II_V_66_0F_38_BE*/ {0x1ab, 9094, 0x7, 90, 0, 9108, 0}, - /*II_V_66_0F_38_BF*/ {0x1ac, 9122, 0x6, 80, 0, 9136, 0}, - /*II_V_66_0F_38_DB*/ {0x1ae, 9158, 0x40, 0, 0, 0, 0}, - /*II_V_66_0F_38_DC*/ {0x1af, 9175, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_DD*/ {0x1af, 9196, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_DE*/ {0x1af, 9217, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_38_DF*/ {0x1af, 9238, 0x0, 73, 0, 0, 0}, - /*II_V_66_0F_3A_04*/ {0x1b4, 7559, 0x41, 1, 0, 0, 0}, - /*II_V_66_0F_3A_05*/ {0x1b4, 7570, 0x41, 1, 0, 0, 0}, - /*II_V_66_0F_3A_06*/ {0x1b5, 9265, 0x10, 86, 1, 0, 0}, - /*II_66_0F_3A_08*/ {0x19c, 9277, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_08*/ {0x1b4, 9286, 0x41, 1, 0, 0, 0}, - /*II_66_0F_3A_09*/ {0x19c, 9296, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_09*/ {0x1b4, 9305, 0x41, 1, 0, 0, 0}, - /*II_66_0F_3A_0A*/ {0x1b6, 9315, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_0A*/ {0x17e, 9324, 0x0, 71, 1, 0, 0}, - /*II_66_0F_3A_0B*/ {0x1b7, 9334, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_0B*/ {0x17e, 9343, 0x0, 72, 1, 0, 0}, - /*II_66_0F_3A_0C*/ {0x19c, 9353, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_0C*/ {0x183, 9362, 0x1, 90, 1, 0, 0}, - /*II_66_0F_3A_0D*/ {0x19c, 9372, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_0D*/ {0x183, 9381, 0x1, 90, 1, 0, 0}, - /*II_66_0F_3A_0E*/ {0x19c, 9391, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_0E*/ {0x17e, 9400, 0x0, 73, 1, 0, 0}, - /*II_0F_3A_0F*/ {0x1b8, 9410, 0x0, 1, 0, 0, 0}, - /*II_66_0F_3A_0F*/ {0x1b9, 9410, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_0F*/ {0x17e, 9419, 0x0, 73, 1, 0, 0}, - /*II_66_0F_3A_14*/ {0x1ba, 9429, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_14*/ {0x1bb, 9437, 0x40, 1, 0, 0, 0}, - /*II_66_0F_3A_15*/ {0x1bc, 6311, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_15*/ {0x1bd, 6319, 0x40, 1, 0, 0, 0}, - /*II_66_0F_3A_16*/ {0x1be, 9446, 0x0, 1, 0, 0, 9454}, - /*II_V_66_0F_3A_16*/ {0x1bf, 9462, 0x46, 1, 0, 9471, 0}, - /*II_66_0F_3A_17*/ {0x1c0, 9480, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_17*/ {0x1c1, 9491, 0x40, 1, 0, 0, 0}, - /*II_V_66_0F_3A_18*/ {0x1b5, 9503, 0x10, 73, 1, 0, 0}, - /*II_V_66_0F_3A_19*/ {0x1c2, 9516, 0x50, 1, 0, 0, 0}, - /*II_66_0F_3A_20*/ {0x1c3, 9530, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_20*/ {0x17e, 9538, 0x0, 76, 1, 0, 0}, - /*II_66_0F_3A_21*/ {0x1b6, 9547, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_21*/ {0x17e, 9557, 0x0, 71, 1, 0, 0}, - /*II_66_0F_3A_22*/ {0x1c4, 9568, 0x0, 1, 0, 0, 9576}, - /*II_V_66_0F_3A_22*/ {0x17e, 9584, 0x6, 79, 1, 9593, 0}, - /*II_66_0F_3A_40*/ {0x19c, 9602, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_40*/ {0x183, 9608, 0x1, 90, 1, 0, 0}, - /*II_66_0F_3A_41*/ {0x19c, 9615, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_41*/ {0x17e, 9621, 0x0, 73, 1, 0, 0}, - /*II_66_0F_3A_42*/ {0x19c, 9628, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_42*/ {0x17e, 9637, 0x0, 73, 1, 0, 0}, - /*II_66_0F_3A_44*/ {0x1c5, 9647, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_44*/ {0x1c6, 9658, 0x0, 73, 1, 0, 0}, - /*II_V_66_0F_3A_4A*/ {0x183, 9670, 0x1, 90, 84, 0, 0}, - /*II_V_66_0F_3A_4B*/ {0x183, 9681, 0x1, 90, 84, 0, 0}, - /*II_V_66_0F_3A_4C*/ {0x17e, 9692, 0x0, 73, 82, 0, 0}, - /*II_66_0F_3A_60*/ {0x1c7, 9703, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_60*/ {0x15d, 9714, 0x40, 1, 0, 0, 0}, - /*II_66_0F_3A_61*/ {0x1c7, 9726, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_61*/ {0x15d, 9737, 0x40, 1, 0, 0, 0}, - /*II_66_0F_3A_62*/ {0x1c7, 9749, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_62*/ {0x15d, 9760, 0x40, 1, 0, 0, 0}, - /*II_66_0F_3A_63*/ {0x1c7, 9772, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_63*/ {0x15d, 9783, 0x40, 1, 0, 0, 0}, - /*II_66_0F_3A_DF*/ {0x1c8, 9795, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_3A_DF*/ {0x1c9, 9812, 0x40, 1, 0, 0, 0}, - /*II_V_66_0F_71_02*/ {0x1cc, 6443, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_71_04*/ {0x1cc, 6702, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_71_06*/ {0x1cc, 7016, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_72_02*/ {0x1cc, 6458, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_72_04*/ {0x1cc, 6717, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_72_06*/ {0x1cc, 7031, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_73_02*/ {0x1cc, 6473, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_73_03*/ {0x1cc, 9838, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_73_06*/ {0x1cc, 7046, 0x0, 1, 0, 0, 0}, - /*II_V_66_0F_73_07*/ {0x1cc, 9855, 0x0, 1, 0, 0, 0}, - /*II_0F_AE_00*/ {0x16d, 9864, 0x0, 0, 0, 0, 9872}, - /*II_0F_AE_01*/ {0x16d, 9892, 0x0, 0, 0, 0, 9901}, - /*II_V_0F_AE_02*/ {0x1ce, 9941, 0x40, 0, 0, 0, 0}, - /*II_V_0F_AE_03*/ {0x1ce, 9970, 0x40, 0, 0, 0, 0} -}; - -_InstNode InstructionsTree[5560] = { -/* 0 - _00 */ 0x2000, -/* 1 - _01 */ 0x2001, -/* 2 - _02 */ 0x2002, -/* 3 - _03 */ 0x2003, -/* 4 - _04 */ 0x2004, -/* 5 - _05 */ 0x2005, -/* 6 - _06 */ 0x2006, -/* 7 - _07 */ 0x2007, -/* 8 - _08 */ 0x2008, -/* 9 - _09 */ 0x2009, -/* a - _0A */ 0x200a, -/* b - _0B */ 0x200b, -/* c - _0C */ 0x200c, -/* d - _0D */ 0x200d, -/* e - _0E */ 0x200e, -/* f - _0F */ 0x8100, -/* 10 - _10 */ 0x200f, -/* 11 - _11 */ 0x2010, -/* 12 - _12 */ 0x2011, -/* 13 - _13 */ 0x2012, -/* 14 - _14 */ 0x2013, -/* 15 - _15 */ 0x2014, -/* 16 - _16 */ 0x2015, -/* 17 - _17 */ 0x2016, -/* 18 - _18 */ 0x2017, -/* 19 - _19 */ 0x2018, -/* 1a - _1A */ 0x2019, -/* 1b - _1B */ 0x201a, -/* 1c - _1C */ 0x201b, -/* 1d - _1D */ 0x201c, -/* 1e - _1E */ 0x201d, -/* 1f - _1F */ 0x201e, -/* 20 - _20 */ 0x201f, -/* 21 - _21 */ 0x2020, -/* 22 - _22 */ 0x2021, -/* 23 - _23 */ 0x2022, -/* 24 - _24 */ 0x2023, -/* 25 - _25 */ 0x2024, -/* 26 - */ 0, -/* 27 - _27 */ 0x2025, -/* 28 - _28 */ 0x2026, -/* 29 - _29 */ 0x2027, -/* 2a - _2A */ 0x2028, -/* 2b - _2B */ 0x2029, -/* 2c - _2C */ 0x202a, -/* 2d - _2D */ 0x202b, -/* 2e - */ 0, -/* 2f - _2F */ 0x202c, -/* 30 - _30 */ 0x202d, -/* 31 - _31 */ 0x202e, -/* 32 - _32 */ 0x202f, -/* 33 - _33 */ 0x2030, -/* 34 - _34 */ 0x2031, -/* 35 - _35 */ 0x2032, -/* 36 - */ 0, -/* 37 - _37 */ 0x2033, -/* 38 - _38 */ 0x2034, -/* 39 - _39 */ 0x2035, -/* 3a - _3A */ 0x2036, -/* 3b - _3B */ 0x2037, -/* 3c - _3C */ 0x2038, -/* 3d - _3D */ 0x2039, -/* 3e - */ 0, -/* 3f - _3F */ 0x203a, -/* 40 - _40 */ 0x203b, -/* 41 - _40 */ 0x203c, -/* 42 - _40 */ 0x203d, -/* 43 - _40 */ 0x203e, -/* 44 - _40 */ 0x203f, -/* 45 - _40 */ 0x2040, -/* 46 - _40 */ 0x2041, -/* 47 - _40 */ 0x2042, -/* 48 - _48 */ 0x2043, -/* 49 - _48 */ 0x2044, -/* 4a - _48 */ 0x2045, -/* 4b - _48 */ 0x2046, -/* 4c - _48 */ 0x2047, -/* 4d - _48 */ 0x2048, -/* 4e - _48 */ 0x2049, -/* 4f - _48 */ 0x204a, -/* 50 - _50 */ 0x204b, -/* 51 - _50 */ 0x204c, -/* 52 - _50 */ 0x204d, -/* 53 - _50 */ 0x204e, -/* 54 - _50 */ 0x204f, -/* 55 - _50 */ 0x2050, -/* 56 - _50 */ 0x2051, -/* 57 - _50 */ 0x2052, -/* 58 - _58 */ 0x2053, -/* 59 - _58 */ 0x2054, -/* 5a - _58 */ 0x2055, -/* 5b - _58 */ 0x2056, -/* 5c - _58 */ 0x2057, -/* 5d - _58 */ 0x2058, -/* 5e - _58 */ 0x2059, -/* 5f - _58 */ 0x205a, -/* 60 - _60 */ 0x205b, -/* 61 - _61 */ 0x205c, -/* 62 - _62 */ 0x205d, -/* 63 - _63 */ 0x205e, -/* 64 - */ 0, -/* 65 - */ 0, -/* 66 - */ 0, -/* 67 - */ 0, -/* 68 - _68 */ 0x205f, -/* 69 - _69 */ 0x4000, -/* 6a - _6A */ 0x2060, -/* 6b - _6B */ 0x4001, -/* 6c - _6C */ 0x2061, -/* 6d - _6D */ 0x2062, -/* 6e - _6E */ 0x2063, -/* 6f - _6F */ 0x2064, -/* 70 - _70 */ 0x2065, -/* 71 - _71 */ 0x2066, -/* 72 - _72 */ 0x2067, -/* 73 - _73 */ 0x2068, -/* 74 - _74 */ 0x2069, -/* 75 - _75 */ 0x206a, -/* 76 - _76 */ 0x206b, -/* 77 - _77 */ 0x206c, -/* 78 - _78 */ 0x206d, -/* 79 - _79 */ 0x206e, -/* 7a - _7A */ 0x206f, -/* 7b - _7B */ 0x2070, -/* 7c - _7C */ 0x2071, -/* 7d - _7D */ 0x2072, -/* 7e - _7E */ 0x2073, -/* 7f - _7F */ 0x2074, -/* 80 - _80 */ 0x6200, -/* 81 - _81 */ 0x6208, -/* 82 - _82 */ 0x6210, -/* 83 - _83 */ 0x6218, -/* 84 - _84 */ 0x2075, -/* 85 - _85 */ 0x2076, -/* 86 - _86 */ 0x2077, -/* 87 - _87 */ 0x2078, -/* 88 - _88 */ 0x2079, -/* 89 - _89 */ 0x207a, -/* 8a - _8A */ 0x207b, -/* 8b - _8B */ 0x207c, -/* 8c - _8C */ 0x207d, -/* 8d - _8D */ 0x207e, -/* 8e - _8E */ 0x207f, -/* 8f - _8F */ 0x6220, -/* 90 - _90 */ 0x2080, -/* 91 - _91 */ 0x2081, -/* 92 - _92 */ 0x2082, -/* 93 - _93 */ 0x2083, -/* 94 - _94 */ 0x2084, -/* 95 - _95 */ 0x2085, -/* 96 - _96 */ 0x2086, -/* 97 - _97 */ 0x2087, -/* 98 - _98 */ 0x4002, -/* 99 - _99 */ 0x4003, -/* 9a - _9A */ 0x2088, -/* 9b - */ 0, -/* 9c - _9C */ 0x2089, -/* 9d - _9D */ 0x208a, -/* 9e - _9E */ 0x208b, -/* 9f - _9F */ 0x208c, -/* a0 - _A0 */ 0x208d, -/* a1 - _A1 */ 0x208e, -/* a2 - _A2 */ 0x208f, -/* a3 - _A3 */ 0x2090, -/* a4 - _A4 */ 0x2091, -/* a5 - _A5 */ 0x2092, -/* a6 - _A6 */ 0x2093, -/* a7 - _A7 */ 0x2094, -/* a8 - _A8 */ 0x2095, -/* a9 - _A9 */ 0x2096, -/* aa - _AA */ 0x2097, -/* ab - _AB */ 0x2098, -/* ac - _AC */ 0x2099, -/* ad - _AD */ 0x209a, -/* ae - _AE */ 0x209b, -/* af - _AF */ 0x209c, -/* b0 - _B0 */ 0x209d, -/* b1 - _B0 */ 0x209e, -/* b2 - _B0 */ 0x209f, -/* b3 - _B0 */ 0x20a0, -/* b4 - _B0 */ 0x20a1, -/* b5 - _B0 */ 0x20a2, -/* b6 - _B0 */ 0x20a3, -/* b7 - _B0 */ 0x20a4, -/* b8 - _B8 */ 0x20a5, -/* b9 - _B8 */ 0x20a6, -/* ba - _B8 */ 0x20a7, -/* bb - _B8 */ 0x20a8, -/* bc - _B8 */ 0x20a9, -/* bd - _B8 */ 0x20aa, -/* be - _B8 */ 0x20ab, -/* bf - _B8 */ 0x20ac, -/* c0 - _C0 */ 0x6228, -/* c1 - _C1 */ 0x6230, -/* c2 - _C2 */ 0x20ad, -/* c3 - _C3 */ 0x20ae, -/* c4 - _C4 */ 0x20af, -/* c5 - _C5 */ 0x20b0, -/* c6 - _C6 */ 0x6238, -/* c7 - _C7 */ 0x6240, -/* c8 - _C8 */ 0x20b1, -/* c9 - _C9 */ 0x20b2, -/* ca - _CA */ 0x20b3, -/* cb - _CB */ 0x20b4, -/* cc - _CC */ 0x20b5, -/* cd - _CD */ 0x20b6, -/* ce - _CE */ 0x20b7, -/* cf - _CF */ 0x20b8, -/* d0 - _D0 */ 0x6248, -/* d1 - _D1 */ 0x6250, -/* d2 - _D2 */ 0x6258, -/* d3 - _D3 */ 0x6260, -/* d4 - _D4 */ 0x20b9, -/* d5 - _D5 */ 0x20ba, -/* d6 - _D6 */ 0x20bb, -/* d7 - _D7 */ 0x20bc, -/* d8 - _D8 */ 0xa268, -/* d9 - _D9 */ 0xa2b0, -/* da - _DA */ 0xa2f8, -/* db - _DB */ 0xa340, -/* dc - _DC */ 0xa388, -/* dd - _DD */ 0xa3d0, -/* de - _DE */ 0xa418, -/* df - _DF */ 0xa460, -/* e0 - _E0 */ 0x20bd, -/* e1 - _E1 */ 0x20be, -/* e2 - _E2 */ 0x20bf, -/* e3 - _E3 */ 0x4004, -/* e4 - _E4 */ 0x20c0, -/* e5 - _E5 */ 0x20c1, -/* e6 - _E6 */ 0x20c2, -/* e7 - _E7 */ 0x20c3, -/* e8 - _E8 */ 0x20c4, -/* e9 - _E9 */ 0x20c5, -/* ea - _EA */ 0x20c6, -/* eb - _EB */ 0x20c7, -/* ec - _EC */ 0x20c8, -/* ed - _ED */ 0x20c9, -/* ee - _EE */ 0x20ca, -/* ef - _EF */ 0x20cb, -/* f0 - */ 0, -/* f1 - _F1 */ 0x20cc, -/* f2 - */ 0, -/* f3 - */ 0, -/* f4 - _F4 */ 0x20cd, -/* f5 - _F5 */ 0x20ce, -/* f6 - _F6 */ 0x64a8, -/* f7 - _F7 */ 0x64b0, -/* f8 - _F8 */ 0x20cf, -/* f9 - _F9 */ 0x20d0, -/* fa - _FA */ 0x20d1, -/* fb - _FB */ 0x20d2, -/* fc - _FC */ 0x20d3, -/* fd - _FD */ 0x20d4, -/* fe - _FE */ 0x64b8, -/* ff - _FF */ 0x64c0, -/* 100 - _0F_00 */ 0x64c8, -/* 101 - _0F_01 */ 0xa4d0, -/* 102 - _0F_02 */ 0x20d5, -/* 103 - _0F_03 */ 0x20d6, -/* 104 - */ 0, -/* 105 - _0F_05 */ 0x20d7, -/* 106 - _0F_06 */ 0x20d8, -/* 107 - _0F_07 */ 0x20d9, -/* 108 - _0F_08 */ 0x20da, -/* 109 - _0F_09 */ 0x20db, -/* 10a - */ 0, -/* 10b - _0F_0B */ 0x20dc, -/* 10c - */ 0, -/* 10d - _0F_0D */ 0x6518, -/* 10e - _0F_0E */ 0x20dd, -/* 10f - _0F_0F */ 0x8520, -/* 110 - _0F_10 */ 0xc620, -/* 111 - _0F_11 */ 0xc62c, -/* 112 - _0F_12 */ 0xc638, -/* 113 - _0F_13 */ 0xc644, -/* 114 - _0F_14 */ 0xc650, -/* 115 - _0F_15 */ 0xc65c, -/* 116 - _0F_16 */ 0xc668, -/* 117 - _0F_17 */ 0xc674, -/* 118 - _0F_18 */ 0x6680, -/* 119 - */ 0, -/* 11a - */ 0, -/* 11b - */ 0, -/* 11c - */ 0, -/* 11d - */ 0, -/* 11e - */ 0, -/* 11f - _0F_1F */ 0x20de, -/* 120 - _0F_20 */ 0x20df, -/* 121 - _0F_21 */ 0x20e0, -/* 122 - _0F_22 */ 0x20e1, -/* 123 - _0F_23 */ 0x20e2, -/* 124 - */ 0, -/* 125 - */ 0, -/* 126 - */ 0, -/* 127 - */ 0, -/* 128 - _0F_28 */ 0xc688, -/* 129 - _0F_29 */ 0xc694, -/* 12a - _0F_2A */ 0xc6a0, -/* 12b - _0F_2B */ 0xc6ac, -/* 12c - _0F_2C */ 0xc6b8, -/* 12d - _0F_2D */ 0xc6c4, -/* 12e - _0F_2E */ 0xc6d0, -/* 12f - _0F_2F */ 0xc6dc, -/* 130 - _0F_30 */ 0x20e3, -/* 131 - _0F_31 */ 0x20e4, -/* 132 - _0F_32 */ 0x20e5, -/* 133 - _0F_33 */ 0x20e6, -/* 134 - _0F_34 */ 0x20e7, -/* 135 - _0F_35 */ 0x20e8, -/* 136 - */ 0, -/* 137 - _0F_37 */ 0x20e9, -/* 138 - _0F_38 */ 0x86e8, -/* 139 - */ 0, -/* 13a - _0F_3A */ 0x87e8, -/* 13b - */ 0, -/* 13c - */ 0, -/* 13d - */ 0, -/* 13e - */ 0, -/* 13f - */ 0, -/* 140 - _0F_40 */ 0x20ea, -/* 141 - _0F_41 */ 0x20eb, -/* 142 - _0F_42 */ 0x20ec, -/* 143 - _0F_43 */ 0x20ed, -/* 144 - _0F_44 */ 0x20ee, -/* 145 - _0F_45 */ 0x20ef, -/* 146 - _0F_46 */ 0x20f0, -/* 147 - _0F_47 */ 0x20f1, -/* 148 - _0F_48 */ 0x20f2, -/* 149 - _0F_49 */ 0x20f3, -/* 14a - _0F_4A */ 0x20f4, -/* 14b - _0F_4B */ 0x20f5, -/* 14c - _0F_4C */ 0x20f6, -/* 14d - _0F_4D */ 0x20f7, -/* 14e - _0F_4E */ 0x20f8, -/* 14f - _0F_4F */ 0x20f9, -/* 150 - _0F_50 */ 0xc8e8, -/* 151 - _0F_51 */ 0xc8f4, -/* 152 - _0F_52 */ 0xc900, -/* 153 - _0F_53 */ 0xc90c, -/* 154 - _0F_54 */ 0xc918, -/* 155 - _0F_55 */ 0xc924, -/* 156 - _0F_56 */ 0xc930, -/* 157 - _0F_57 */ 0xc93c, -/* 158 - _0F_58 */ 0xc948, -/* 159 - _0F_59 */ 0xc954, -/* 15a - _0F_5A */ 0xc960, -/* 15b - _0F_5B */ 0xc96c, -/* 15c - _0F_5C */ 0xc978, -/* 15d - _0F_5D */ 0xc984, -/* 15e - _0F_5E */ 0xc990, -/* 15f - _0F_5F */ 0xc99c, -/* 160 - _0F_60 */ 0xc9a8, -/* 161 - _0F_61 */ 0xc9b4, -/* 162 - _0F_62 */ 0xc9c0, -/* 163 - _0F_63 */ 0xc9cc, -/* 164 - _0F_64 */ 0xc9d8, -/* 165 - _0F_65 */ 0xc9e4, -/* 166 - _0F_66 */ 0xc9f0, -/* 167 - _0F_67 */ 0xc9fc, -/* 168 - _0F_68 */ 0xca08, -/* 169 - _0F_69 */ 0xca14, -/* 16a - _0F_6A */ 0xca20, -/* 16b - _0F_6B */ 0xca2c, -/* 16c - _0F_6C */ 0xca38, -/* 16d - _0F_6D */ 0xca44, -/* 16e - _0F_6E */ 0xca50, -/* 16f - _0F_6F */ 0xca5c, -/* 170 - _0F_70 */ 0xca68, -/* 171 - _0F_71 */ 0x6a74, -/* 172 - _0F_72 */ 0x6a7c, -/* 173 - _0F_73 */ 0x6a84, -/* 174 - _0F_74 */ 0xca8c, -/* 175 - _0F_75 */ 0xca98, -/* 176 - _0F_76 */ 0xcaa4, -/* 177 - _0F_77 */ 0xcab0, -/* 178 - _0F_78 */ 0xcabc, -/* 179 - _0F_79 */ 0xcac8, -/* 17a - _0F_7A */ 0x8ad4, -/* 17b - */ 0, -/* 17c - _0F_7C */ 0xcbd4, -/* 17d - _0F_7D */ 0xcbe0, -/* 17e - _0F_7E */ 0xcbec, -/* 17f - _0F_7F */ 0xcbf8, -/* 180 - _0F_80 */ 0x20fa, -/* 181 - _0F_81 */ 0x20fb, -/* 182 - _0F_82 */ 0x20fc, -/* 183 - _0F_83 */ 0x20fd, -/* 184 - _0F_84 */ 0x20fe, -/* 185 - _0F_85 */ 0x20ff, -/* 186 - _0F_86 */ 0x2100, -/* 187 - _0F_87 */ 0x2101, -/* 188 - _0F_88 */ 0x2102, -/* 189 - _0F_89 */ 0x2103, -/* 18a - _0F_8A */ 0x2104, -/* 18b - _0F_8B */ 0x2105, -/* 18c - _0F_8C */ 0x2106, -/* 18d - _0F_8D */ 0x2107, -/* 18e - _0F_8E */ 0x2108, -/* 18f - _0F_8F */ 0x2109, -/* 190 - _0F_90 */ 0x210a, -/* 191 - _0F_91 */ 0x210b, -/* 192 - _0F_92 */ 0x210c, -/* 193 - _0F_93 */ 0x210d, -/* 194 - _0F_94 */ 0x210e, -/* 195 - _0F_95 */ 0x210f, -/* 196 - _0F_96 */ 0x2110, -/* 197 - _0F_97 */ 0x2111, -/* 198 - _0F_98 */ 0x2112, -/* 199 - _0F_99 */ 0x2113, -/* 19a - _0F_9A */ 0x2114, -/* 19b - _0F_9B */ 0x2115, -/* 19c - _0F_9C */ 0x2116, -/* 19d - _0F_9D */ 0x2117, -/* 19e - _0F_9E */ 0x2118, -/* 19f - _0F_9F */ 0x2119, -/* 1a0 - _0F_A0 */ 0x211a, -/* 1a1 - _0F_A1 */ 0x211b, -/* 1a2 - _0F_A2 */ 0x211c, -/* 1a3 - _0F_A3 */ 0x211d, -/* 1a4 - _0F_A4 */ 0x4005, -/* 1a5 - _0F_A5 */ 0x4006, -/* 1a6 - */ 0, -/* 1a7 - */ 0, -/* 1a8 - _0F_A8 */ 0x211e, -/* 1a9 - _0F_A9 */ 0x211f, -/* 1aa - _0F_AA */ 0x2120, -/* 1ab - _0F_AB */ 0x2121, -/* 1ac - _0F_AC */ 0x4007, -/* 1ad - _0F_AD */ 0x4008, -/* 1ae - _0F_AE */ 0x6c04, -/* 1af - _0F_AF */ 0x2122, -/* 1b0 - _0F_B0 */ 0x2123, -/* 1b1 - _0F_B1 */ 0x2124, -/* 1b2 - _0F_B2 */ 0x2125, -/* 1b3 - _0F_B3 */ 0x2126, -/* 1b4 - _0F_B4 */ 0x2127, -/* 1b5 - _0F_B5 */ 0x2128, -/* 1b6 - _0F_B6 */ 0x2129, -/* 1b7 - _0F_B7 */ 0x212a, -/* 1b8 - _0F_B8 */ 0xcc0c, -/* 1b9 - _0F_B9 */ 0x212b, -/* 1ba - _0F_BA */ 0x6c18, -/* 1bb - _0F_BB */ 0x212c, -/* 1bc - _0F_BC */ 0xcc20, -/* 1bd - _0F_BD */ 0xcc2c, -/* 1be - _0F_BE */ 0x212d, -/* 1bf - _0F_BF */ 0x212e, -/* 1c0 - _0F_C0 */ 0x212f, -/* 1c1 - _0F_C1 */ 0x2130, -/* 1c2 - _0F_C2 */ 0xcc38, -/* 1c3 - _0F_C3 */ 0x2131, -/* 1c4 - _0F_C4 */ 0xcc44, -/* 1c5 - _0F_C5 */ 0xcc50, -/* 1c6 - _0F_C6 */ 0xcc5c, -/* 1c7 - _0F_C7 */ 0x6c68, -/* 1c8 - _0F_C8 */ 0x2132, -/* 1c9 - _0F_C8 */ 0x2133, -/* 1ca - _0F_C8 */ 0x2134, -/* 1cb - _0F_C8 */ 0x2135, -/* 1cc - _0F_C8 */ 0x2136, -/* 1cd - _0F_C8 */ 0x2137, -/* 1ce - _0F_C8 */ 0x2138, -/* 1cf - _0F_C8 */ 0x2139, -/* 1d0 - _0F_D0 */ 0xcc70, -/* 1d1 - _0F_D1 */ 0xcc7c, -/* 1d2 - _0F_D2 */ 0xcc88, -/* 1d3 - _0F_D3 */ 0xcc94, -/* 1d4 - _0F_D4 */ 0xcca0, -/* 1d5 - _0F_D5 */ 0xccac, -/* 1d6 - _0F_D6 */ 0xccb8, -/* 1d7 - _0F_D7 */ 0xccc4, -/* 1d8 - _0F_D8 */ 0xccd0, -/* 1d9 - _0F_D9 */ 0xccdc, -/* 1da - _0F_DA */ 0xcce8, -/* 1db - _0F_DB */ 0xccf4, -/* 1dc - _0F_DC */ 0xcd00, -/* 1dd - _0F_DD */ 0xcd0c, -/* 1de - _0F_DE */ 0xcd18, -/* 1df - _0F_DF */ 0xcd24, -/* 1e0 - _0F_E0 */ 0xcd30, -/* 1e1 - _0F_E1 */ 0xcd3c, -/* 1e2 - _0F_E2 */ 0xcd48, -/* 1e3 - _0F_E3 */ 0xcd54, -/* 1e4 - _0F_E4 */ 0xcd60, -/* 1e5 - _0F_E5 */ 0xcd6c, -/* 1e6 - _0F_E6 */ 0xcd78, -/* 1e7 - _0F_E7 */ 0xcd84, -/* 1e8 - _0F_E8 */ 0xcd90, -/* 1e9 - _0F_E9 */ 0xcd9c, -/* 1ea - _0F_EA */ 0xcda8, -/* 1eb - _0F_EB */ 0xcdb4, -/* 1ec - _0F_EC */ 0xcdc0, -/* 1ed - _0F_ED */ 0xcdcc, -/* 1ee - _0F_EE */ 0xcdd8, -/* 1ef - _0F_EF */ 0xcde4, -/* 1f0 - _0F_F0 */ 0xcdf0, -/* 1f1 - _0F_F1 */ 0xcdfc, -/* 1f2 - _0F_F2 */ 0xce08, -/* 1f3 - _0F_F3 */ 0xce14, -/* 1f4 - _0F_F4 */ 0xce20, -/* 1f5 - _0F_F5 */ 0xce2c, -/* 1f6 - _0F_F6 */ 0xce38, -/* 1f7 - _0F_F7 */ 0xce44, -/* 1f8 - _0F_F8 */ 0xce50, -/* 1f9 - _0F_F9 */ 0xce5c, -/* 1fa - _0F_FA */ 0xce68, -/* 1fb - _0F_FB */ 0xce74, -/* 1fc - _0F_FC */ 0xce80, -/* 1fd - _0F_FD */ 0xce8c, -/* 1fe - _0F_FE */ 0xce98, -/* 1ff - */ 0, -/* 200 - _80_00 */ 0x213a, -/* 201 - _80_01 */ 0x213b, -/* 202 - _80_02 */ 0x213c, -/* 203 - _80_03 */ 0x213d, -/* 204 - _80_04 */ 0x213e, -/* 205 - _80_05 */ 0x213f, -/* 206 - _80_06 */ 0x2140, -/* 207 - _80_07 */ 0x2141, -/* 208 - _81_00 */ 0x2142, -/* 209 - _81_01 */ 0x2143, -/* 20a - _81_02 */ 0x2144, -/* 20b - _81_03 */ 0x2145, -/* 20c - _81_04 */ 0x2146, -/* 20d - _81_05 */ 0x2147, -/* 20e - _81_06 */ 0x2148, -/* 20f - _81_07 */ 0x2149, -/* 210 - _82_00 */ 0x214a, -/* 211 - _82_01 */ 0x214b, -/* 212 - _82_02 */ 0x214c, -/* 213 - _82_03 */ 0x214d, -/* 214 - _82_04 */ 0x214e, -/* 215 - _82_05 */ 0x214f, -/* 216 - _82_06 */ 0x2150, -/* 217 - _82_07 */ 0x2151, -/* 218 - _83_00 */ 0x2152, -/* 219 - _83_01 */ 0x2153, -/* 21a - _83_02 */ 0x2154, -/* 21b - _83_03 */ 0x2155, -/* 21c - _83_04 */ 0x2156, -/* 21d - _83_05 */ 0x2157, -/* 21e - _83_06 */ 0x2158, -/* 21f - _83_07 */ 0x2159, -/* 220 - _8F_00 */ 0x215a, -/* 221 - */ 0, -/* 222 - */ 0, -/* 223 - */ 0, -/* 224 - */ 0, -/* 225 - */ 0, -/* 226 - */ 0, -/* 227 - */ 0, -/* 228 - _C0_00 */ 0x215b, -/* 229 - _C0_01 */ 0x215c, -/* 22a - _C0_02 */ 0x215d, -/* 22b - _C0_03 */ 0x215e, -/* 22c - _C0_04 */ 0x215f, -/* 22d - _C0_05 */ 0x2160, -/* 22e - _C0_06 */ 0x2161, -/* 22f - _C0_07 */ 0x2162, -/* 230 - _C1_00 */ 0x2163, -/* 231 - _C1_01 */ 0x2164, -/* 232 - _C1_02 */ 0x2165, -/* 233 - _C1_03 */ 0x2166, -/* 234 - _C1_04 */ 0x2167, -/* 235 - _C1_05 */ 0x2168, -/* 236 - _C1_06 */ 0x2169, -/* 237 - _C1_07 */ 0x216a, -/* 238 - _C6_00 */ 0x216b, -/* 239 - */ 0, -/* 23a - */ 0, -/* 23b - */ 0, -/* 23c - */ 0, -/* 23d - */ 0, -/* 23e - */ 0, -/* 23f - */ 0, -/* 240 - _C7_00 */ 0x216c, -/* 241 - */ 0, -/* 242 - */ 0, -/* 243 - */ 0, -/* 244 - */ 0, -/* 245 - */ 0, -/* 246 - */ 0, -/* 247 - */ 0, -/* 248 - _D0_00 */ 0x216d, -/* 249 - _D0_01 */ 0x216e, -/* 24a - _D0_02 */ 0x216f, -/* 24b - _D0_03 */ 0x2170, -/* 24c - _D0_04 */ 0x2171, -/* 24d - _D0_05 */ 0x2172, -/* 24e - _D0_06 */ 0x2173, -/* 24f - _D0_07 */ 0x2174, -/* 250 - _D1_00 */ 0x2175, -/* 251 - _D1_01 */ 0x2176, -/* 252 - _D1_02 */ 0x2177, -/* 253 - _D1_03 */ 0x2178, -/* 254 - _D1_04 */ 0x2179, -/* 255 - _D1_05 */ 0x217a, -/* 256 - _D1_06 */ 0x217b, -/* 257 - _D1_07 */ 0x217c, -/* 258 - _D2_00 */ 0x217d, -/* 259 - _D2_01 */ 0x217e, -/* 25a - _D2_02 */ 0x217f, -/* 25b - _D2_03 */ 0x2180, -/* 25c - _D2_04 */ 0x2181, -/* 25d - _D2_05 */ 0x2182, -/* 25e - _D2_06 */ 0x2183, -/* 25f - _D2_07 */ 0x2184, -/* 260 - _D3_00 */ 0x2185, -/* 261 - _D3_01 */ 0x2186, -/* 262 - _D3_02 */ 0x2187, -/* 263 - _D3_03 */ 0x2188, -/* 264 - _D3_04 */ 0x2189, -/* 265 - _D3_05 */ 0x218a, -/* 266 - _D3_06 */ 0x218b, -/* 267 - _D3_07 */ 0x218c, -/* 268 - _D8_00 */ 0x218d, -/* 269 - _D8_01 */ 0x218e, -/* 26a - _D8_02 */ 0x218f, -/* 26b - _D8_03 */ 0x2190, -/* 26c - _D8_04 */ 0x2191, -/* 26d - _D8_05 */ 0x2192, -/* 26e - _D8_06 */ 0x2193, -/* 26f - _D8_07 */ 0x2194, -/* 270 - _D8_C0 */ 0x2195, -/* 271 - _D8_C0 */ 0x2196, -/* 272 - _D8_C0 */ 0x2197, -/* 273 - _D8_C0 */ 0x2198, -/* 274 - _D8_C0 */ 0x2199, -/* 275 - _D8_C0 */ 0x219a, -/* 276 - _D8_C0 */ 0x219b, -/* 277 - _D8_C0 */ 0x219c, -/* 278 - _D8_C8 */ 0x219d, -/* 279 - _D8_C8 */ 0x219e, -/* 27a - _D8_C8 */ 0x219f, -/* 27b - _D8_C8 */ 0x21a0, -/* 27c - _D8_C8 */ 0x21a1, -/* 27d - _D8_C8 */ 0x21a2, -/* 27e - _D8_C8 */ 0x21a3, -/* 27f - _D8_C8 */ 0x21a4, -/* 280 - _D8_D0 */ 0x21a5, -/* 281 - _D8_D0 */ 0x21a6, -/* 282 - _D8_D0 */ 0x21a7, -/* 283 - _D8_D0 */ 0x21a8, -/* 284 - _D8_D0 */ 0x21a9, -/* 285 - _D8_D0 */ 0x21aa, -/* 286 - _D8_D0 */ 0x21ab, -/* 287 - _D8_D0 */ 0x21ac, -/* 288 - _D8_D8 */ 0x21ad, -/* 289 - _D8_D9 */ 0x21ae, -/* 28a - _D8_D8 */ 0x21af, -/* 28b - _D8_D8 */ 0x21b0, -/* 28c - _D8_D8 */ 0x21b1, -/* 28d - _D8_D8 */ 0x21b2, -/* 28e - _D8_D8 */ 0x21b3, -/* 28f - _D8_D8 */ 0x21b4, -/* 290 - _D8_E0 */ 0x21b5, -/* 291 - _D8_E0 */ 0x21b6, -/* 292 - _D8_E0 */ 0x21b7, -/* 293 - _D8_E0 */ 0x21b8, -/* 294 - _D8_E0 */ 0x21b9, -/* 295 - _D8_E0 */ 0x21ba, -/* 296 - _D8_E0 */ 0x21bb, -/* 297 - _D8_E0 */ 0x21bc, -/* 298 - _D8_E8 */ 0x21bd, -/* 299 - _D8_E8 */ 0x21be, -/* 29a - _D8_E8 */ 0x21bf, -/* 29b - _D8_E8 */ 0x21c0, -/* 29c - _D8_E8 */ 0x21c1, -/* 29d - _D8_E8 */ 0x21c2, -/* 29e - _D8_E8 */ 0x21c3, -/* 29f - _D8_E8 */ 0x21c4, -/* 2a0 - _D8_F0 */ 0x21c5, -/* 2a1 - _D8_F0 */ 0x21c6, -/* 2a2 - _D8_F0 */ 0x21c7, -/* 2a3 - _D8_F0 */ 0x21c8, -/* 2a4 - _D8_F0 */ 0x21c9, -/* 2a5 - _D8_F0 */ 0x21ca, -/* 2a6 - _D8_F0 */ 0x21cb, -/* 2a7 - _D8_F0 */ 0x21cc, -/* 2a8 - _D8_F8 */ 0x21cd, -/* 2a9 - _D8_F8 */ 0x21ce, -/* 2aa - _D8_F8 */ 0x21cf, -/* 2ab - _D8_F8 */ 0x21d0, -/* 2ac - _D8_F8 */ 0x21d1, -/* 2ad - _D8_F8 */ 0x21d2, -/* 2ae - _D8_F8 */ 0x21d3, -/* 2af - _D8_F8 */ 0x21d4, -/* 2b0 - _D9_00 */ 0x21d5, -/* 2b1 - */ 0, -/* 2b2 - _D9_02 */ 0x21d6, -/* 2b3 - _D9_03 */ 0x21d7, -/* 2b4 - _D9_04 */ 0x21d8, -/* 2b5 - _D9_05 */ 0x21d9, -/* 2b6 - _D9_06 */ 0xcea4, -/* 2b7 - _D9_07 */ 0xceb0, -/* 2b8 - _D9_C0 */ 0x21da, -/* 2b9 - _D9_C0 */ 0x21db, -/* 2ba - _D9_C0 */ 0x21dc, -/* 2bb - _D9_C0 */ 0x21dd, -/* 2bc - _D9_C0 */ 0x21de, -/* 2bd - _D9_C0 */ 0x21df, -/* 2be - _D9_C0 */ 0x21e0, -/* 2bf - _D9_C0 */ 0x21e1, -/* 2c0 - _D9_C8 */ 0x21e2, -/* 2c1 - _D9_C9 */ 0x21e3, -/* 2c2 - _D9_C8 */ 0x21e4, -/* 2c3 - _D9_C8 */ 0x21e5, -/* 2c4 - _D9_C8 */ 0x21e6, -/* 2c5 - _D9_C8 */ 0x21e7, -/* 2c6 - _D9_C8 */ 0x21e8, -/* 2c7 - _D9_C8 */ 0x21e9, -/* 2c8 - _D9_D0 */ 0x21ea, -/* 2c9 - */ 0, -/* 2ca - */ 0, -/* 2cb - */ 0, -/* 2cc - */ 0, -/* 2cd - */ 0, -/* 2ce - */ 0, -/* 2cf - */ 0, -/* 2d0 - */ 0, -/* 2d1 - */ 0, -/* 2d2 - */ 0, -/* 2d3 - */ 0, -/* 2d4 - */ 0, -/* 2d5 - */ 0, -/* 2d6 - */ 0, -/* 2d7 - */ 0, -/* 2d8 - _D9_E0 */ 0x21eb, -/* 2d9 - _D9_E1 */ 0x21ec, -/* 2da - */ 0, -/* 2db - */ 0, -/* 2dc - _D9_E4 */ 0x21ed, -/* 2dd - _D9_E5 */ 0x21ee, -/* 2de - */ 0, -/* 2df - */ 0, -/* 2e0 - _D9_E8 */ 0x21ef, -/* 2e1 - _D9_E9 */ 0x21f0, -/* 2e2 - _D9_EA */ 0x21f1, -/* 2e3 - _D9_EB */ 0x21f2, -/* 2e4 - _D9_EC */ 0x21f3, -/* 2e5 - _D9_ED */ 0x21f4, -/* 2e6 - _D9_EE */ 0x21f5, -/* 2e7 - */ 0, -/* 2e8 - _D9_F0 */ 0x21f6, -/* 2e9 - _D9_F1 */ 0x21f7, -/* 2ea - _D9_F2 */ 0x21f8, -/* 2eb - _D9_F3 */ 0x21f9, -/* 2ec - _D9_F4 */ 0x21fa, -/* 2ed - _D9_F5 */ 0x21fb, -/* 2ee - _D9_F6 */ 0x21fc, -/* 2ef - _D9_F7 */ 0x21fd, -/* 2f0 - _D9_F8 */ 0x21fe, -/* 2f1 - _D9_F9 */ 0x21ff, -/* 2f2 - _D9_FA */ 0x2200, -/* 2f3 - _D9_FB */ 0x2201, -/* 2f4 - _D9_FC */ 0x2202, -/* 2f5 - _D9_FD */ 0x2203, -/* 2f6 - _D9_FE */ 0x2204, -/* 2f7 - _D9_FF */ 0x2205, -/* 2f8 - _DA_00 */ 0x2206, -/* 2f9 - _DA_01 */ 0x2207, -/* 2fa - _DA_02 */ 0x2208, -/* 2fb - _DA_03 */ 0x2209, -/* 2fc - _DA_04 */ 0x220a, -/* 2fd - _DA_05 */ 0x220b, -/* 2fe - _DA_06 */ 0x220c, -/* 2ff - _DA_07 */ 0x220d, -/* 300 - _DA_C0 */ 0x220e, -/* 301 - _DA_C0 */ 0x220f, -/* 302 - _DA_C0 */ 0x2210, -/* 303 - _DA_C0 */ 0x2211, -/* 304 - _DA_C0 */ 0x2212, -/* 305 - _DA_C0 */ 0x2213, -/* 306 - _DA_C0 */ 0x2214, -/* 307 - _DA_C0 */ 0x2215, -/* 308 - _DA_C8 */ 0x2216, -/* 309 - _DA_C8 */ 0x2217, -/* 30a - _DA_C8 */ 0x2218, -/* 30b - _DA_C8 */ 0x2219, -/* 30c - _DA_C8 */ 0x221a, -/* 30d - _DA_C8 */ 0x221b, -/* 30e - _DA_C8 */ 0x221c, -/* 30f - _DA_C8 */ 0x221d, -/* 310 - _DA_D0 */ 0x221e, -/* 311 - _DA_D0 */ 0x221f, -/* 312 - _DA_D0 */ 0x2220, -/* 313 - _DA_D0 */ 0x2221, -/* 314 - _DA_D0 */ 0x2222, -/* 315 - _DA_D0 */ 0x2223, -/* 316 - _DA_D0 */ 0x2224, -/* 317 - _DA_D0 */ 0x2225, -/* 318 - _DA_D8 */ 0x2226, -/* 319 - _DA_D8 */ 0x2227, -/* 31a - _DA_D8 */ 0x2228, -/* 31b - _DA_D8 */ 0x2229, -/* 31c - _DA_D8 */ 0x222a, -/* 31d - _DA_D8 */ 0x222b, -/* 31e - _DA_D8 */ 0x222c, -/* 31f - _DA_D8 */ 0x222d, -/* 320 - */ 0, -/* 321 - */ 0, -/* 322 - */ 0, -/* 323 - */ 0, -/* 324 - */ 0, -/* 325 - */ 0, -/* 326 - */ 0, -/* 327 - */ 0, -/* 328 - */ 0, -/* 329 - _DA_E9 */ 0x222e, -/* 32a - */ 0, -/* 32b - */ 0, -/* 32c - */ 0, -/* 32d - */ 0, -/* 32e - */ 0, -/* 32f - */ 0, -/* 330 - */ 0, -/* 331 - */ 0, -/* 332 - */ 0, -/* 333 - */ 0, -/* 334 - */ 0, -/* 335 - */ 0, -/* 336 - */ 0, -/* 337 - */ 0, -/* 338 - */ 0, -/* 339 - */ 0, -/* 33a - */ 0, -/* 33b - */ 0, -/* 33c - */ 0, -/* 33d - */ 0, -/* 33e - */ 0, -/* 33f - */ 0, -/* 340 - _DB_00 */ 0x222f, -/* 341 - _DB_01 */ 0x2230, -/* 342 - _DB_02 */ 0x2231, -/* 343 - _DB_03 */ 0x2232, -/* 344 - */ 0, -/* 345 - _DB_05 */ 0x2233, -/* 346 - */ 0, -/* 347 - _DB_07 */ 0x2234, -/* 348 - _DB_C0 */ 0x2235, -/* 349 - _DB_C0 */ 0x2236, -/* 34a - _DB_C0 */ 0x2237, -/* 34b - _DB_C0 */ 0x2238, -/* 34c - _DB_C0 */ 0x2239, -/* 34d - _DB_C0 */ 0x223a, -/* 34e - _DB_C0 */ 0x223b, -/* 34f - _DB_C0 */ 0x223c, -/* 350 - _DB_C8 */ 0x223d, -/* 351 - _DB_C8 */ 0x223e, -/* 352 - _DB_C8 */ 0x223f, -/* 353 - _DB_C8 */ 0x2240, -/* 354 - _DB_C8 */ 0x2241, -/* 355 - _DB_C8 */ 0x2242, -/* 356 - _DB_C8 */ 0x2243, -/* 357 - _DB_C8 */ 0x2244, -/* 358 - _DB_D0 */ 0x2245, -/* 359 - _DB_D0 */ 0x2246, -/* 35a - _DB_D0 */ 0x2247, -/* 35b - _DB_D0 */ 0x2248, -/* 35c - _DB_D0 */ 0x2249, -/* 35d - _DB_D0 */ 0x224a, -/* 35e - _DB_D0 */ 0x224b, -/* 35f - _DB_D0 */ 0x224c, -/* 360 - _DB_D8 */ 0x224d, -/* 361 - _DB_D8 */ 0x224e, -/* 362 - _DB_D8 */ 0x224f, -/* 363 - _DB_D8 */ 0x2250, -/* 364 - _DB_D8 */ 0x2251, -/* 365 - _DB_D8 */ 0x2252, -/* 366 - _DB_D8 */ 0x2253, -/* 367 - _DB_D8 */ 0x2254, -/* 368 - _DB_E0 */ 0x2255, -/* 369 - _DB_E1 */ 0x2256, -/* 36a - _DB_E2 */ 0xcebc, -/* 36b - _DB_E3 */ 0xcec8, -/* 36c - _DB_E4 */ 0x2257, -/* 36d - */ 0, -/* 36e - */ 0, -/* 36f - */ 0, -/* 370 - _DB_E8 */ 0x2258, -/* 371 - _DB_E8 */ 0x2259, -/* 372 - _DB_E8 */ 0x225a, -/* 373 - _DB_E8 */ 0x225b, -/* 374 - _DB_E8 */ 0x225c, -/* 375 - _DB_E8 */ 0x225d, -/* 376 - _DB_E8 */ 0x225e, -/* 377 - _DB_E8 */ 0x225f, -/* 378 - _DB_F0 */ 0x2260, -/* 379 - _DB_F0 */ 0x2261, -/* 37a - _DB_F0 */ 0x2262, -/* 37b - _DB_F0 */ 0x2263, -/* 37c - _DB_F0 */ 0x2264, -/* 37d - _DB_F0 */ 0x2265, -/* 37e - _DB_F0 */ 0x2266, -/* 37f - _DB_F0 */ 0x2267, -/* 380 - */ 0, -/* 381 - */ 0, -/* 382 - */ 0, -/* 383 - */ 0, -/* 384 - */ 0, -/* 385 - */ 0, -/* 386 - */ 0, -/* 387 - */ 0, -/* 388 - _DC_00 */ 0x2268, -/* 389 - _DC_01 */ 0x2269, -/* 38a - _DC_02 */ 0x226a, -/* 38b - _DC_03 */ 0x226b, -/* 38c - _DC_04 */ 0x226c, -/* 38d - _DC_05 */ 0x226d, -/* 38e - _DC_06 */ 0x226e, -/* 38f - _DC_07 */ 0x226f, -/* 390 - _DC_C0 */ 0x2270, -/* 391 - _DC_C0 */ 0x2271, -/* 392 - _DC_C0 */ 0x2272, -/* 393 - _DC_C0 */ 0x2273, -/* 394 - _DC_C0 */ 0x2274, -/* 395 - _DC_C0 */ 0x2275, -/* 396 - _DC_C0 */ 0x2276, -/* 397 - _DC_C0 */ 0x2277, -/* 398 - _DC_C8 */ 0x2278, -/* 399 - _DC_C8 */ 0x2279, -/* 39a - _DC_C8 */ 0x227a, -/* 39b - _DC_C8 */ 0x227b, -/* 39c - _DC_C8 */ 0x227c, -/* 39d - _DC_C8 */ 0x227d, -/* 39e - _DC_C8 */ 0x227e, -/* 39f - _DC_C8 */ 0x227f, -/* 3a0 - */ 0, -/* 3a1 - */ 0, -/* 3a2 - */ 0, -/* 3a3 - */ 0, -/* 3a4 - */ 0, -/* 3a5 - */ 0, -/* 3a6 - */ 0, -/* 3a7 - */ 0, -/* 3a8 - */ 0, -/* 3a9 - */ 0, -/* 3aa - */ 0, -/* 3ab - */ 0, -/* 3ac - */ 0, -/* 3ad - */ 0, -/* 3ae - */ 0, -/* 3af - */ 0, -/* 3b0 - _DC_E0 */ 0x2280, -/* 3b1 - _DC_E0 */ 0x2281, -/* 3b2 - _DC_E0 */ 0x2282, -/* 3b3 - _DC_E0 */ 0x2283, -/* 3b4 - _DC_E0 */ 0x2284, -/* 3b5 - _DC_E0 */ 0x2285, -/* 3b6 - _DC_E0 */ 0x2286, -/* 3b7 - _DC_E0 */ 0x2287, -/* 3b8 - _DC_E8 */ 0x2288, -/* 3b9 - _DC_E8 */ 0x2289, -/* 3ba - _DC_E8 */ 0x228a, -/* 3bb - _DC_E8 */ 0x228b, -/* 3bc - _DC_E8 */ 0x228c, -/* 3bd - _DC_E8 */ 0x228d, -/* 3be - _DC_E8 */ 0x228e, -/* 3bf - _DC_E8 */ 0x228f, -/* 3c0 - _DC_F0 */ 0x2290, -/* 3c1 - _DC_F0 */ 0x2291, -/* 3c2 - _DC_F0 */ 0x2292, -/* 3c3 - _DC_F0 */ 0x2293, -/* 3c4 - _DC_F0 */ 0x2294, -/* 3c5 - _DC_F0 */ 0x2295, -/* 3c6 - _DC_F0 */ 0x2296, -/* 3c7 - _DC_F0 */ 0x2297, -/* 3c8 - _DC_F8 */ 0x2298, -/* 3c9 - _DC_F8 */ 0x2299, -/* 3ca - _DC_F8 */ 0x229a, -/* 3cb - _DC_F8 */ 0x229b, -/* 3cc - _DC_F8 */ 0x229c, -/* 3cd - _DC_F8 */ 0x229d, -/* 3ce - _DC_F8 */ 0x229e, -/* 3cf - _DC_F8 */ 0x229f, -/* 3d0 - _DD_00 */ 0x22a0, -/* 3d1 - _DD_01 */ 0x22a1, -/* 3d2 - _DD_02 */ 0x22a2, -/* 3d3 - _DD_03 */ 0x22a3, -/* 3d4 - _DD_04 */ 0x22a4, -/* 3d5 - */ 0, -/* 3d6 - _DD_06 */ 0xced4, -/* 3d7 - _DD_07 */ 0xcee0, -/* 3d8 - _DD_C0 */ 0x22a5, -/* 3d9 - _DD_C0 */ 0x22a6, -/* 3da - _DD_C0 */ 0x22a7, -/* 3db - _DD_C0 */ 0x22a8, -/* 3dc - _DD_C0 */ 0x22a9, -/* 3dd - _DD_C0 */ 0x22aa, -/* 3de - _DD_C0 */ 0x22ab, -/* 3df - _DD_C0 */ 0x22ac, -/* 3e0 - */ 0, -/* 3e1 - */ 0, -/* 3e2 - */ 0, -/* 3e3 - */ 0, -/* 3e4 - */ 0, -/* 3e5 - */ 0, -/* 3e6 - */ 0, -/* 3e7 - */ 0, -/* 3e8 - _DD_D0 */ 0x22ad, -/* 3e9 - _DD_D0 */ 0x22ae, -/* 3ea - _DD_D0 */ 0x22af, -/* 3eb - _DD_D0 */ 0x22b0, -/* 3ec - _DD_D0 */ 0x22b1, -/* 3ed - _DD_D0 */ 0x22b2, -/* 3ee - _DD_D0 */ 0x22b3, -/* 3ef - _DD_D0 */ 0x22b4, -/* 3f0 - _DD_D8 */ 0x22b5, -/* 3f1 - _DD_D8 */ 0x22b6, -/* 3f2 - _DD_D8 */ 0x22b7, -/* 3f3 - _DD_D8 */ 0x22b8, -/* 3f4 - _DD_D8 */ 0x22b9, -/* 3f5 - _DD_D8 */ 0x22ba, -/* 3f6 - _DD_D8 */ 0x22bb, -/* 3f7 - _DD_D8 */ 0x22bc, -/* 3f8 - _DD_E0 */ 0x22bd, -/* 3f9 - _DD_E1 */ 0x22be, -/* 3fa - _DD_E0 */ 0x22bf, -/* 3fb - _DD_E0 */ 0x22c0, -/* 3fc - _DD_E0 */ 0x22c1, -/* 3fd - _DD_E0 */ 0x22c2, -/* 3fe - _DD_E0 */ 0x22c3, -/* 3ff - _DD_E0 */ 0x22c4, -/* 400 - _DD_E8 */ 0x22c5, -/* 401 - _DD_E9 */ 0x22c6, -/* 402 - _DD_E8 */ 0x22c7, -/* 403 - _DD_E8 */ 0x22c8, -/* 404 - _DD_E8 */ 0x22c9, -/* 405 - _DD_E8 */ 0x22ca, -/* 406 - _DD_E8 */ 0x22cb, -/* 407 - _DD_E8 */ 0x22cc, -/* 408 - */ 0, -/* 409 - */ 0, -/* 40a - */ 0, -/* 40b - */ 0, -/* 40c - */ 0, -/* 40d - */ 0, -/* 40e - */ 0, -/* 40f - */ 0, -/* 410 - */ 0, -/* 411 - */ 0, -/* 412 - */ 0, -/* 413 - */ 0, -/* 414 - */ 0, -/* 415 - */ 0, -/* 416 - */ 0, -/* 417 - */ 0, -/* 418 - _DE_00 */ 0x22cd, -/* 419 - _DE_01 */ 0x22ce, -/* 41a - _DE_02 */ 0x22cf, -/* 41b - _DE_03 */ 0x22d0, -/* 41c - _DE_04 */ 0x22d1, -/* 41d - _DE_05 */ 0x22d2, -/* 41e - _DE_06 */ 0x22d3, -/* 41f - _DE_07 */ 0x22d4, -/* 420 - _DE_C0 */ 0x22d5, -/* 421 - _DE_C1 */ 0x22d6, -/* 422 - _DE_C0 */ 0x22d7, -/* 423 - _DE_C0 */ 0x22d8, -/* 424 - _DE_C0 */ 0x22d9, -/* 425 - _DE_C0 */ 0x22da, -/* 426 - _DE_C0 */ 0x22db, -/* 427 - _DE_C0 */ 0x22dc, -/* 428 - _DE_C8 */ 0x22dd, -/* 429 - _DE_C9 */ 0x22de, -/* 42a - _DE_C8 */ 0x22df, -/* 42b - _DE_C8 */ 0x22e0, -/* 42c - _DE_C8 */ 0x22e1, -/* 42d - _DE_C8 */ 0x22e2, -/* 42e - _DE_C8 */ 0x22e3, -/* 42f - _DE_C8 */ 0x22e4, -/* 430 - */ 0, -/* 431 - */ 0, -/* 432 - */ 0, -/* 433 - */ 0, -/* 434 - */ 0, -/* 435 - */ 0, -/* 436 - */ 0, -/* 437 - */ 0, -/* 438 - */ 0, -/* 439 - _DE_D9 */ 0x22e5, -/* 43a - */ 0, -/* 43b - */ 0, -/* 43c - */ 0, -/* 43d - */ 0, -/* 43e - */ 0, -/* 43f - */ 0, -/* 440 - _DE_E0 */ 0x22e6, -/* 441 - _DE_E1 */ 0x22e7, -/* 442 - _DE_E0 */ 0x22e8, -/* 443 - _DE_E0 */ 0x22e9, -/* 444 - _DE_E0 */ 0x22ea, -/* 445 - _DE_E0 */ 0x22eb, -/* 446 - _DE_E0 */ 0x22ec, -/* 447 - _DE_E0 */ 0x22ed, -/* 448 - _DE_E8 */ 0x22ee, -/* 449 - _DE_E9 */ 0x22ef, -/* 44a - _DE_E8 */ 0x22f0, -/* 44b - _DE_E8 */ 0x22f1, -/* 44c - _DE_E8 */ 0x22f2, -/* 44d - _DE_E8 */ 0x22f3, -/* 44e - _DE_E8 */ 0x22f4, -/* 44f - _DE_E8 */ 0x22f5, -/* 450 - _DE_F0 */ 0x22f6, -/* 451 - _DE_F1 */ 0x22f7, -/* 452 - _DE_F0 */ 0x22f8, -/* 453 - _DE_F0 */ 0x22f9, -/* 454 - _DE_F0 */ 0x22fa, -/* 455 - _DE_F0 */ 0x22fb, -/* 456 - _DE_F0 */ 0x22fc, -/* 457 - _DE_F0 */ 0x22fd, -/* 458 - _DE_F8 */ 0x22fe, -/* 459 - _DE_F9 */ 0x22ff, -/* 45a - _DE_F8 */ 0x2300, -/* 45b - _DE_F8 */ 0x2301, -/* 45c - _DE_F8 */ 0x2302, -/* 45d - _DE_F8 */ 0x2303, -/* 45e - _DE_F8 */ 0x2304, -/* 45f - _DE_F8 */ 0x2305, -/* 460 - _DF_00 */ 0x2306, -/* 461 - _DF_01 */ 0x2307, -/* 462 - _DF_02 */ 0x2308, -/* 463 - _DF_03 */ 0x2309, -/* 464 - _DF_04 */ 0x230a, -/* 465 - _DF_05 */ 0x230b, -/* 466 - _DF_06 */ 0x230c, -/* 467 - _DF_07 */ 0x230d, -/* 468 - */ 0, -/* 469 - */ 0, -/* 46a - */ 0, -/* 46b - */ 0, -/* 46c - */ 0, -/* 46d - */ 0, -/* 46e - */ 0, -/* 46f - */ 0, -/* 470 - */ 0, -/* 471 - */ 0, -/* 472 - */ 0, -/* 473 - */ 0, -/* 474 - */ 0, -/* 475 - */ 0, -/* 476 - */ 0, -/* 477 - */ 0, -/* 478 - */ 0, -/* 479 - */ 0, -/* 47a - */ 0, -/* 47b - */ 0, -/* 47c - */ 0, -/* 47d - */ 0, -/* 47e - */ 0, -/* 47f - */ 0, -/* 480 - */ 0, -/* 481 - */ 0, -/* 482 - */ 0, -/* 483 - */ 0, -/* 484 - */ 0, -/* 485 - */ 0, -/* 486 - */ 0, -/* 487 - */ 0, -/* 488 - _DF_E0 */ 0xceec, -/* 489 - */ 0, -/* 48a - */ 0, -/* 48b - */ 0, -/* 48c - */ 0, -/* 48d - */ 0, -/* 48e - */ 0, -/* 48f - */ 0, -/* 490 - _DF_E8 */ 0x230e, -/* 491 - _DF_E8 */ 0x230f, -/* 492 - _DF_E8 */ 0x2310, -/* 493 - _DF_E8 */ 0x2311, -/* 494 - _DF_E8 */ 0x2312, -/* 495 - _DF_E8 */ 0x2313, -/* 496 - _DF_E8 */ 0x2314, -/* 497 - _DF_E8 */ 0x2315, -/* 498 - _DF_F0 */ 0x2316, -/* 499 - _DF_F0 */ 0x2317, -/* 49a - _DF_F0 */ 0x2318, -/* 49b - _DF_F0 */ 0x2319, -/* 49c - _DF_F0 */ 0x231a, -/* 49d - _DF_F0 */ 0x231b, -/* 49e - _DF_F0 */ 0x231c, -/* 49f - _DF_F0 */ 0x231d, -/* 4a0 - */ 0, -/* 4a1 - */ 0, -/* 4a2 - */ 0, -/* 4a3 - */ 0, -/* 4a4 - */ 0, -/* 4a5 - */ 0, -/* 4a6 - */ 0, -/* 4a7 - */ 0, -/* 4a8 - _F6_00 */ 0x231e, -/* 4a9 - */ 0, -/* 4aa - _F6_02 */ 0x231f, -/* 4ab - _F6_03 */ 0x2320, -/* 4ac - _F6_04 */ 0x2321, -/* 4ad - _F6_05 */ 0x2322, -/* 4ae - _F6_06 */ 0x2323, -/* 4af - _F6_07 */ 0x2324, -/* 4b0 - _F7_00 */ 0x2325, -/* 4b1 - */ 0, -/* 4b2 - _F7_02 */ 0x2326, -/* 4b3 - _F7_03 */ 0x2327, -/* 4b4 - _F7_04 */ 0x2328, -/* 4b5 - _F7_05 */ 0x2329, -/* 4b6 - _F7_06 */ 0x232a, -/* 4b7 - _F7_07 */ 0x232b, -/* 4b8 - _FE_00 */ 0x232c, -/* 4b9 - _FE_01 */ 0x232d, -/* 4ba - */ 0, -/* 4bb - */ 0, -/* 4bc - */ 0, -/* 4bd - */ 0, -/* 4be - */ 0, -/* 4bf - */ 0, -/* 4c0 - _FF_00 */ 0x232e, -/* 4c1 - _FF_01 */ 0x232f, -/* 4c2 - _FF_02 */ 0x2330, -/* 4c3 - _FF_03 */ 0x2331, -/* 4c4 - _FF_04 */ 0x2332, -/* 4c5 - _FF_05 */ 0x2333, -/* 4c6 - _FF_06 */ 0x2334, -/* 4c7 - */ 0, -/* 4c8 - _0F_00_00 */ 0x2335, -/* 4c9 - _0F_00_01 */ 0x2336, -/* 4ca - _0F_00_02 */ 0x2337, -/* 4cb - _0F_00_03 */ 0x2338, -/* 4cc - _0F_00_04 */ 0x2339, -/* 4cd - _0F_00_05 */ 0x233a, -/* 4ce - */ 0, -/* 4cf - */ 0, -/* 4d0 - _0F_01_00 */ 0x233b, -/* 4d1 - _0F_01_01 */ 0x233c, -/* 4d2 - _0F_01_02 */ 0x233d, -/* 4d3 - _0F_01_03 */ 0x233e, -/* 4d4 - _0F_01_04 */ 0x233f, -/* 4d5 - */ 0, -/* 4d6 - _0F_01_06 */ 0x2340, -/* 4d7 - _0F_01_07 */ 0x2341, -/* 4d8 - */ 0, -/* 4d9 - _0F_01_C1 */ 0x2342, -/* 4da - _0F_01_C2 */ 0x2343, -/* 4db - _0F_01_C3 */ 0x2344, -/* 4dc - _0F_01_C4 */ 0x2345, -/* 4dd - */ 0, -/* 4de - */ 0, -/* 4df - */ 0, -/* 4e0 - _0F_01_C8 */ 0x2346, -/* 4e1 - _0F_01_C9 */ 0x2347, -/* 4e2 - */ 0, -/* 4e3 - */ 0, -/* 4e4 - */ 0, -/* 4e5 - */ 0, -/* 4e6 - */ 0, -/* 4e7 - */ 0, -/* 4e8 - _0F_01_D0 */ 0x2348, -/* 4e9 - _0F_01_D1 */ 0x2349, -/* 4ea - */ 0, -/* 4eb - */ 0, -/* 4ec - _0F_01_D4 */ 0x234a, -/* 4ed - */ 0, -/* 4ee - */ 0, -/* 4ef - */ 0, -/* 4f0 - _0F_01_D8 */ 0x234b, -/* 4f1 - _0F_01_D9 */ 0x234c, -/* 4f2 - _0F_01_DA */ 0x234d, -/* 4f3 - _0F_01_DB */ 0x234e, -/* 4f4 - _0F_01_DC */ 0x234f, -/* 4f5 - _0F_01_DD */ 0x2350, -/* 4f6 - _0F_01_DE */ 0x2351, -/* 4f7 - _0F_01_DF */ 0x2352, -/* 4f8 - */ 0, -/* 4f9 - */ 0, -/* 4fa - */ 0, -/* 4fb - */ 0, -/* 4fc - */ 0, -/* 4fd - */ 0, -/* 4fe - */ 0, -/* 4ff - */ 0, -/* 500 - */ 0, -/* 501 - */ 0, -/* 502 - */ 0, -/* 503 - */ 0, -/* 504 - */ 0, -/* 505 - */ 0, -/* 506 - */ 0, -/* 507 - */ 0, -/* 508 - */ 0, -/* 509 - */ 0, -/* 50a - */ 0, -/* 50b - */ 0, -/* 50c - */ 0, -/* 50d - */ 0, -/* 50e - */ 0, -/* 50f - */ 0, -/* 510 - _0F_01_F8 */ 0x2353, -/* 511 - _0F_01_F9 */ 0x2354, -/* 512 - */ 0, -/* 513 - */ 0, -/* 514 - */ 0, -/* 515 - */ 0, -/* 516 - */ 0, -/* 517 - */ 0, -/* 518 - _0F_0D_00 */ 0x2355, -/* 519 - _0F_0D_01 */ 0x2356, -/* 51a - */ 0, -/* 51b - */ 0, -/* 51c - */ 0, -/* 51d - */ 0, -/* 51e - */ 0, -/* 51f - */ 0, -/* 520 - */ 0, -/* 521 - */ 0, -/* 522 - */ 0, -/* 523 - */ 0, -/* 524 - */ 0, -/* 525 - */ 0, -/* 526 - */ 0, -/* 527 - */ 0, -/* 528 - */ 0, -/* 529 - */ 0, -/* 52a - */ 0, -/* 52b - */ 0, -/* 52c - _0F_0F_0C */ 0x2357, -/* 52d - _0F_0F_0D */ 0x2358, -/* 52e - */ 0, -/* 52f - */ 0, -/* 530 - */ 0, -/* 531 - */ 0, -/* 532 - */ 0, -/* 533 - */ 0, -/* 534 - */ 0, -/* 535 - */ 0, -/* 536 - */ 0, -/* 537 - */ 0, -/* 538 - */ 0, -/* 539 - */ 0, -/* 53a - */ 0, -/* 53b - */ 0, -/* 53c - _0F_0F_1C */ 0x2359, -/* 53d - _0F_0F_1D */ 0x235a, -/* 53e - */ 0, -/* 53f - */ 0, -/* 540 - */ 0, -/* 541 - */ 0, -/* 542 - */ 0, -/* 543 - */ 0, -/* 544 - */ 0, -/* 545 - */ 0, -/* 546 - */ 0, -/* 547 - */ 0, -/* 548 - */ 0, -/* 549 - */ 0, -/* 54a - */ 0, -/* 54b - */ 0, -/* 54c - */ 0, -/* 54d - */ 0, -/* 54e - */ 0, -/* 54f - */ 0, -/* 550 - */ 0, -/* 551 - */ 0, -/* 552 - */ 0, -/* 553 - */ 0, -/* 554 - */ 0, -/* 555 - */ 0, -/* 556 - */ 0, -/* 557 - */ 0, -/* 558 - */ 0, -/* 559 - */ 0, -/* 55a - */ 0, -/* 55b - */ 0, -/* 55c - */ 0, -/* 55d - */ 0, -/* 55e - */ 0, -/* 55f - */ 0, -/* 560 - */ 0, -/* 561 - */ 0, -/* 562 - */ 0, -/* 563 - */ 0, -/* 564 - */ 0, -/* 565 - */ 0, -/* 566 - */ 0, -/* 567 - */ 0, -/* 568 - */ 0, -/* 569 - */ 0, -/* 56a - */ 0, -/* 56b - */ 0, -/* 56c - */ 0, -/* 56d - */ 0, -/* 56e - */ 0, -/* 56f - */ 0, -/* 570 - */ 0, -/* 571 - */ 0, -/* 572 - */ 0, -/* 573 - */ 0, -/* 574 - */ 0, -/* 575 - */ 0, -/* 576 - */ 0, -/* 577 - */ 0, -/* 578 - */ 0, -/* 579 - */ 0, -/* 57a - */ 0, -/* 57b - */ 0, -/* 57c - */ 0, -/* 57d - */ 0, -/* 57e - */ 0, -/* 57f - */ 0, -/* 580 - */ 0, -/* 581 - */ 0, -/* 582 - */ 0, -/* 583 - */ 0, -/* 584 - */ 0, -/* 585 - */ 0, -/* 586 - */ 0, -/* 587 - */ 0, -/* 588 - */ 0, -/* 589 - */ 0, -/* 58a - */ 0, -/* 58b - */ 0, -/* 58c - */ 0, -/* 58d - */ 0, -/* 58e - */ 0, -/* 58f - */ 0, -/* 590 - */ 0, -/* 591 - */ 0, -/* 592 - */ 0, -/* 593 - */ 0, -/* 594 - */ 0, -/* 595 - */ 0, -/* 596 - */ 0, -/* 597 - */ 0, -/* 598 - */ 0, -/* 599 - */ 0, -/* 59a - */ 0, -/* 59b - */ 0, -/* 59c - */ 0, -/* 59d - */ 0, -/* 59e - */ 0, -/* 59f - */ 0, -/* 5a0 - */ 0, -/* 5a1 - */ 0, -/* 5a2 - */ 0, -/* 5a3 - */ 0, -/* 5a4 - */ 0, -/* 5a5 - */ 0, -/* 5a6 - */ 0, -/* 5a7 - */ 0, -/* 5a8 - */ 0, -/* 5a9 - */ 0, -/* 5aa - _0F_0F_8A */ 0x235b, -/* 5ab - */ 0, -/* 5ac - */ 0, -/* 5ad - */ 0, -/* 5ae - _0F_0F_8E */ 0x235c, -/* 5af - */ 0, -/* 5b0 - _0F_0F_90 */ 0x235d, -/* 5b1 - */ 0, -/* 5b2 - */ 0, -/* 5b3 - */ 0, -/* 5b4 - _0F_0F_94 */ 0x235e, -/* 5b5 - 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0x2370, -/* 622 - _F3_0F_10 */ 0x2371, -/* 623 - _F2_0F_10 */ 0x2372, -/* 624 - _V_0F_10 */ 0x4009, -/* 625 - _V_66_0F_10 */ 0x400a, -/* 626 - _V_F3_0F_10 */ 0x400b, -/* 627 - _V_F2_0F_10 */ 0x400c, -/* 628 - */ 0, -/* 629 - */ 0, -/* 62a - _VRR_F3_0F_10 */ 0x400d, -/* 62b - _VRR_F2_0F_10 */ 0x400e, -/* 62c - _0F_11 */ 0x2373, -/* 62d - _66_0F_11 */ 0x2374, -/* 62e - _F3_0F_11 */ 0x2375, -/* 62f - _F2_0F_11 */ 0x2376, -/* 630 - _V_0F_11 */ 0x400f, -/* 631 - _V_66_0F_11 */ 0x4010, -/* 632 - _V_F3_0F_11 */ 0x4011, -/* 633 - _V_F2_0F_11 */ 0x4012, -/* 634 - */ 0, -/* 635 - */ 0, -/* 636 - _VRR_F3_0F_11 */ 0x4013, -/* 637 - _VRR_F2_0F_11 */ 0x4014, -/* 638 - _0F_12 */ 0x4015, -/* 639 - _66_0F_12 */ 0x2377, -/* 63a - _F3_0F_12 */ 0x2378, -/* 63b - _F2_0F_12 */ 0x2379, -/* 63c - _V_0F_12 */ 0x4016, -/* 63d - _V_66_0F_12 */ 0x4017, -/* 63e - _V_F3_0F_12 */ 0x4018, -/* 63f - _V_F2_0F_12 */ 0x4019, -/* 640 - */ 0, -/* 641 - */ 0, -/* 642 - */ 0, -/* 643 - */ 0, -/* 644 - _0F_13 */ 0x237a, -/* 645 - _66_0F_13 */ 0x237b, -/* 646 - */ 0, -/* 647 - */ 0, -/* 648 - _V_0F_13 */ 0x401a, -/* 649 - _V_66_0F_13 */ 0x401b, -/* 64a - */ 0, -/* 64b - */ 0, -/* 64c - */ 0, -/* 64d - */ 0, -/* 64e - */ 0, -/* 64f - */ 0, -/* 650 - _0F_14 */ 0x237c, -/* 651 - _66_0F_14 */ 0x237d, -/* 652 - */ 0, -/* 653 - */ 0, -/* 654 - _V_0F_14 */ 0x401c, -/* 655 - _V_66_0F_14 */ 0x401d, -/* 656 - */ 0, -/* 657 - */ 0, -/* 658 - */ 0, -/* 659 - */ 0, -/* 65a - */ 0, -/* 65b - */ 0, -/* 65c - _0F_15 */ 0x237e, -/* 65d - _66_0F_15 */ 0x237f, -/* 65e - */ 0, -/* 65f - */ 0, -/* 660 - _V_0F_15 */ 0x401e, -/* 661 - _V_66_0F_15 */ 0x401f, -/* 662 - */ 0, -/* 663 - */ 0, -/* 664 - */ 0, -/* 665 - */ 0, -/* 666 - */ 0, -/* 667 - */ 0, -/* 668 - _0F_16 */ 0x4020, -/* 669 - _66_0F_16 */ 0x2380, -/* 66a - _F3_0F_16 */ 0x2381, -/* 66b - */ 0, -/* 66c - _V_0F_16 */ 0x4021, -/* 66d - _V_66_0F_16 */ 0x4022, -/* 66e - _V_F3_0F_16 */ 0x4023, -/* 66f - */ 0, -/* 670 - */ 0, -/* 671 - */ 0, -/* 672 - */ 0, -/* 673 - */ 0, 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0x4031, -/* 6cc - */ 0, -/* 6cd - */ 0, -/* 6ce - */ 0, -/* 6cf - */ 0, -/* 6d0 - _0F_2E */ 0x239c, -/* 6d1 - _66_0F_2E */ 0x239d, -/* 6d2 - */ 0, -/* 6d3 - */ 0, -/* 6d4 - _V_0F_2E */ 0x4032, -/* 6d5 - _V_66_0F_2E */ 0x4033, -/* 6d6 - */ 0, -/* 6d7 - */ 0, -/* 6d8 - */ 0, -/* 6d9 - */ 0, -/* 6da - */ 0, -/* 6db - */ 0, -/* 6dc - _0F_2F */ 0x239e, -/* 6dd - _66_0F_2F */ 0x239f, -/* 6de - */ 0, -/* 6df - */ 0, -/* 6e0 - _V_0F_2F */ 0x4034, -/* 6e1 - _V_66_0F_2F */ 0x4035, -/* 6e2 - */ 0, -/* 6e3 - */ 0, -/* 6e4 - */ 0, -/* 6e5 - */ 0, -/* 6e6 - */ 0, -/* 6e7 - */ 0, -/* 6e8 - _0F_38_00 */ 0xcef8, -/* 6e9 - _0F_38_01 */ 0xcf04, -/* 6ea - _0F_38_02 */ 0xcf10, -/* 6eb - _0F_38_03 */ 0xcf1c, -/* 6ec - _0F_38_04 */ 0xcf28, -/* 6ed - _0F_38_05 */ 0xcf34, -/* 6ee - _0F_38_06 */ 0xcf40, -/* 6ef - _0F_38_07 */ 0xcf4c, -/* 6f0 - _0F_38_08 */ 0xcf58, -/* 6f1 - _0F_38_09 */ 0xcf64, -/* 6f2 - _0F_38_0A */ 0xcf70, -/* 6f3 - _0F_38_0B */ 0xcf7c, -/* 6f4 - _0F_38_0C */ 0xcf88, -/* 6f5 - _0F_38_0D */ 0xcf94, -/* 6f6 - _0F_38_0E */ 0xcfa0, -/* 6f7 - _0F_38_0F */ 0xcfac, -/* 6f8 - _0F_38_10 */ 0xcfb8, -/* 6f9 - */ 0, -/* 6fa - */ 0, -/* 6fb - */ 0, -/* 6fc - _0F_38_14 */ 0xcfc4, -/* 6fd - _0F_38_15 */ 0xcfd0, -/* 6fe - */ 0, -/* 6ff - _0F_38_17 */ 0xcfdc, -/* 700 - _0F_38_18 */ 0xcfe8, -/* 701 - _0F_38_19 */ 0xcff4, -/* 702 - _0F_38_1A */ 0xd000, -/* 703 - */ 0, -/* 704 - _0F_38_1C */ 0xd00c, -/* 705 - _0F_38_1D */ 0xd018, -/* 706 - _0F_38_1E */ 0xd024, -/* 707 - */ 0, -/* 708 - _0F_38_20 */ 0xd030, -/* 709 - _0F_38_21 */ 0xd03c, -/* 70a - _0F_38_22 */ 0xd048, -/* 70b - _0F_38_23 */ 0xd054, -/* 70c - _0F_38_24 */ 0xd060, -/* 70d - _0F_38_25 */ 0xd06c, -/* 70e - */ 0, -/* 70f - */ 0, -/* 710 - _0F_38_28 */ 0xd078, -/* 711 - _0F_38_29 */ 0xd084, -/* 712 - _0F_38_2A */ 0xd090, -/* 713 - _0F_38_2B */ 0xd09c, -/* 714 - _0F_38_2C */ 0xd0a8, -/* 715 - _0F_38_2D */ 0xd0b4, -/* 716 - _0F_38_2E */ 0xd0c0, -/* 717 - _0F_38_2F */ 0xd0cc, -/* 718 - _0F_38_30 */ 0xd0d8, -/* 719 - _0F_38_31 */ 0xd0e4, -/* 71a - _0F_38_32 */ 0xd0f0, -/* 71b - _0F_38_33 */ 0xd0fc, -/* 71c - _0F_38_34 */ 0xd108, -/* 71d - _0F_38_35 */ 0xd114, -/* 71e - */ 0, -/* 71f - _0F_38_37 */ 0xd120, -/* 720 - _0F_38_38 */ 0xd12c, -/* 721 - _0F_38_39 */ 0xd138, -/* 722 - _0F_38_3A */ 0xd144, -/* 723 - _0F_38_3B */ 0xd150, -/* 724 - _0F_38_3C */ 0xd15c, -/* 725 - _0F_38_3D */ 0xd168, -/* 726 - _0F_38_3E */ 0xd174, -/* 727 - _0F_38_3F */ 0xd180, -/* 728 - _0F_38_40 */ 0xd18c, -/* 729 - _0F_38_41 */ 0xd198, -/* 72a - */ 0, -/* 72b - */ 0, -/* 72c - */ 0, -/* 72d - */ 0, -/* 72e - */ 0, -/* 72f - */ 0, -/* 730 - */ 0, -/* 731 - */ 0, -/* 732 - */ 0, -/* 733 - */ 0, -/* 734 - */ 0, -/* 735 - */ 0, -/* 736 - */ 0, -/* 737 - */ 0, -/* 738 - */ 0, -/* 739 - */ 0, -/* 73a - */ 0, -/* 73b - */ 0, -/* 73c - */ 0, -/* 73d - */ 0, -/* 73e - */ 0, -/* 73f - */ 0, -/* 740 - */ 0, -/* 741 - */ 0, -/* 742 - */ 0, -/* 743 - */ 0, -/* 744 - */ 0, -/* 745 - */ 0, -/* 746 - */ 0, -/* 747 - */ 0, -/* 748 - */ 0, -/* 749 - */ 0, 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-/* 782 - _0F_38_9A */ 0xd1f8, -/* 783 - _0F_38_9B */ 0xd204, -/* 784 - _0F_38_9C */ 0xd210, -/* 785 - _0F_38_9D */ 0xd21c, -/* 786 - _0F_38_9E */ 0xd228, -/* 787 - _0F_38_9F */ 0xd234, -/* 788 - */ 0, -/* 789 - */ 0, -/* 78a - */ 0, -/* 78b - */ 0, -/* 78c - */ 0, -/* 78d - */ 0, -/* 78e - _0F_38_A6 */ 0xd240, -/* 78f - _0F_38_A7 */ 0xd24c, -/* 790 - _0F_38_A8 */ 0xd258, -/* 791 - _0F_38_A9 */ 0xd264, -/* 792 - _0F_38_AA */ 0xd270, -/* 793 - _0F_38_AB */ 0xd27c, -/* 794 - _0F_38_AC */ 0xd288, -/* 795 - _0F_38_AD */ 0xd294, -/* 796 - _0F_38_AE */ 0xd2a0, -/* 797 - _0F_38_AF */ 0xd2ac, -/* 798 - */ 0, -/* 799 - */ 0, -/* 79a - */ 0, -/* 79b - */ 0, -/* 79c - */ 0, -/* 79d - */ 0, -/* 79e - _0F_38_B6 */ 0xd2b8, -/* 79f - _0F_38_B7 */ 0xd2c4, -/* 7a0 - _0F_38_B8 */ 0xd2d0, -/* 7a1 - _0F_38_B9 */ 0xd2dc, -/* 7a2 - _0F_38_BA */ 0xd2e8, -/* 7a3 - _0F_38_BB */ 0xd2f4, -/* 7a4 - _0F_38_BC */ 0xd300, -/* 7a5 - _0F_38_BD */ 0xd30c, -/* 7a6 - _0F_38_BE */ 0xd318, -/* 7a7 - _0F_38_BF */ 0xd324, -/* 7a8 - */ 0, -/* 7a9 - */ 0, -/* 7aa - */ 0, -/* 7ab - */ 0, -/* 7ac - */ 0, -/* 7ad - */ 0, -/* 7ae - */ 0, -/* 7af - */ 0, -/* 7b0 - */ 0, -/* 7b1 - */ 0, -/* 7b2 - */ 0, -/* 7b3 - */ 0, -/* 7b4 - */ 0, -/* 7b5 - */ 0, -/* 7b6 - */ 0, -/* 7b7 - */ 0, -/* 7b8 - */ 0, -/* 7b9 - */ 0, -/* 7ba - */ 0, -/* 7bb - */ 0, -/* 7bc - */ 0, -/* 7bd - */ 0, -/* 7be - */ 0, -/* 7bf - */ 0, -/* 7c0 - */ 0, -/* 7c1 - */ 0, -/* 7c2 - */ 0, -/* 7c3 - _0F_38_DB */ 0xd330, -/* 7c4 - _0F_38_DC */ 0xd33c, -/* 7c5 - _0F_38_DD */ 0xd348, -/* 7c6 - _0F_38_DE */ 0xd354, -/* 7c7 - _0F_38_DF */ 0xd360, -/* 7c8 - */ 0, -/* 7c9 - */ 0, -/* 7ca - */ 0, -/* 7cb - */ 0, -/* 7cc - */ 0, -/* 7cd - */ 0, -/* 7ce - */ 0, -/* 7cf - */ 0, -/* 7d0 - */ 0, -/* 7d1 - */ 0, -/* 7d2 - */ 0, -/* 7d3 - */ 0, -/* 7d4 - */ 0, -/* 7d5 - */ 0, -/* 7d6 - */ 0, -/* 7d7 - */ 0, -/* 7d8 - _0F_38_F0 */ 0xd36c, -/* 7d9 - _0F_38_F1 */ 0xd378, -/* 7da - */ 0, -/* 7db - */ 0, -/* 7dc - */ 0, -/* 7dd - */ 0, -/* 7de - */ 0, -/* 7df - */ 0, -/* 7e0 - */ 0, -/* 7e1 - */ 0, -/* 7e2 - */ 0, -/* 7e3 - */ 0, -/* 7e4 - */ 0, -/* 7e5 - */ 0, -/* 7e6 - */ 0, -/* 7e7 - */ 0, -/* 7e8 - */ 0, -/* 7e9 - */ 0, -/* 7ea - */ 0, -/* 7eb - */ 0, -/* 7ec - _0F_3A_04 */ 0xd384, -/* 7ed - _0F_3A_05 */ 0xd390, -/* 7ee - _0F_3A_06 */ 0xd39c, -/* 7ef - */ 0, -/* 7f0 - _0F_3A_08 */ 0xd3a8, -/* 7f1 - _0F_3A_09 */ 0xd3b4, -/* 7f2 - _0F_3A_0A */ 0xd3c0, -/* 7f3 - _0F_3A_0B */ 0xd3cc, -/* 7f4 - _0F_3A_0C */ 0xd3d8, -/* 7f5 - _0F_3A_0D */ 0xd3e4, -/* 7f6 - _0F_3A_0E */ 0xd3f0, -/* 7f7 - _0F_3A_0F */ 0xd3fc, -/* 7f8 - */ 0, -/* 7f9 - */ 0, -/* 7fa - */ 0, -/* 7fb - */ 0, -/* 7fc - _0F_3A_14 */ 0xd408, -/* 7fd - _0F_3A_15 */ 0xd414, -/* 7fe - _0F_3A_16 */ 0xd420, -/* 7ff - _0F_3A_17 */ 0xd42c, -/* 800 - _0F_3A_18 */ 0xd438, -/* 801 - _0F_3A_19 */ 0xd444, -/* 802 - */ 0, -/* 803 - */ 0, -/* 804 - */ 0, -/* 805 - */ 0, -/* 806 - */ 0, -/* 807 - */ 0, -/* 808 - _0F_3A_20 */ 0xd450, -/* 809 - _0F_3A_21 */ 0xd45c, -/* 80a - _0F_3A_22 */ 0xd468, -/* 80b - */ 0, -/* 80c - */ 0, -/* 80d - */ 0, -/* 80e - */ 0, -/* 80f - */ 0, -/* 810 - */ 0, -/* 811 - */ 0, -/* 812 - */ 0, -/* 813 - */ 0, -/* 814 - */ 0, -/* 815 - */ 0, -/* 816 - */ 0, -/* 817 - */ 0, -/* 818 - */ 0, -/* 819 - */ 0, -/* 81a - */ 0, -/* 81b - */ 0, -/* 81c - */ 0, -/* 81d - */ 0, -/* 81e - */ 0, -/* 81f - */ 0, -/* 820 - */ 0, -/* 821 - */ 0, -/* 822 - */ 0, -/* 823 - */ 0, -/* 824 - */ 0, -/* 825 - */ 0, -/* 826 - */ 0, -/* 827 - */ 0, -/* 828 - _0F_3A_40 */ 0xd474, -/* 829 - _0F_3A_41 */ 0xd480, -/* 82a - _0F_3A_42 */ 0xd48c, -/* 82b - */ 0, -/* 82c - _0F_3A_44 */ 0xd498, -/* 82d - */ 0, -/* 82e - */ 0, -/* 82f - */ 0, -/* 830 - */ 0, -/* 831 - */ 0, -/* 832 - _0F_3A_4A */ 0xd4a4, -/* 833 - _0F_3A_4B */ 0xd4b0, -/* 834 - _0F_3A_4C */ 0xd4bc, -/* 835 - */ 0, -/* 836 - */ 0, -/* 837 - */ 0, -/* 838 - */ 0, -/* 839 - */ 0, -/* 83a - */ 0, -/* 83b - */ 0, -/* 83c - */ 0, -/* 83d - */ 0, -/* 83e - */ 0, -/* 83f - */ 0, -/* 840 - */ 0, -/* 841 - */ 0, -/* 842 - */ 0, -/* 843 - */ 0, -/* 844 - */ 0, -/* 845 - */ 0, -/* 846 - */ 0, -/* 847 - */ 0, -/* 848 - _0F_3A_60 */ 0xd4c8, -/* 849 - _0F_3A_61 */ 0xd4d4, -/* 84a - _0F_3A_62 */ 0xd4e0, -/* 84b - _0F_3A_63 */ 0xd4ec, -/* 84c - */ 0, -/* 84d - */ 0, -/* 84e - */ 0, -/* 84f - */ 0, -/* 850 - */ 0, -/* 851 - */ 0, -/* 852 - */ 0, -/* 853 - */ 0, -/* 854 - */ 0, -/* 855 - */ 0, -/* 856 - */ 0, -/* 857 - */ 0, -/* 858 - */ 0, -/* 859 - */ 0, -/* 85a - */ 0, -/* 85b - */ 0, -/* 85c - */ 0, -/* 85d - */ 0, -/* 85e - */ 0, -/* 85f - */ 0, -/* 860 - */ 0, -/* 861 - */ 0, -/* 862 - */ 0, -/* 863 - */ 0, -/* 864 - */ 0, -/* 865 - */ 0, -/* 866 - */ 0, -/* 867 - */ 0, -/* 868 - */ 0, -/* 869 - */ 0, -/* 86a - */ 0, -/* 86b - */ 0, -/* 86c - */ 0, -/* 86d - */ 0, -/* 86e - */ 0, -/* 86f - */ 0, -/* 870 - */ 0, -/* 871 - */ 0, -/* 872 - */ 0, -/* 873 - */ 0, -/* 874 - */ 0, -/* 875 - */ 0, -/* 876 - */ 0, -/* 877 - */ 0, -/* 878 - */ 0, -/* 879 - */ 0, -/* 87a - */ 0, -/* 87b - */ 0, -/* 87c - */ 0, -/* 87d - */ 0, -/* 87e - */ 0, -/* 87f - */ 0, -/* 880 - */ 0, -/* 881 - */ 0, -/* 882 - */ 0, -/* 883 - */ 0, -/* 884 - */ 0, -/* 885 - */ 0, -/* 886 - */ 0, -/* 887 - */ 0, -/* 888 - */ 0, -/* 889 - */ 0, -/* 88a - */ 0, -/* 88b - */ 0, -/* 88c - */ 0, -/* 88d - */ 0, -/* 88e - */ 0, -/* 88f - */ 0, -/* 890 - */ 0, -/* 891 - */ 0, -/* 892 - */ 0, -/* 893 - */ 0, -/* 894 - */ 0, -/* 895 - */ 0, -/* 896 - */ 0, -/* 897 - */ 0, -/* 898 - */ 0, -/* 899 - */ 0, -/* 89a - */ 0, -/* 89b - */ 0, -/* 89c - */ 0, -/* 89d - */ 0, -/* 89e - */ 0, -/* 89f - */ 0, -/* 8a0 - */ 0, -/* 8a1 - */ 0, -/* 8a2 - */ 0, -/* 8a3 - */ 0, -/* 8a4 - */ 0, -/* 8a5 - */ 0, -/* 8a6 - */ 0, -/* 8a7 - */ 0, -/* 8a8 - */ 0, -/* 8a9 - */ 0, -/* 8aa - */ 0, -/* 8ab - */ 0, -/* 8ac - */ 0, -/* 8ad - */ 0, -/* 8ae - */ 0, -/* 8af - */ 0, -/* 8b0 - */ 0, -/* 8b1 - */ 0, -/* 8b2 - */ 0, -/* 8b3 - */ 0, -/* 8b4 - */ 0, -/* 8b5 - */ 0, -/* 8b6 - */ 0, -/* 8b7 - */ 0, -/* 8b8 - */ 0, -/* 8b9 - */ 0, -/* 8ba - */ 0, -/* 8bb - */ 0, -/* 8bc - */ 0, -/* 8bd - */ 0, -/* 8be - */ 0, -/* 8bf - */ 0, -/* 8c0 - */ 0, -/* 8c1 - */ 0, -/* 8c2 - */ 0, -/* 8c3 - */ 0, -/* 8c4 - */ 0, -/* 8c5 - */ 0, -/* 8c6 - */ 0, -/* 8c7 - _0F_3A_DF */ 0xd4f8, -/* 8c8 - */ 0, -/* 8c9 - */ 0, -/* 8ca - */ 0, -/* 8cb - */ 0, -/* 8cc - */ 0, -/* 8cd - */ 0, -/* 8ce - */ 0, -/* 8cf - */ 0, -/* 8d0 - */ 0, -/* 8d1 - */ 0, -/* 8d2 - */ 0, -/* 8d3 - */ 0, -/* 8d4 - */ 0, -/* 8d5 - */ 0, -/* 8d6 - */ 0, -/* 8d7 - */ 0, -/* 8d8 - */ 0, -/* 8d9 - */ 0, -/* 8da - */ 0, -/* 8db - */ 0, -/* 8dc - */ 0, -/* 8dd - */ 0, -/* 8de - */ 0, -/* 8df - */ 0, -/* 8e0 - */ 0, -/* 8e1 - */ 0, -/* 8e2 - */ 0, -/* 8e3 - */ 0, -/* 8e4 - */ 0, -/* 8e5 - */ 0, -/* 8e6 - */ 0, -/* 8e7 - */ 0, -/* 8e8 - _0F_50 */ 0x23a0, -/* 8e9 - _66_0F_50 */ 0x23a1, -/* 8ea - */ 0, -/* 8eb - */ 0, -/* 8ec - _V_0F_50 */ 0x4036, -/* 8ed - _V_66_0F_50 */ 0x4037, -/* 8ee - */ 0, -/* 8ef - */ 0, -/* 8f0 - */ 0, -/* 8f1 - */ 0, -/* 8f2 - */ 0, -/* 8f3 - */ 0, -/* 8f4 - _0F_51 */ 0x23a2, -/* 8f5 - _66_0F_51 */ 0x23a3, -/* 8f6 - _F3_0F_51 */ 0x23a4, -/* 8f7 - _F2_0F_51 */ 0x23a5, -/* 8f8 - _V_0F_51 */ 0x4038, -/* 8f9 - _V_66_0F_51 */ 0x4039, -/* 8fa - _V_F3_0F_51 */ 0x403a, -/* 8fb - _V_F2_0F_51 */ 0x403b, -/* 8fc - */ 0, -/* 8fd - */ 0, -/* 8fe - */ 0, -/* 8ff - */ 0, -/* 900 - _0F_52 */ 0x23a6, -/* 901 - */ 0, -/* 902 - _F3_0F_52 */ 0x23a7, -/* 903 - */ 0, -/* 904 - _V_0F_52 */ 0x403c, -/* 905 - */ 0, -/* 906 - _V_F3_0F_52 */ 0x403d, -/* 907 - */ 0, -/* 908 - */ 0, -/* 909 - */ 0, -/* 90a - */ 0, -/* 90b - */ 0, -/* 90c - _0F_53 */ 0x23a8, -/* 90d - */ 0, -/* 90e - _F3_0F_53 */ 0x23a9, -/* 90f - */ 0, -/* 910 - _V_0F_53 */ 0x403e, -/* 911 - */ 0, -/* 912 - _V_F3_0F_53 */ 0x403f, -/* 913 - */ 0, -/* 914 - */ 0, -/* 915 - */ 0, -/* 916 - */ 0, -/* 917 - */ 0, -/* 918 - _0F_54 */ 0x23aa, -/* 919 - _66_0F_54 */ 0x23ab, -/* 91a - */ 0, -/* 91b - */ 0, -/* 91c - _V_0F_54 */ 0x4040, -/* 91d - _V_66_0F_54 */ 0x4041, -/* 91e - */ 0, -/* 91f - */ 0, -/* 920 - */ 0, -/* 921 - */ 0, -/* 922 - */ 0, -/* 923 - */ 0, -/* 924 - _0F_55 */ 0x23ac, -/* 925 - _66_0F_55 */ 0x23ad, -/* 926 - */ 0, -/* 927 - */ 0, -/* 928 - _V_0F_55 */ 0x4042, -/* 929 - _V_66_0F_55 */ 0x4043, -/* 92a - */ 0, -/* 92b - */ 0, -/* 92c - */ 0, -/* 92d - */ 0, -/* 92e - */ 0, -/* 92f - */ 0, -/* 930 - _0F_56 */ 0x23ae, -/* 931 - _66_0F_56 */ 0x23af, -/* 932 - */ 0, -/* 933 - */ 0, -/* 934 - _V_0F_56 */ 0x4044, -/* 935 - _V_66_0F_56 */ 0x4045, -/* 936 - */ 0, -/* 937 - */ 0, -/* 938 - */ 0, -/* 939 - */ 0, -/* 93a - */ 0, -/* 93b - */ 0, -/* 93c - _0F_57 */ 0x23b0, -/* 93d - _66_0F_57 */ 0x23b1, -/* 93e - */ 0, -/* 93f - */ 0, -/* 940 - _V_0F_57 */ 0x4046, -/* 941 - _V_66_0F_57 */ 0x4047, -/* 942 - */ 0, -/* 943 - */ 0, -/* 944 - */ 0, -/* 945 - */ 0, -/* 946 - */ 0, -/* 947 - */ 0, -/* 948 - _0F_58 */ 0x23b2, -/* 949 - _66_0F_58 */ 0x23b3, -/* 94a - _F3_0F_58 */ 0x23b4, -/* 94b - _F2_0F_58 */ 0x23b5, -/* 94c - _V_0F_58 */ 0x4048, -/* 94d - _V_66_0F_58 */ 0x4049, -/* 94e - _V_F3_0F_58 */ 0x404a, -/* 94f - _V_F2_0F_58 */ 0x404b, -/* 950 - */ 0, -/* 951 - */ 0, -/* 952 - */ 0, -/* 953 - */ 0, -/* 954 - _0F_59 */ 0x23b6, -/* 955 - _66_0F_59 */ 0x23b7, -/* 956 - _F3_0F_59 */ 0x23b8, -/* 957 - _F2_0F_59 */ 0x23b9, -/* 958 - _V_0F_59 */ 0x404c, -/* 959 - _V_66_0F_59 */ 0x404d, -/* 95a - _V_F3_0F_59 */ 0x404e, -/* 95b - _V_F2_0F_59 */ 0x404f, -/* 95c - */ 0, -/* 95d - */ 0, -/* 95e - */ 0, -/* 95f - */ 0, -/* 960 - _0F_5A */ 0x23ba, -/* 961 - _66_0F_5A */ 0x23bb, -/* 962 - _F3_0F_5A */ 0x23bc, -/* 963 - _F2_0F_5A */ 0x23bd, -/* 964 - _V_0F_5A */ 0x4050, -/* 965 - _V_66_0F_5A */ 0x4051, -/* 966 - _V_F3_0F_5A */ 0x4052, -/* 967 - _V_F2_0F_5A */ 0x4053, -/* 968 - */ 0, -/* 969 - */ 0, -/* 96a - */ 0, -/* 96b - */ 0, -/* 96c - _0F_5B */ 0x23be, -/* 96d - _66_0F_5B */ 0x23bf, -/* 96e - _F3_0F_5B */ 0x23c0, -/* 96f - */ 0, -/* 970 - _V_0F_5B */ 0x4054, -/* 971 - _V_66_0F_5B */ 0x4055, -/* 972 - _V_F3_0F_5B */ 0x4056, -/* 973 - */ 0, -/* 974 - */ 0, -/* 975 - */ 0, -/* 976 - */ 0, -/* 977 - */ 0, -/* 978 - _0F_5C */ 0x23c1, -/* 979 - _66_0F_5C */ 0x23c2, -/* 97a - _F3_0F_5C */ 0x23c3, -/* 97b - _F2_0F_5C */ 0x23c4, -/* 97c - _V_0F_5C */ 0x4057, -/* 97d - _V_66_0F_5C */ 0x4058, -/* 97e - _V_F3_0F_5C */ 0x4059, -/* 97f - _V_F2_0F_5C */ 0x405a, -/* 980 - */ 0, -/* 981 - */ 0, -/* 982 - */ 0, -/* 983 - */ 0, -/* 984 - _0F_5D */ 0x23c5, -/* 985 - _66_0F_5D */ 0x23c6, -/* 986 - _F3_0F_5D */ 0x23c7, -/* 987 - _F2_0F_5D */ 0x23c8, -/* 988 - _V_0F_5D */ 0x405b, -/* 989 - _V_66_0F_5D */ 0x405c, -/* 98a - _V_F3_0F_5D */ 0x405d, -/* 98b - _V_F2_0F_5D */ 0x405e, -/* 98c - */ 0, -/* 98d - */ 0, -/* 98e - */ 0, -/* 98f - */ 0, -/* 990 - _0F_5E */ 0x23c9, -/* 991 - _66_0F_5E */ 0x23ca, -/* 992 - _F3_0F_5E */ 0x23cb, -/* 993 - _F2_0F_5E */ 0x23cc, -/* 994 - _V_0F_5E */ 0x405f, -/* 995 - _V_66_0F_5E */ 0x4060, -/* 996 - _V_F3_0F_5E */ 0x4061, -/* 997 - _V_F2_0F_5E */ 0x4062, -/* 998 - */ 0, -/* 999 - */ 0, -/* 99a - */ 0, -/* 99b - */ 0, -/* 99c - _0F_5F */ 0x23cd, -/* 99d - _66_0F_5F */ 0x23ce, -/* 99e - _F3_0F_5F */ 0x23cf, -/* 99f - _F2_0F_5F */ 0x23d0, -/* 9a0 - _V_0F_5F */ 0x4063, -/* 9a1 - _V_66_0F_5F */ 0x4064, -/* 9a2 - _V_F3_0F_5F */ 0x4065, -/* 9a3 - _V_F2_0F_5F */ 0x4066, -/* 9a4 - */ 0, -/* 9a5 - */ 0, -/* 9a6 - */ 0, -/* 9a7 - */ 0, -/* 9a8 - _0F_60 */ 0x23d1, -/* 9a9 - _66_0F_60 */ 0x23d2, -/* 9aa - */ 0, -/* 9ab - */ 0, -/* 9ac - */ 0, -/* 9ad - _V_66_0F_60 */ 0x4067, -/* 9ae - */ 0, -/* 9af - */ 0, -/* 9b0 - */ 0, -/* 9b1 - */ 0, -/* 9b2 - */ 0, -/* 9b3 - */ 0, -/* 9b4 - _0F_61 */ 0x23d3, -/* 9b5 - _66_0F_61 */ 0x23d4, -/* 9b6 - */ 0, -/* 9b7 - */ 0, -/* 9b8 - */ 0, -/* 9b9 - _V_66_0F_61 */ 0x4068, -/* 9ba - */ 0, -/* 9bb - */ 0, -/* 9bc - */ 0, -/* 9bd - */ 0, -/* 9be - */ 0, -/* 9bf - */ 0, -/* 9c0 - _0F_62 */ 0x23d5, -/* 9c1 - _66_0F_62 */ 0x23d6, -/* 9c2 - */ 0, -/* 9c3 - */ 0, -/* 9c4 - */ 0, -/* 9c5 - _V_66_0F_62 */ 0x4069, -/* 9c6 - */ 0, -/* 9c7 - */ 0, -/* 9c8 - */ 0, -/* 9c9 - */ 0, -/* 9ca - */ 0, -/* 9cb - */ 0, -/* 9cc - _0F_63 */ 0x23d7, -/* 9cd - _66_0F_63 */ 0x23d8, -/* 9ce - */ 0, -/* 9cf - */ 0, -/* 9d0 - */ 0, -/* 9d1 - _V_66_0F_63 */ 0x406a, -/* 9d2 - */ 0, -/* 9d3 - */ 0, -/* 9d4 - */ 0, -/* 9d5 - */ 0, -/* 9d6 - */ 0, -/* 9d7 - */ 0, -/* 9d8 - _0F_64 */ 0x23d9, -/* 9d9 - _66_0F_64 */ 0x23da, -/* 9da - */ 0, -/* 9db - */ 0, -/* 9dc - */ 0, -/* 9dd - _V_66_0F_64 */ 0x406b, -/* 9de - */ 0, -/* 9df - */ 0, -/* 9e0 - */ 0, -/* 9e1 - */ 0, -/* 9e2 - */ 0, -/* 9e3 - */ 0, -/* 9e4 - _0F_65 */ 0x23db, -/* 9e5 - _66_0F_65 */ 0x23dc, -/* 9e6 - */ 0, -/* 9e7 - */ 0, -/* 9e8 - */ 0, -/* 9e9 - _V_66_0F_65 */ 0x406c, -/* 9ea - */ 0, -/* 9eb - */ 0, -/* 9ec - */ 0, -/* 9ed - */ 0, -/* 9ee - */ 0, -/* 9ef - */ 0, -/* 9f0 - _0F_66 */ 0x23dd, -/* 9f1 - _66_0F_66 */ 0x23de, -/* 9f2 - */ 0, -/* 9f3 - */ 0, -/* 9f4 - */ 0, -/* 9f5 - _V_66_0F_66 */ 0x406d, -/* 9f6 - */ 0, -/* 9f7 - */ 0, -/* 9f8 - */ 0, -/* 9f9 - */ 0, -/* 9fa - */ 0, -/* 9fb - */ 0, -/* 9fc - _0F_67 */ 0x23df, -/* 9fd - _66_0F_67 */ 0x23e0, -/* 9fe - */ 0, -/* 9ff - */ 0, -/* a00 - */ 0, -/* a01 - _V_66_0F_67 */ 0x406e, -/* a02 - */ 0, -/* a03 - */ 0, -/* a04 - */ 0, -/* a05 - */ 0, -/* a06 - */ 0, -/* a07 - */ 0, -/* a08 - _0F_68 */ 0x23e1, -/* a09 - _66_0F_68 */ 0x23e2, -/* a0a - */ 0, -/* a0b - */ 0, -/* a0c - */ 0, -/* a0d - _V_66_0F_68 */ 0x406f, -/* a0e - */ 0, -/* a0f - */ 0, -/* a10 - */ 0, -/* a11 - */ 0, -/* a12 - */ 0, -/* a13 - */ 0, -/* a14 - _0F_69 */ 0x23e3, -/* a15 - _66_0F_69 */ 0x23e4, -/* a16 - */ 0, -/* a17 - */ 0, -/* a18 - */ 0, -/* a19 - _V_66_0F_69 */ 0x4070, -/* a1a - */ 0, -/* a1b - */ 0, -/* a1c - */ 0, -/* a1d - */ 0, -/* a1e - */ 0, -/* a1f - */ 0, -/* a20 - _0F_6A */ 0x23e5, -/* a21 - _66_0F_6A */ 0x23e6, -/* a22 - */ 0, -/* a23 - */ 0, -/* a24 - */ 0, -/* a25 - _V_66_0F_6A */ 0x4071, -/* a26 - */ 0, -/* a27 - */ 0, -/* a28 - */ 0, -/* a29 - */ 0, -/* a2a - */ 0, -/* a2b - */ 0, -/* a2c - _0F_6B */ 0x23e7, -/* a2d - _66_0F_6B */ 0x23e8, -/* a2e - */ 0, -/* a2f - */ 0, -/* a30 - */ 0, -/* a31 - _V_66_0F_6B */ 0x4072, -/* a32 - */ 0, -/* a33 - */ 0, -/* a34 - */ 0, -/* a35 - */ 0, -/* a36 - */ 0, -/* a37 - */ 0, -/* a38 - */ 0, -/* a39 - _66_0F_6C */ 0x23e9, -/* a3a - */ 0, -/* a3b - */ 0, -/* a3c - */ 0, -/* a3d - _V_66_0F_6C */ 0x4073, -/* a3e - */ 0, -/* a3f - */ 0, -/* a40 - */ 0, -/* a41 - */ 0, -/* a42 - */ 0, -/* a43 - */ 0, -/* a44 - */ 0, -/* a45 - _66_0F_6D */ 0x23ea, -/* a46 - */ 0, -/* a47 - */ 0, -/* a48 - */ 0, -/* a49 - _V_66_0F_6D */ 0x4074, -/* a4a - */ 0, -/* a4b - */ 0, -/* a4c - */ 0, -/* a4d - */ 0, -/* a4e - */ 0, -/* a4f - */ 0, -/* a50 - _0F_6E */ 0x4075, -/* a51 - _66_0F_6E */ 0x4076, -/* a52 - */ 0, -/* a53 - */ 0, -/* a54 - */ 0, -/* a55 - _V_66_0F_6E */ 0x4077, -/* a56 - */ 0, -/* a57 - */ 0, -/* a58 - */ 0, -/* a59 - */ 0, -/* a5a - */ 0, -/* a5b - */ 0, -/* a5c - _0F_6F */ 0x23eb, -/* a5d - _66_0F_6F */ 0x23ec, -/* a5e - _F3_0F_6F */ 0x23ed, -/* a5f - */ 0, -/* a60 - */ 0, -/* a61 - _V_66_0F_6F */ 0x4078, -/* a62 - _V_F3_0F_6F */ 0x4079, -/* a63 - */ 0, -/* a64 - */ 0, -/* a65 - */ 0, -/* a66 - */ 0, -/* a67 - */ 0, -/* a68 - _0F_70 */ 0x407a, -/* a69 - _66_0F_70 */ 0x407b, -/* a6a - _F3_0F_70 */ 0x407c, -/* a6b - _F2_0F_70 */ 0x407d, -/* a6c - */ 0, -/* a6d - _V_66_0F_70 */ 0x407e, -/* a6e - _V_F3_0F_70 */ 0x407f, -/* a6f - _V_F2_0F_70 */ 0x4080, -/* a70 - */ 0, -/* a71 - */ 0, -/* a72 - */ 0, -/* a73 - */ 0, -/* a74 - */ 0, -/* a75 - */ 0, -/* a76 - _0F_71_02 */ 0xd504, -/* a77 - */ 0, -/* a78 - _0F_71_04 */ 0xd510, -/* a79 - */ 0, -/* a7a - _0F_71_06 */ 0xd51c, -/* a7b - */ 0, -/* a7c - */ 0, -/* a7d - */ 0, -/* a7e - _0F_72_02 */ 0xd528, -/* a7f - */ 0, -/* a80 - _0F_72_04 */ 0xd534, -/* a81 - */ 0, -/* a82 - _0F_72_06 */ 0xd540, -/* a83 - */ 0, -/* a84 - */ 0, -/* a85 - */ 0, -/* a86 - _0F_73_02 */ 0xd54c, -/* a87 - _0F_73_03 */ 0xd558, -/* a88 - */ 0, -/* a89 - */ 0, -/* a8a - _0F_73_06 */ 0xd564, -/* a8b - _0F_73_07 */ 0xd570, -/* a8c - _0F_74 */ 0x23ee, -/* a8d - _66_0F_74 */ 0x23ef, -/* a8e - */ 0, -/* a8f - */ 0, -/* a90 - */ 0, -/* a91 - _V_66_0F_74 */ 0x4081, -/* a92 - */ 0, -/* a93 - */ 0, -/* a94 - */ 0, -/* a95 - */ 0, -/* a96 - */ 0, -/* a97 - */ 0, -/* a98 - _0F_75 */ 0x23f0, -/* a99 - _66_0F_75 */ 0x23f1, -/* a9a - */ 0, -/* a9b - */ 0, -/* a9c - */ 0, -/* a9d - _V_66_0F_75 */ 0x4082, -/* a9e - */ 0, -/* a9f - */ 0, -/* aa0 - */ 0, -/* aa1 - */ 0, -/* aa2 - */ 0, -/* aa3 - */ 0, -/* aa4 - _0F_76 */ 0x23f2, -/* aa5 - _66_0F_76 */ 0x23f3, -/* aa6 - */ 0, -/* aa7 - */ 0, -/* aa8 - */ 0, -/* aa9 - _V_66_0F_76 */ 0x4083, -/* aaa - */ 0, -/* aab - */ 0, -/* aac - */ 0, -/* aad - */ 0, -/* aae - */ 0, -/* aaf - */ 0, -/* ab0 - _0F_77 */ 0x23f4, -/* ab1 - */ 0, -/* ab2 - */ 0, -/* ab3 - */ 0, -/* ab4 - _V_0F_77 */ 0x4084, -/* ab5 - */ 0, -/* ab6 - */ 0, -/* ab7 - */ 0, -/* ab8 - */ 0, -/* ab9 - */ 0, -/* aba - */ 0, -/* abb - */ 0, -/* abc - _0F_78 */ 0x23f5, -/* abd - _66_0F_78 */ 0x4085, -/* abe - */ 0, -/* abf - _F2_0F_78 */ 0x4086, -/* ac0 - */ 0, -/* ac1 - */ 0, -/* ac2 - */ 0, -/* ac3 - */ 0, -/* ac4 - */ 0, -/* ac5 - */ 0, -/* ac6 - */ 0, -/* ac7 - */ 0, -/* ac8 - _0F_79 */ 0x23f6, -/* ac9 - _66_0F_79 */ 0x23f7, -/* aca - */ 0, -/* acb - _F2_0F_79 */ 0x23f8, -/* acc - */ 0, -/* acd - */ 0, -/* ace - */ 0, -/* acf - */ 0, -/* ad0 - */ 0, -/* ad1 - */ 0, -/* ad2 - */ 0, -/* ad3 - */ 0, -/* ad4 - */ 0, -/* ad5 - */ 0, -/* ad6 - */ 0, -/* ad7 - */ 0, -/* ad8 - */ 0, -/* ad9 - */ 0, -/* ada - */ 0, -/* adb - */ 0, -/* adc - */ 0, -/* add - */ 0, -/* ade - */ 0, -/* adf - */ 0, -/* ae0 - */ 0, -/* ae1 - */ 0, -/* ae2 - */ 0, -/* ae3 - */ 0, -/* ae4 - */ 0, -/* ae5 - */ 0, -/* ae6 - */ 0, -/* ae7 - */ 0, -/* ae8 - */ 0, -/* ae9 - */ 0, -/* aea - */ 0, -/* aeb - */ 0, -/* aec - */ 0, -/* aed - */ 0, -/* aee - */ 0, -/* aef - */ 0, -/* af0 - */ 0, -/* af1 - */ 0, -/* af2 - */ 0, -/* af3 - */ 0, -/* af4 - */ 0, -/* af5 - */ 0, -/* af6 - */ 0, -/* af7 - */ 0, -/* af8 - */ 0, -/* af9 - */ 0, -/* afa - */ 0, -/* afb - */ 0, -/* afc - */ 0, -/* afd - */ 0, -/* afe - */ 0, -/* aff - */ 0, -/* b00 - */ 0, -/* b01 - */ 0, -/* b02 - */ 0, -/* b03 - */ 0, -/* b04 - _0F_7A_30 */ 0x23f9, -/* b05 - _0F_7A_31 */ 0x23fa, -/* b06 - */ 0, -/* b07 - */ 0, -/* b08 - */ 0, -/* b09 - */ 0, -/* b0a - */ 0, -/* b0b - */ 0, -/* b0c - */ 0, -/* b0d - */ 0, -/* b0e - */ 0, -/* b0f - */ 0, -/* b10 - */ 0, -/* b11 - */ 0, -/* b12 - */ 0, -/* b13 - */ 0, -/* b14 - */ 0, -/* b15 - */ 0, -/* b16 - */ 0, -/* b17 - */ 0, -/* b18 - */ 0, -/* b19 - */ 0, -/* b1a - */ 0, -/* b1b - */ 0, -/* b1c - */ 0, -/* b1d - */ 0, -/* b1e - */ 0, -/* b1f - */ 0, -/* b20 - */ 0, -/* b21 - */ 0, -/* b22 - */ 0, -/* b23 - */ 0, -/* b24 - */ 0, -/* b25 - */ 0, -/* b26 - */ 0, -/* b27 - */ 0, -/* b28 - */ 0, -/* b29 - */ 0, -/* b2a - */ 0, -/* b2b - */ 0, -/* b2c - */ 0, -/* b2d - */ 0, -/* b2e - */ 0, -/* b2f - */ 0, -/* b30 - */ 0, -/* b31 - */ 0, -/* b32 - */ 0, -/* b33 - */ 0, -/* b34 - */ 0, -/* b35 - */ 0, -/* b36 - */ 0, -/* b37 - */ 0, -/* b38 - */ 0, -/* b39 - */ 0, -/* b3a - */ 0, -/* b3b - */ 0, -/* b3c - */ 0, -/* b3d - */ 0, -/* b3e - */ 0, -/* b3f - */ 0, -/* b40 - */ 0, -/* b41 - */ 0, -/* b42 - */ 0, -/* b43 - */ 0, -/* b44 - */ 0, -/* b45 - */ 0, -/* b46 - */ 0, -/* b47 - */ 0, -/* b48 - */ 0, -/* b49 - */ 0, -/* b4a - */ 0, -/* b4b - */ 0, -/* b4c - */ 0, -/* b4d - */ 0, -/* b4e - */ 0, -/* b4f - */ 0, -/* b50 - */ 0, -/* b51 - */ 0, -/* b52 - */ 0, -/* b53 - */ 0, -/* b54 - */ 0, -/* b55 - */ 0, -/* b56 - */ 0, -/* b57 - */ 0, -/* b58 - */ 0, -/* b59 - */ 0, -/* b5a - */ 0, -/* b5b - */ 0, -/* b5c - */ 0, -/* b5d - */ 0, -/* b5e - */ 0, -/* b5f - */ 0, -/* b60 - */ 0, -/* b61 - */ 0, -/* b62 - */ 0, -/* b63 - */ 0, -/* b64 - */ 0, -/* b65 - */ 0, -/* b66 - */ 0, -/* b67 - */ 0, -/* b68 - */ 0, -/* b69 - */ 0, -/* b6a - */ 0, -/* b6b - */ 0, -/* b6c - */ 0, -/* b6d - */ 0, -/* b6e - */ 0, -/* b6f - */ 0, -/* b70 - */ 0, -/* b71 - */ 0, -/* b72 - */ 0, -/* b73 - */ 0, -/* b74 - */ 0, -/* b75 - */ 0, -/* b76 - */ 0, -/* b77 - */ 0, -/* b78 - */ 0, -/* b79 - */ 0, -/* b7a - */ 0, -/* b7b - */ 0, -/* b7c - */ 0, -/* b7d - */ 0, -/* b7e - */ 0, -/* b7f - */ 0, -/* b80 - */ 0, -/* b81 - */ 0, -/* b82 - */ 0, -/* b83 - */ 0, -/* b84 - */ 0, -/* b85 - */ 0, -/* b86 - */ 0, -/* b87 - */ 0, -/* b88 - */ 0, -/* b89 - */ 0, -/* b8a - */ 0, -/* b8b - */ 0, -/* b8c - */ 0, -/* b8d - */ 0, -/* b8e - */ 0, -/* b8f - */ 0, -/* b90 - */ 0, -/* b91 - */ 0, -/* b92 - */ 0, -/* b93 - */ 0, -/* b94 - */ 0, -/* b95 - */ 0, -/* b96 - */ 0, -/* b97 - */ 0, -/* b98 - */ 0, -/* b99 - */ 0, -/* b9a - */ 0, -/* b9b - */ 0, -/* b9c - */ 0, -/* b9d - */ 0, -/* b9e - */ 0, -/* b9f - */ 0, -/* ba0 - */ 0, -/* ba1 - */ 0, -/* ba2 - */ 0, -/* ba3 - */ 0, -/* ba4 - */ 0, -/* ba5 - */ 0, -/* ba6 - */ 0, -/* ba7 - */ 0, -/* ba8 - */ 0, -/* ba9 - */ 0, -/* baa - */ 0, -/* bab - */ 0, -/* bac - */ 0, -/* bad - */ 0, -/* bae - */ 0, -/* baf - */ 0, -/* bb0 - */ 0, -/* bb1 - */ 0, -/* bb2 - */ 0, -/* bb3 - */ 0, -/* bb4 - */ 0, -/* bb5 - */ 0, -/* bb6 - */ 0, -/* bb7 - */ 0, -/* bb8 - */ 0, -/* bb9 - */ 0, -/* bba - */ 0, -/* bbb - */ 0, -/* bbc - */ 0, -/* bbd - */ 0, -/* bbe - */ 0, -/* bbf - */ 0, -/* bc0 - */ 0, -/* bc1 - */ 0, -/* bc2 - */ 0, -/* bc3 - */ 0, -/* bc4 - */ 0, -/* bc5 - */ 0, -/* bc6 - */ 0, -/* bc7 - */ 0, -/* bc8 - */ 0, -/* bc9 - */ 0, -/* bca - */ 0, -/* bcb - */ 0, -/* bcc - */ 0, -/* bcd - */ 0, -/* bce - */ 0, -/* bcf - */ 0, -/* bd0 - */ 0, -/* bd1 - */ 0, -/* bd2 - */ 0, -/* bd3 - */ 0, -/* bd4 - */ 0, -/* bd5 - _66_0F_7C */ 0x23fb, -/* bd6 - */ 0, -/* bd7 - _F2_0F_7C */ 0x23fc, -/* bd8 - */ 0, -/* bd9 - _V_66_0F_7C */ 0x4087, -/* bda - */ 0, -/* bdb - _V_F2_0F_7C */ 0x4088, -/* bdc - */ 0, -/* bdd - */ 0, -/* bde - */ 0, -/* bdf - */ 0, -/* be0 - */ 0, -/* be1 - _66_0F_7D */ 0x23fd, -/* be2 - */ 0, -/* be3 - _F2_0F_7D */ 0x23fe, -/* be4 - */ 0, -/* be5 - _V_66_0F_7D */ 0x4089, -/* be6 - */ 0, -/* be7 - _V_F2_0F_7D */ 0x408a, -/* be8 - */ 0, -/* be9 - */ 0, -/* bea - */ 0, -/* beb - */ 0, -/* bec - _0F_7E */ 0x408b, -/* bed - _66_0F_7E */ 0x408c, -/* bee - _F3_0F_7E */ 0x23ff, -/* bef - */ 0, -/* bf0 - */ 0, -/* bf1 - _V_66_0F_7E */ 0x408d, -/* bf2 - _V_F3_0F_7E */ 0x408e, -/* bf3 - */ 0, -/* bf4 - */ 0, -/* bf5 - */ 0, -/* bf6 - */ 0, -/* bf7 - */ 0, -/* bf8 - _0F_7F */ 0x2400, -/* bf9 - _66_0F_7F */ 0x2401, -/* bfa - _F3_0F_7F */ 0x2402, -/* bfb - */ 0, -/* bfc - */ 0, -/* bfd - _V_66_0F_7F */ 0x408f, -/* bfe - _V_F3_0F_7F */ 0x4090, -/* bff - */ 0, -/* c00 - */ 0, -/* c01 - */ 0, -/* c02 - */ 0, -/* c03 - */ 0, -/* c04 - _0F_AE_00 */ 0xd57c, -/* c05 - _0F_AE_01 */ 0xd588, -/* c06 - _0F_AE_02 */ 0xd594, -/* c07 - _0F_AE_03 */ 0xd5a0, -/* c08 - _0F_AE_04 */ 0x4091, -/* c09 - _0F_AE_05 */ 0x4092, -/* c0a - _0F_AE_06 */ 0x4093, -/* c0b - _0F_AE_07 */ 0x4094, -/* c0c - */ 0, -/* c0d - */ 0, -/* c0e - _F3_0F_B8 */ 0x2403, -/* c0f - */ 0, -/* c10 - */ 0, -/* c11 - */ 0, -/* c12 - */ 0, -/* c13 - */ 0, -/* c14 - */ 0, -/* c15 - */ 0, -/* c16 - */ 0, -/* c17 - */ 0, -/* c18 - */ 0, -/* c19 - */ 0, -/* c1a - */ 0, -/* c1b - */ 0, -/* c1c - _0F_BA_04 */ 0x2404, -/* c1d - _0F_BA_05 */ 0x2405, -/* c1e - _0F_BA_06 */ 0x2406, -/* c1f - _0F_BA_07 */ 0x2407, -/* c20 - _0F_BC */ 0x2408, -/* c21 - */ 0, -/* c22 - _F3_0F_BC */ 0x2409, -/* c23 - */ 0, -/* c24 - */ 0, -/* c25 - */ 0, -/* c26 - */ 0, -/* c27 - */ 0, -/* c28 - */ 0, -/* c29 - */ 0, -/* c2a - */ 0, -/* c2b - */ 0, -/* c2c - _0F_BD */ 0x240a, -/* c2d - */ 0, -/* c2e - _F3_0F_BD */ 0x240b, -/* c2f - */ 0, -/* c30 - */ 0, -/* c31 - */ 0, -/* c32 - */ 0, -/* c33 - */ 0, -/* c34 - */ 0, -/* c35 - */ 0, -/* c36 - */ 0, -/* c37 - */ 0, -/* c38 - _0F_C2 */ 0x4095, -/* c39 - _66_0F_C2 */ 0x4096, -/* c3a - _F3_0F_C2 */ 0x4097, -/* c3b - _F2_0F_C2 */ 0x4098, -/* c3c - _V_0F_C2 */ 0x4099, -/* c3d - _V_66_0F_C2 */ 0x409a, -/* c3e - _V_F3_0F_C2 */ 0x409b, -/* c3f - _V_F2_0F_C2 */ 0x409c, -/* c40 - */ 0, -/* c41 - */ 0, -/* c42 - */ 0, -/* c43 - */ 0, -/* c44 - _0F_C4 */ 0x409d, -/* c45 - _66_0F_C4 */ 0x409e, -/* c46 - */ 0, -/* c47 - */ 0, -/* c48 - */ 0, -/* c49 - _V_66_0F_C4 */ 0x409f, -/* c4a - */ 0, -/* c4b - */ 0, -/* c4c - */ 0, -/* c4d - */ 0, -/* c4e - */ 0, -/* c4f - */ 0, -/* c50 - _0F_C5 */ 0x40a0, -/* c51 - _66_0F_C5 */ 0x40a1, -/* c52 - */ 0, -/* c53 - */ 0, -/* c54 - */ 0, -/* c55 - _V_66_0F_C5 */ 0x40a2, -/* c56 - */ 0, -/* c57 - */ 0, -/* c58 - */ 0, -/* c59 - */ 0, -/* c5a - */ 0, -/* c5b - */ 0, -/* c5c - _0F_C6 */ 0x40a3, -/* c5d - _66_0F_C6 */ 0x40a4, -/* c5e - */ 0, -/* c5f - */ 0, -/* c60 - _V_0F_C6 */ 0x40a5, -/* c61 - _V_66_0F_C6 */ 0x40a6, -/* c62 - */ 0, -/* c63 - */ 0, -/* c64 - */ 0, -/* c65 - */ 0, -/* c66 - */ 0, -/* c67 - */ 0, -/* c68 - */ 0, -/* c69 - _0F_C7_01 */ 0x40a7, -/* c6a - */ 0, -/* c6b - */ 0, -/* c6c - */ 0, -/* c6d - */ 0, -/* c6e - _0F_C7_06 */ 0xd5ac, -/* c6f - _0F_C7_07 */ 0x240c, -/* c70 - */ 0, -/* c71 - _66_0F_D0 */ 0x240d, -/* c72 - */ 0, -/* c73 - _F2_0F_D0 */ 0x240e, -/* c74 - */ 0, -/* c75 - _V_66_0F_D0 */ 0x40a8, -/* c76 - */ 0, -/* c77 - _V_F2_0F_D0 */ 0x40a9, -/* c78 - */ 0, -/* c79 - */ 0, -/* c7a - */ 0, -/* c7b - */ 0, -/* c7c - _0F_D1 */ 0x240f, -/* c7d - _66_0F_D1 */ 0x2410, -/* c7e - */ 0, -/* c7f - */ 0, -/* c80 - */ 0, -/* c81 - _V_66_0F_D1 */ 0x40aa, -/* c82 - */ 0, -/* c83 - */ 0, -/* c84 - */ 0, -/* c85 - */ 0, -/* c86 - */ 0, -/* c87 - */ 0, -/* c88 - _0F_D2 */ 0x2411, -/* c89 - _66_0F_D2 */ 0x2412, -/* c8a - */ 0, -/* c8b - */ 0, -/* c8c - */ 0, -/* c8d - _V_66_0F_D2 */ 0x40ab, -/* c8e - */ 0, -/* c8f - */ 0, -/* c90 - */ 0, -/* c91 - */ 0, -/* c92 - */ 0, -/* c93 - */ 0, -/* c94 - _0F_D3 */ 0x2413, -/* c95 - _66_0F_D3 */ 0x2414, -/* c96 - */ 0, -/* c97 - */ 0, -/* c98 - */ 0, -/* c99 - _V_66_0F_D3 */ 0x40ac, -/* c9a - */ 0, -/* c9b - */ 0, -/* c9c - */ 0, -/* c9d - */ 0, -/* c9e - */ 0, -/* c9f - */ 0, -/* ca0 - _0F_D4 */ 0x2415, -/* ca1 - _66_0F_D4 */ 0x2416, -/* ca2 - */ 0, -/* ca3 - */ 0, -/* ca4 - */ 0, -/* ca5 - _V_66_0F_D4 */ 0x40ad, -/* ca6 - */ 0, -/* ca7 - */ 0, -/* ca8 - */ 0, -/* ca9 - */ 0, -/* caa - */ 0, -/* cab - */ 0, -/* cac - _0F_D5 */ 0x2417, -/* cad - _66_0F_D5 */ 0x2418, -/* cae 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0, -/* ce1 - _V_66_0F_D9 */ 0x40b2, -/* ce2 - */ 0, -/* ce3 - */ 0, -/* ce4 - */ 0, -/* ce5 - */ 0, -/* ce6 - */ 0, -/* ce7 - */ 0, -/* ce8 - _0F_DA */ 0x2422, -/* ce9 - _66_0F_DA */ 0x2423, -/* cea - */ 0, -/* ceb - */ 0, -/* cec - */ 0, -/* ced - _V_66_0F_DA */ 0x40b3, -/* cee - */ 0, -/* cef - */ 0, -/* cf0 - */ 0, -/* cf1 - */ 0, -/* cf2 - */ 0, -/* cf3 - */ 0, -/* cf4 - _0F_DB */ 0x2424, -/* cf5 - _66_0F_DB */ 0x2425, -/* cf6 - */ 0, -/* cf7 - */ 0, -/* cf8 - */ 0, -/* cf9 - _V_66_0F_DB */ 0x40b4, -/* cfa - */ 0, -/* cfb - */ 0, -/* cfc - */ 0, -/* cfd - */ 0, -/* cfe - */ 0, -/* cff - */ 0, -/* d00 - _0F_DC */ 0x2426, -/* d01 - _66_0F_DC */ 0x2427, -/* d02 - */ 0, -/* d03 - */ 0, -/* d04 - */ 0, -/* d05 - _V_66_0F_DC */ 0x40b5, -/* d06 - */ 0, -/* d07 - */ 0, -/* d08 - */ 0, -/* d09 - */ 0, -/* d0a - */ 0, -/* d0b - */ 0, -/* d0c - _0F_DD */ 0x2428, -/* d0d - _66_0F_DD */ 0x2429, -/* d0e - */ 0, -/* d0f - */ 0, -/* d10 - */ 0, -/* d11 - _V_66_0F_DD */ 0x40b6, -/* d12 - */ 0, -/* d13 - */ 0, -/* d14 - */ 0, -/* d15 - */ 0, -/* d16 - */ 0, -/* d17 - */ 0, -/* d18 - _0F_DE */ 0x242a, -/* d19 - _66_0F_DE */ 0x242b, -/* d1a - */ 0, -/* d1b - */ 0, -/* d1c - */ 0, -/* d1d - _V_66_0F_DE */ 0x40b7, -/* d1e - */ 0, -/* d1f - */ 0, -/* d20 - */ 0, -/* d21 - */ 0, -/* d22 - */ 0, -/* d23 - */ 0, -/* d24 - _0F_DF */ 0x242c, -/* d25 - _66_0F_DF */ 0x242d, -/* d26 - */ 0, -/* d27 - */ 0, -/* d28 - */ 0, -/* d29 - _V_66_0F_DF */ 0x40b8, -/* d2a - */ 0, -/* d2b - */ 0, -/* d2c - */ 0, -/* d2d - */ 0, -/* d2e - */ 0, -/* d2f - */ 0, -/* d30 - _0F_E0 */ 0x242e, -/* d31 - _66_0F_E0 */ 0x242f, -/* d32 - */ 0, -/* d33 - */ 0, -/* d34 - */ 0, -/* d35 - _V_66_0F_E0 */ 0x40b9, -/* d36 - */ 0, -/* d37 - */ 0, -/* d38 - */ 0, -/* d39 - */ 0, -/* d3a - */ 0, -/* d3b - */ 0, -/* d3c - _0F_E1 */ 0x2430, -/* d3d - _66_0F_E1 */ 0x2431, -/* d3e - */ 0, -/* d3f - */ 0, -/* d40 - */ 0, -/* d41 - _V_66_0F_E1 */ 0x40ba, -/* d42 - */ 0, -/* d43 - */ 0, -/* d44 - */ 0, -/* d45 - */ 0, -/* d46 - */ 0, -/* d47 - */ 0, -/* d48 - _0F_E2 */ 0x2432, -/* d49 - _66_0F_E2 */ 0x2433, -/* d4a - */ 0, -/* d4b - */ 0, -/* d4c - */ 0, -/* d4d - _V_66_0F_E2 */ 0x40bb, -/* d4e - */ 0, -/* d4f - */ 0, -/* d50 - */ 0, -/* d51 - */ 0, -/* d52 - */ 0, -/* d53 - */ 0, -/* d54 - _0F_E3 */ 0x2434, -/* d55 - _66_0F_E3 */ 0x2435, -/* d56 - */ 0, -/* d57 - */ 0, -/* d58 - */ 0, -/* d59 - _V_66_0F_E3 */ 0x40bc, -/* d5a - */ 0, -/* d5b - */ 0, -/* d5c - */ 0, -/* d5d - */ 0, -/* d5e - */ 0, -/* d5f - */ 0, -/* d60 - _0F_E4 */ 0x2436, -/* d61 - _66_0F_E4 */ 0x2437, -/* d62 - */ 0, -/* d63 - */ 0, -/* d64 - */ 0, -/* d65 - _V_66_0F_E4 */ 0x40bd, -/* d66 - */ 0, -/* d67 - */ 0, -/* d68 - */ 0, -/* d69 - */ 0, -/* d6a - */ 0, -/* d6b - */ 0, -/* d6c - _0F_E5 */ 0x2438, -/* d6d - _66_0F_E5 */ 0x2439, -/* d6e - */ 0, -/* d6f - */ 0, -/* d70 - */ 0, -/* d71 - _V_66_0F_E5 */ 0x40be, -/* d72 - */ 0, -/* d73 - */ 0, -/* d74 - */ 0, -/* d75 - */ 0, -/* d76 - */ 0, -/* d77 - */ 0, -/* d78 - */ 0, -/* d79 - _66_0F_E6 */ 0x243a, -/* d7a - _F3_0F_E6 */ 0x243b, -/* d7b - _F2_0F_E6 */ 0x243c, -/* d7c - */ 0, -/* d7d - _V_66_0F_E6 */ 0x40bf, -/* d7e - _V_F3_0F_E6 */ 0x40c0, -/* d7f - _V_F2_0F_E6 */ 0x40c1, -/* d80 - */ 0, -/* d81 - */ 0, -/* d82 - */ 0, -/* d83 - */ 0, -/* d84 - _0F_E7 */ 0x243d, -/* d85 - _66_0F_E7 */ 0x243e, -/* d86 - */ 0, -/* d87 - */ 0, -/* d88 - */ 0, -/* d89 - _V_66_0F_E7 */ 0x40c2, -/* d8a - */ 0, -/* d8b - */ 0, -/* d8c - */ 0, -/* d8d - */ 0, -/* d8e - */ 0, -/* d8f - */ 0, -/* d90 - _0F_E8 */ 0x243f, -/* d91 - _66_0F_E8 */ 0x2440, -/* d92 - */ 0, -/* d93 - */ 0, -/* d94 - */ 0, -/* d95 - _V_66_0F_E8 */ 0x40c3, -/* d96 - */ 0, -/* d97 - */ 0, -/* d98 - */ 0, -/* d99 - */ 0, -/* d9a - */ 0, -/* d9b - */ 0, -/* d9c - _0F_E9 */ 0x2441, -/* d9d - _66_0F_E9 */ 0x2442, -/* d9e - */ 0, -/* d9f - */ 0, -/* da0 - */ 0, -/* da1 - _V_66_0F_E9 */ 0x40c4, -/* da2 - */ 0, -/* da3 - */ 0, -/* da4 - */ 0, -/* da5 - */ 0, -/* da6 - */ 0, -/* da7 - */ 0, -/* da8 - _0F_EA */ 0x2443, -/* da9 - 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-{11, 3, 35, 8, 196, 0, 16}, -{19, 33, 56, 8, 0, 8, 0}, -{26, 35, 56, 8, 0, 8, 0}, -{19, 55, 33, 8, 0, 8, 0}, -{26, 55, 35, 8, 0, 8, 0}, -{19, 33, 56, 8, 245, 8, 0}, -{26, 35, 56, 8, 245, 8, 0}, -{1, 1, 53, 8, 0, 0, 0}, -{27, 3, 54, 8, 0, 0, 0}, -{13, 0, 2, 10, 0, 0, 0}, -{13, 0, 0, 10, 0, 0, 0}, -{16, 37, 11, 8, 0, 0, 0}, -{13, 8, 6, 8, 0, 0, 0}, -{13, 0, 0, 8, 0, 0, 0}, -{28, 0, 2, 10, 0, 0, 0}, -{28, 0, 0, 10, 0, 0, 0}, -{11, 0, 0, 14, 0, 0, 0}, -{11, 0, 1, 14, 0, 0, 0}, -{9, 0, 0, 14, 0, 0, 0}, -{28, 0, 0, 10, 255, 0, 0}, -{9, 0, 1, 8, 196, 0, 49}, -{9, 0, 0, 8, 0, 0, 0}, -{29, 0, 57, 8, 0, 0, 0}, -{30, 0, 40, 13, 0, 64, 0}, -{30, 0, 40, 13, 0, 0, 0}, -{31, 0, 40, 13, 0, 0, 0}, -{1, 1, 33, 8, 0, 0, 0}, -{1, 1, 36, 8, 0, 0, 0}, -{11, 33, 1, 8, 0, 0, 0}, -{11, 36, 1, 8, 0, 0, 0}, -{13, 0, 41, 9, 0, 0, 0}, -{13, 0, 41, 12, 0, 0, 0}, -{9, 0, 38, 12, 0, 0, 0}, -{13, 0, 40, 12, 0, 0, 0}, -{1, 59, 33, 8, 0, 0, 0}, -{1, 59, 36, 8, 0, 0, 0}, -{11, 33, 59, 8, 0, 0, 0}, -{11, 36, 59, 8, 0, 0, 0}, -{11, 0, 0, 8, 1, 0, 0}, -{11, 0, 0, 8, 2, 0, 0}, -{11, 0, 0, 8, 8, 0, 0}, -{10, 16, 11, 8, 64, 0, 0}, -{32, 0, 0, 27, 0, 0, 0}, -{32, 0, 0, 8, 0, 0, 0}, -{32, 0, 0, 14, 0, 0, 0}, -{11, 0, 0, 96, 0, 0, 0}, -{10, 0, 17, 8, 0, 0, 0}, -{33, 29, 14, 8, 0, 0, 0}, -{33, 30, 14, 8, 0, 0, 0}, -{33, 14, 29, 8, 0, 0, 0}, -{33, 14, 30, 8, 0, 0, 0}, -{34, 0, 0, 8, 0, 0, 0}, -{35, 17, 11, 31, 0, 32, 0}, -{35, 17, 11, 31, 0, 1, 0}, -{35, 17, 11, 31, 0, 64, 0}, -{35, 17, 11, 31, 0, 65, 0}, -{35, 17, 11, 31, 0, 128, 0}, -{35, 17, 11, 31, 0, 4, 0}, -{35, 17, 11, 31, 0, 160, 0}, -{35, 17, 11, 31, 0, 224, 0}, -{32, 0, 41, 13, 0, 32, 0}, -{32, 0, 41, 13, 0, 1, 0}, -{32, 0, 41, 13, 0, 64, 0}, -{32, 0, 41, 13, 0, 65, 0}, -{32, 0, 41, 13, 0, 128, 0}, -{32, 0, 41, 13, 0, 4, 0}, -{32, 0, 41, 13, 0, 160, 0}, -{32, 0, 41, 13, 0, 224, 0}, -{35, 0, 15, 8, 0, 32, 0}, -{35, 0, 15, 8, 0, 1, 0}, -{35, 0, 15, 8, 0, 64, 0}, -{35, 0, 15, 8, 0, 65, 0}, -{35, 0, 15, 8, 0, 128, 0}, -{35, 0, 15, 8, 0, 4, 0}, -{35, 0, 15, 8, 0, 160, 0}, -{35, 0, 15, 8, 0, 224, 0}, -{36, 0, 32, 8, 0, 0, 0}, -{37, 0, 32, 8, 0, 0, 0}, -{35, 11, 17, 8, 1, 0, 244}, -{38, 11, 17, 8, 197, 0, 48}, -{39, 0, 32, 8, 0, 0, 0}, -{40, 0, 32, 8, 0, 0, 0}, -{32, 0, 0, 8, 255, 0, 0}, -{41, 11, 17, 8, 1, 0, 244}, -{35, 17, 11, 8, 33, 0, 212}, -{41, 9, 15, 8, 245, 0, 0}, -{41, 11, 17, 8, 245, 0, 0}, -{42, 37, 11, 8, 0, 0, 0}, -{35, 15, 11, 8, 0, 0, 0}, -{43, 16, 11, 8, 0, 0, 0}, -{43, 13, 45, 48, 0, 0, 0}, -{44, 0, 54, 8, 0, 0, 0}, -{45, 1, 15, 8, 245, 0, 0}, -{45, 1, 15, 8, 196, 16, 0}, -{45, 1, 15, 8, 245, 1, 0}, -{45, 1, 15, 8, 229, 0, 16}, -{45, 1, 15, 8, 196, 0, 16}, -{46, 1, 15, 8, 245, 0, 0}, -{45, 3, 17, 8, 245, 0, 0}, -{45, 3, 17, 8, 196, 16, 0}, -{45, 3, 17, 8, 245, 1, 0}, -{45, 3, 17, 8, 229, 0, 16}, -{45, 3, 17, 8, 196, 0, 16}, -{46, 3, 17, 8, 245, 0, 0}, -{47, 1, 15, 8, 245, 0, 0}, -{47, 1, 15, 8, 196, 16, 0}, -{47, 1, 15, 8, 245, 1, 0}, -{47, 1, 15, 8, 229, 0, 16}, -{47, 1, 15, 8, 196, 0, 16}, -{48, 1, 15, 8, 245, 0, 0}, -{45, 5, 17, 8, 245, 0, 0}, -{49, 5, 17, 8, 196, 16, 0}, -{45, 5, 17, 8, 245, 1, 0}, -{49, 5, 17, 8, 229, 0, 16}, -{49, 5, 17, 8, 196, 0, 16}, -{46, 5, 17, 8, 245, 0, 0}, -{50, 0, 17, 8, 0, 0, 0}, -{51, 1, 15, 8, 1, 0, 32}, -{51, 1, 15, 8, 1, 1, 32}, -{51, 1, 15, 8, 197, 0, 48}, -{51, 1, 17, 8, 1, 0, 32}, -{51, 1, 17, 8, 1, 1, 32}, -{51, 1, 17, 8, 197, 0, 48}, -{51, 1, 15, 8, 0, 0, 0}, -{51, 3, 17, 8, 0, 0, 0}, -{51, 51, 15, 8, 33, 0, 0}, -{51, 51, 15, 8, 33, 1, 0}, -{51, 51, 15, 8, 229, 0, 16}, -{51, 51, 17, 8, 33, 0, 0}, -{51, 51, 17, 8, 33, 1, 0}, -{51, 51, 17, 8, 229, 0, 16}, -{51, 52, 15, 8, 1, 0, 32}, -{51, 52, 15, 8, 1, 1, 32}, -{51, 52, 15, 8, 197, 0, 48}, -{51, 52, 17, 8, 1, 0, 32}, -{51, 52, 17, 8, 1, 1, 32}, -{51, 52, 17, 8, 197, 0, 48}, -{46, 0, 21, 16, 0, 0, 0}, -{52, 0, 62, 16, 0, 0, 0}, -{52, 0, 61, 16, 0, 0, 0}, -{52, 0, 0, 16, 0, 0, 0}, -{51, 0, 21, 16, 0, 0, 0}, -{46, 0, 42, 16, 0, 0, 0}, -{46, 0, 20, 16, 0, 0, 0}, -{53, 0, 62, 24, 0, 1, 0}, -{53, 0, 62, 24, 0, 64, 0}, -{53, 0, 62, 24, 0, 65, 0}, -{53, 0, 62, 24, 0, 4, 0}, -{54, 0, 21, 56, 0, 0, 0}, -{46, 0, 23, 16, 0, 0, 0}, -{51, 0, 23, 16, 0, 0, 0}, -{53, 0, 62, 16, 69, 0, 0}, -{53, 0, 62, 24, 69, 0, 0}, -{46, 0, 22, 16, 0, 0, 0}, -{52, 0, 63, 16, 0, 0, 0}, -{54, 0, 22, 56, 0, 0, 0}, -{51, 0, 22, 16, 0, 0, 0}, -{54, 0, 20, 56, 0, 0, 0}, -{51, 0, 20, 16, 0, 0, 0}, -{46, 1, 15, 8, 196, 0, 16}, -{45, 0, 15, 8, 0, 0, 0}, -{45, 0, 15, 8, 245, 0, 0}, -{51, 0, 15, 8, 33, 0, 212}, -{51, 0, 15, 8, 0, 0, 245}, -{46, 3, 17, 8, 196, 0, 16}, -{45, 0, 17, 8, 0, 0, 0}, -{45, 0, 17, 8, 245, 0, 0}, -{51, 0, 17, 8, 33, 0, 212}, -{51, 0, 17, 8, 0, 0, 245}, -{45, 0, 15, 8, 244, 0, 0}, -{45, 0, 17, 8, 244, 0, 0}, -{55, 0, 17, 9, 0, 0, 0}, -{56, 0, 37, 9, 0, 0, 0}, -{55, 0, 17, 12, 0, 0, 0}, -{56, 0, 37, 12, 0, 0, 0}, -{55, 0, 17, 8, 0, 0, 0}, -{46, 0, 17, 8, 0, 0, 0}, -{46, 0, 16, 8, 0, 0, 0}, -{54, 0, 16, 8, 0, 0, 0}, -{46, 0, 16, 8, 64, 0, 0}, -{55, 0, 39, 8, 0, 0, 0}, -{57, 0, 28, 8, 0, 0, 0}, -{58, 0, 16, 8, 0, 0, 0}, -{54, 0, 42, 8, 0, 0, 0}, -{53, 0, 0, 112, 0, 0, 0}, -{53, 0, 0, 8, 0, 0, 0}, -{54, 0, 58, 120, 0, 0, 0}, -{53, 0, 0, 120, 0, 0, 0}, -{53, 0, 58, 120, 0, 0, 0}, -{53, 60, 58, 120, 0, 0, 0}, -{59, 0, 0, 8, 0, 0, 0}, -{54, 0, 42, 96, 0, 0, 0}, -{60, 67, 64, 104, 0, 0, 0}, -{60, 67, 64, 96, 0, 0, 0}, -{35, 73, 68, 40, 0, 0, 0}, -{35, 73, 68, 48, 0, 0, 0}, -{35, 71, 68, 40, 0, 0, 0}, -{35, 72, 68, 48, 0, 0, 0}, -{61, 90, 83, 128, 0, 0, 0}, -{62, 81, 68, 128, 0, 0, 0}, -{63, 44, 68, 128, 0, 0, 0}, -{63, 46, 68, 128, 0, 0, 0}, -{35, 68, 73, 40, 0, 0, 0}, -{35, 68, 73, 48, 0, 0, 0}, -{35, 68, 71, 40, 0, 0, 0}, -{35, 68, 72, 48, 0, 0, 0}, -{61, 83, 90, 128, 0, 0, 0}, -{63, 68, 44, 128, 0, 0, 0}, -{63, 68, 46, 128, 0, 0, 0}, -{64, 72, 68, 40, 0, 0, 0}, -{35, 46, 68, 48, 0, 0, 0}, -{35, 72, 68, 56, 0, 0, 0}, -{65, 81, 68, 128, 0, 0, 0}, -{66, 81, 68, 128, 0, 0, 0}, -{61, 89, 83, 128, 0, 0, 0}, -{35, 68, 46, 40, 0, 0, 0}, -{35, 68, 46, 48, 0, 0, 0}, -{61, 68, 46, 128, 0, 0, 0}, -{34, 73, 68, 40, 0, 0, 0}, -{34, 73, 68, 48, 0, 0, 0}, -{66, 88, 83, 128, 0, 0, 0}, -{35, 73, 68, 56, 0, 0, 0}, -{54, 0, 42, 40, 0, 0, 0}, -{34, 67, 68, 40, 0, 0, 0}, -{34, 67, 68, 48, 0, 0, 0}, -{42, 18, 68, 40, 0, 0, 0}, -{42, 18, 68, 48, 0, 0, 0}, -{35, 68, 47, 40, 0, 0, 0}, -{35, 68, 47, 48, 0, 0, 0}, -{35, 68, 44, 88, 0, 0, 0}, -{35, 68, 46, 88, 0, 0, 0}, -{61, 83, 92, 128, 0, 0, 0}, -{34, 72, 64, 40, 0, 0, 0}, -{34, 73, 64, 48, 0, 0, 0}, -{42, 71, 13, 40, 0, 0, 0}, -{42, 72, 13, 48, 0, 0, 0}, -{61, 80, 78, 128, 0, 0, 0}, -{34, 71, 68, 40, 69, 0, 0}, -{34, 72, 68, 48, 0, 0, 0}, -{61, 71, 68, 128, 0, 0, 0}, -{61, 72, 68, 128, 0, 0, 0}, -{67, 69, 12, 40, 0, 0, 0}, -{67, 69, 12, 48, 0, 0, 0}, -{68, 83, 13, 128, 0, 0, 0}, -{34, 71, 68, 40, 0, 0, 0}, -{34, 71, 68, 48, 0, 0, 0}, -{61, 91, 83, 128, 0, 0, 0}, -{61, 90, 68, 128, 0, 0, 0}, -{34, 66, 64, 32, 0, 0, 0}, -{34, 67, 64, 32, 0, 0, 0}, -{69, 18, 64, 32, 0, 0, 0}, -{69, 18, 68, 48, 0, 0, 0}, -{61, 79, 68, 128, 0, 0, 0}, -{35, 67, 64, 32, 0, 0, 0}, -{70, 67, 64, 40, 0, 0, 0}, -{70, 73, 68, 48, 0, 0, 0}, -{66, 73, 68, 128, 0, 0, 0}, -{32, 0, 0, 32, 0, 0, 0}, -{71, 0, 0, 128, 0, 0, 0}, -{72, 13, 18, 112, 0, 0, 0}, -{73, 7, 69, 88, 0, 0, 0}, -{74, 69, 68, 88, 0, 0, 0}, -{72, 18, 13, 112, 0, 0, 0}, -{34, 69, 68, 88, 0, 0, 0}, -{75, 69, 68, 88, 0, 0, 0}, -{32, 72, 68, 112, 0, 0, 0}, -{32, 68, 72, 112, 0, 0, 0}, -{34, 73, 68, 56, 0, 0, 0}, -{69, 64, 18, 32, 0, 0, 0}, -{69, 68, 18, 48, 0, 0, 0}, -{61, 68, 79, 128, 0, 0, 0}, -{35, 64, 67, 32, 0, 0, 0}, -{76, 0, 42, 8, 0, 0, 0}, -{77, 0, 43, 8, 0, 0, 0}, -{78, 0, 43, 8, 0, 0, 0}, -{79, 17, 11, 80, 64, 0, 0}, -{80, 1, 17, 8, 1, 0, 244}, -{49, 1, 17, 8, 1, 0, 244}, -{34, 17, 11, 8, 64, 0, 245}, -{81, 17, 11, 112, 0, 0, 0}, -{82, 17, 11, 8, 65, 0, 180}, -{83, 73, 68, 40, 0, 0, 0}, -{83, 73, 68, 48, 0, 0, 0}, -{83, 71, 68, 40, 0, 0, 0}, -{83, 72, 68, 48, 0, 0, 0}, -{84, 88, 83, 128, 0, 0, 0}, -{84, 81, 68, 128, 0, 0, 0}, -{70, 25, 64, 40, 0, 0, 0}, -{70, 25, 68, 48, 0, 0, 0}, -{85, 81, 68, 128, 0, 0, 0}, -{86, 65, 12, 40, 0, 0, 0}, -{70, 69, 12, 48, 0, 0, 0}, -{87, 68, 13, 128, 0, 0, 0}, -{70, 73, 68, 40, 0, 0, 0}, -{85, 88, 83, 128, 0, 0, 0}, -{88, 0, 48, 8, 64, 0, 0}, -{54, 0, 46, 112, 0, 0, 0}, -{67, 65, 68, 48, 0, 0, 0}, -{67, 69, 64, 48, 0, 0, 0}, -{61, 68, 72, 128, 0, 0, 0}, -{75, 65, 12, 40, 0, 0, 0}, -{75, 69, 12, 48, 0, 0, 0}, -{68, 68, 13, 128, 0, 0, 0}, -{34, 67, 64, 40, 0, 0, 0}, -{35, 64, 46, 40, 0, 0, 0}, -{34, 42, 68, 56, 0, 0, 0}, -{61, 92, 83, 128, 0, 0, 0}, -{34, 67, 64, 48, 0, 0, 0}, -{75, 65, 64, 40, 0, 0, 0}, -{75, 69, 68, 48, 0, 0, 0}, -{89, 69, 68, 128, 0, 0, 0}, -{51, 0, 42, 16, 0, 0, 0}, -{90, 0, 42, 16, 0, 0, 0}, -{90, 0, 20, 16, 0, 0, 0}, -{91, 0, 0, 16, 0, 0, 0}, -{92, 0, 34, 16, 0, 0, 0}, -{93, 0, 34, 16, 0, 0, 0}, -{34, 67, 64, 64, 0, 0, 0}, -{34, 73, 68, 64, 0, 0, 0}, -{70, 73, 68, 72, 0, 0, 0}, -{34, 73, 68, 80, 0, 0, 0}, -{61, 44, 83, 128, 0, 0, 0}, -{61, 46, 85, 128, 0, 0, 0}, -{61, 47, 85, 128, 0, 0, 0}, -{61, 73, 68, 128, 0, 0, 0}, -{34, 72, 68, 72, 0, 0, 0}, -{34, 71, 68, 72, 0, 0, 0}, -{34, 70, 68, 72, 0, 0, 0}, -{61, 70, 68, 128, 0, 0, 0}, -{34, 73, 68, 72, 0, 0, 0}, -{35, 47, 68, 72, 0, 0, 0}, -{61, 47, 68, 128, 0, 0, 0}, -{66, 88, 92, 128, 0, 0, 0}, -{72, 47, 13, 112, 0, 0, 0}, -{66, 88, 83, 136, 0, 0, 0}, -{66, 81, 68, 136, 0, 0, 0}, -{34, 73, 68, 152, 0, 0, 0}, -{61, 73, 68, 152, 0, 0, 0}, -{66, 81, 68, 152, 0, 0, 0}, -{35, 17, 11, 8, 0, 0, 0}, -{35, 15, 13, 80, 0, 0, 0}, -{35, 11, 17, 8, 0, 0, 0}, -{35, 17, 13, 80, 0, 0, 0}, -{66, 90, 83, 128, 0, 0, 0}, -{85, 87, 85, 128, 0, 0, 0}, -{70, 71, 68, 72, 0, 0, 0}, -{70, 72, 68, 72, 0, 0, 0}, -{70, 67, 64, 64, 0, 0, 0}, -{70, 73, 68, 64, 0, 0, 0}, -{70, 68, 26, 72, 0, 0, 0}, -{87, 68, 76, 128, 0, 0, 0}, -{70, 68, 27, 72, 0, 0, 0}, -{87, 68, 77, 128, 0, 0, 0}, -{94, 68, 18, 72, 0, 0, 0}, -{66, 68, 79, 128, 0, 0, 0}, -{70, 68, 18, 72, 0, 0, 0}, -{66, 68, 75, 128, 0, 0, 0}, -{66, 85, 73, 128, 0, 0, 0}, -{70, 24, 68, 72, 0, 0, 0}, -{94, 18, 68, 72, 0, 0, 0}, -{70, 73, 68, 144, 0, 0, 0}, -{85, 81, 68, 144, 0, 0, 0}, -{70, 73, 68, 80, 0, 0, 0}, -{70, 73, 68, 152, 0, 0, 0}, -{66, 73, 68, 152, 0, 0, 0}, -{95, 1, 65, 32, 0, 0, 0}, -{54, 1, 69, 48, 0, 0, 0}, -{96, 69, 81, 128, 0, 0, 0}, -{97, 0, 13, 112, 0, 0, 0}, -{63, 0, 44, 128, 0, 0, 0}, -{54, 0, 42, 112, 0, 0, 0}, -{98, 75, 13, 8, 0, 0, 0}, -{97, 0, 17, 8, 0, 0, 0}, -{99, 67, 64, 96, 0, 0, 0} -}; - -uint16_t CmpMnemonicOffsets[8] = { -0, 9, 18, 27, 39, 49, 59, 69 -}; -uint16_t VCmpMnemonicOffsets[32] = { -0, 10, 20, 30, 43, 54, 65, 76, 87, 100, 111, 122, 135, 149, 159, 169, 181, 194, 207, 220, 235, 249, 263, 277, 290, 303, 317, 331, 347, 361, 374, 387 -}; diff --git a/diStorm/src/insts.h b/diStorm/src/insts.h deleted file mode 100644 index 4813a8b..0000000 --- a/diStorm/src/insts.h +++ /dev/null @@ -1,76 +0,0 @@ -/* -insts.h - -diStorm3 - Powerful disassembler for X86/AMD64 -http://ragestorm.net/distorm/ -distorm at gmail dot com -Copyright (C) 2003-2012 Gil Dabah - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see -*/ - - -#ifndef INSTS_H -#define INSTS_H - -#include "instructions.h" - - -/* Flags Table */ -extern _iflags FlagsTable[]; - -/* Root Trie DB */ -extern _InstSharedInfo InstSharedInfoTable[]; -extern _InstInfo InstInfos[]; -extern _InstInfoEx InstInfosEx[]; -extern _InstNode InstructionsTree[]; - -/* 3DNow! Trie DB */ -extern _InstNode Table_0F_0F; -/* AVX related: */ -extern _InstNode Table_0F, Table_0F_38, Table_0F_3A; - -/* - * The inst_lookup will return on of these two instructions according to the specified decoding mode. - * ARPL or MOVSXD on 64 bits is one byte instruction at index 0x63. - */ -extern _InstInfo II_MOVSXD; - -/* - * The NOP instruction can be prefixed by REX in 64bits, therefore we have to decide in runtime whether it's an XCHG or NOP instruction. - * If 0x90 is prefixed by a usable REX it will become XCHG, otherwise it will become a NOP. - * Also note that if it's prefixed by 0xf3, it becomes a Pause. - */ -extern _InstInfo II_NOP; -extern _InstInfo II_PAUSE; - -/* - * RDRAND and VMPTRLD share same 2.3 bytes opcode, and then alternates on the MOD bits, - * RDRAND is OT_FULL_REG while VMPTRLD is OT_MEM, and there's no such mixed type. - * So a hack into the inst_lookup was added for this decision, the DB isn't flexible enough. :( - */ -extern _InstInfo II_RDRAND; - -/* - * Used for letting the extract operand know the type of operands without knowing the - * instruction itself yet, because of the way those instructions work. - * See function instructions.c!inst_lookup_3dnow. - */ -extern _InstInfo II_3DNOW; - -/* Helper tables for pseudo compare mnemonics. */ -extern uint16_t CmpMnemonicOffsets[8]; /* SSE */ -extern uint16_t VCmpMnemonicOffsets[32]; /* AVX */ - -#endif /* INSTS_H */ diff --git a/diStorm/src/mnemonics.c b/diStorm/src/mnemonics.c deleted file mode 100644 index 3bc6bee..0000000 --- a/diStorm/src/mnemonics.c +++ /dev/null @@ -1,295 +0,0 @@ -/* -mnemonics.c - -diStorm3 - Powerful disassembler for X86/AMD64 -http://ragestorm.net/distorm/ -distorm at gmail dot com -Copyright (C) 2003-2012 Gil Dabah - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see -*/ - - -#include "../include/mnemonics.h" - -#ifndef DISTORM_LIGHT - -const unsigned char _MNEMONICS[] = -"\x09" "UNDEFINED\0" "\x03" "ADD\0" "\x04" "PUSH\0" "\x03" "POP\0" "\x02" "OR\0" \ -"\x03" "ADC\0" "\x03" "SBB\0" "\x03" "AND\0" "\x03" "DAA\0" "\x03" "SUB\0" \ -"\x03" "DAS\0" "\x03" "XOR\0" "\x03" "AAA\0" "\x03" "CMP\0" "\x03" "AAS\0" \ -"\x03" "INC\0" "\x03" "DEC\0" "\x05" "PUSHA\0" "\x04" "POPA\0" "\x05" "BOUND\0" \ -"\x04" "ARPL\0" "\x04" "IMUL\0" "\x03" "INS\0" "\x04" "OUTS\0" "\x02" "JO\0" \ -"\x03" "JNO\0" "\x02" "JB\0" "\x03" "JAE\0" "\x02" "JZ\0" "\x03" "JNZ\0" "\x03" "JBE\0" \ -"\x02" "JA\0" "\x02" "JS\0" "\x03" "JNS\0" "\x02" "JP\0" "\x03" "JNP\0" "\x02" "JL\0" \ -"\x03" "JGE\0" "\x03" "JLE\0" "\x02" "JG\0" "\x04" "TEST\0" "\x04" "XCHG\0" \ -"\x03" "MOV\0" "\x03" "LEA\0" "\x03" "CBW\0" "\x04" "CWDE\0" "\x04" "CDQE\0" \ -"\x03" "CWD\0" "\x03" "CDQ\0" "\x03" "CQO\0" "\x08" "CALL FAR\0" "\x05" "PUSHF\0" \ -"\x04" "POPF\0" "\x04" "SAHF\0" "\x04" "LAHF\0" "\x04" "MOVS\0" "\x04" "CMPS\0" \ -"\x04" "STOS\0" "\x04" "LODS\0" "\x04" "SCAS\0" "\x03" "RET\0" "\x03" "LES\0" \ -"\x03" "LDS\0" "\x05" "ENTER\0" "\x05" "LEAVE\0" "\x04" "RETF\0" "\x05" "INT 3\0" \ -"\x03" "INT\0" "\x04" "INTO\0" "\x04" "IRET\0" "\x03" "AAM\0" "\x03" "AAD\0" \ -"\x04" "SALC\0" "\x04" "XLAT\0" "\x06" "LOOPNZ\0" "\x05" "LOOPZ\0" "\x04" "LOOP\0" \ -"\x04" "JCXZ\0" "\x05" "JECXZ\0" "\x05" "JRCXZ\0" "\x02" "IN\0" "\x03" "OUT\0" \ -"\x04" "CALL\0" "\x03" "JMP\0" "\x07" "JMP FAR\0" "\x04" "INT1\0" "\x03" "HLT\0" \ -"\x03" "CMC\0" "\x03" "CLC\0" "\x03" "STC\0" "\x03" "CLI\0" "\x03" "STI\0" \ -"\x03" "CLD\0" "\x03" "STD\0" "\x03" "LAR\0" "\x03" "LSL\0" "\x07" "SYSCALL\0" \ -"\x04" "CLTS\0" "\x06" "SYSRET\0" "\x04" "INVD\0" "\x06" "WBINVD\0" "\x03" "UD2\0" \ -"\x05" "FEMMS\0" "\x03" "NOP\0" "\x05" "WRMSR\0" "\x05" "RDTSC\0" "\x05" "RDMSR\0" \ -"\x05" "RDPMC\0" "\x08" "SYSENTER\0" "\x07" "SYSEXIT\0" "\x06" "GETSEC\0" "\x05" "CMOVO\0" \ -"\x06" "CMOVNO\0" "\x05" "CMOVB\0" "\x06" "CMOVAE\0" "\x05" "CMOVZ\0" "\x06" "CMOVNZ\0" \ -"\x06" "CMOVBE\0" "\x05" "CMOVA\0" "\x05" "CMOVS\0" "\x06" "CMOVNS\0" "\x05" "CMOVP\0" \ -"\x06" "CMOVNP\0" "\x05" "CMOVL\0" "\x06" "CMOVGE\0" "\x06" "CMOVLE\0" "\x05" "CMOVG\0" \ -"\x04" "SETO\0" "\x05" "SETNO\0" "\x04" "SETB\0" "\x05" "SETAE\0" "\x04" "SETZ\0" \ -"\x05" "SETNZ\0" "\x05" "SETBE\0" "\x04" "SETA\0" "\x04" "SETS\0" "\x05" "SETNS\0" \ -"\x04" "SETP\0" "\x05" "SETNP\0" "\x04" "SETL\0" "\x05" "SETGE\0" "\x05" "SETLE\0" \ -"\x04" "SETG\0" "\x05" "CPUID\0" "\x02" "BT\0" "\x04" "SHLD\0" "\x03" "RSM\0" \ -"\x03" "BTS\0" "\x04" "SHRD\0" "\x07" "CMPXCHG\0" "\x03" "LSS\0" "\x03" "BTR\0" \ -"\x03" "LFS\0" "\x03" "LGS\0" "\x05" "MOVZX\0" "\x03" "BTC\0" "\x05" "MOVSX\0" \ -"\x04" "XADD\0" "\x06" "MOVNTI\0" "\x05" "BSWAP\0" "\x03" "ROL\0" "\x03" "ROR\0" \ -"\x03" "RCL\0" "\x03" "RCR\0" "\x03" "SHL\0" "\x03" "SHR\0" "\x03" "SAL\0" \ -"\x03" "SAR\0" "\x04" "FADD\0" "\x04" "FMUL\0" "\x04" "FCOM\0" "\x05" "FCOMP\0" \ -"\x04" "FSUB\0" "\x05" "FSUBR\0" "\x04" "FDIV\0" "\x05" "FDIVR\0" "\x03" "FLD\0" \ -"\x03" "FST\0" "\x04" "FSTP\0" "\x06" "FLDENV\0" "\x05" "FLDCW\0" "\x04" "FXCH\0" \ -"\x04" "FNOP\0" "\x04" "FCHS\0" "\x04" "FABS\0" "\x04" "FTST\0" "\x04" "FXAM\0" \ -"\x04" "FLD1\0" "\x06" "FLDL2T\0" "\x06" "FLDL2E\0" "\x05" "FLDPI\0" "\x06" "FLDLG2\0" \ -"\x06" "FLDLN2\0" "\x04" "FLDZ\0" "\x05" "F2XM1\0" "\x05" "FYL2X\0" "\x05" "FPTAN\0" \ -"\x06" "FPATAN\0" "\x07" "FXTRACT\0" "\x06" "FPREM1\0" "\x07" "FDECSTP\0" "\x07" "FINCSTP\0" \ -"\x05" "FPREM\0" "\x07" "FYL2XP1\0" "\x05" "FSQRT\0" "\x07" "FSINCOS\0" "\x07" "FRNDINT\0" \ -"\x06" "FSCALE\0" "\x04" "FSIN\0" "\x04" "FCOS\0" "\x05" "FIADD\0" "\x05" "FIMUL\0" \ -"\x05" "FICOM\0" "\x06" "FICOMP\0" "\x05" "FISUB\0" "\x06" "FISUBR\0" "\x05" "FIDIV\0" \ -"\x06" "FIDIVR\0" "\x06" "FCMOVB\0" "\x06" "FCMOVE\0" "\x07" "FCMOVBE\0" "\x06" "FCMOVU\0" \ -"\x07" "FUCOMPP\0" "\x04" "FILD\0" "\x06" "FISTTP\0" "\x04" "FIST\0" "\x05" "FISTP\0" \ -"\x07" "FCMOVNB\0" "\x07" "FCMOVNE\0" "\x08" "FCMOVNBE\0" "\x07" "FCMOVNU\0" \ -"\x04" "FENI\0" "\x06" "FEDISI\0" "\x06" "FSETPM\0" "\x06" "FUCOMI\0" "\x05" "FCOMI\0" \ -"\x06" "FRSTOR\0" "\x05" "FFREE\0" "\x05" "FUCOM\0" "\x06" "FUCOMP\0" "\x05" "FADDP\0" \ -"\x05" "FMULP\0" "\x06" "FCOMPP\0" "\x06" "FSUBRP\0" "\x05" "FSUBP\0" "\x06" "FDIVRP\0" \ -"\x05" "FDIVP\0" "\x04" "FBLD\0" "\x05" "FBSTP\0" "\x07" "FUCOMIP\0" "\x06" "FCOMIP\0" \ -"\x03" "NOT\0" "\x03" "NEG\0" "\x03" "MUL\0" "\x03" "DIV\0" "\x04" "IDIV\0" \ -"\x04" "SLDT\0" "\x03" "STR\0" "\x04" "LLDT\0" "\x03" "LTR\0" "\x04" "VERR\0" \ -"\x04" "VERW\0" "\x04" "SGDT\0" "\x04" "SIDT\0" "\x04" "LGDT\0" "\x04" "LIDT\0" \ -"\x04" "SMSW\0" "\x04" "LMSW\0" "\x06" "INVLPG\0" "\x06" "VMCALL\0" "\x08" "VMLAUNCH\0" \ -"\x08" "VMRESUME\0" "\x06" "VMXOFF\0" "\x07" "MONITOR\0" "\x05" "MWAIT\0" "\x06" "XGETBV\0" \ -"\x06" "XSETBV\0" "\x06" "VMFUNC\0" "\x05" "VMRUN\0" "\x07" "VMMCALL\0" "\x06" "VMLOAD\0" \ -"\x06" "VMSAVE\0" "\x04" "STGI\0" "\x04" "CLGI\0" "\x06" "SKINIT\0" "\x07" "INVLPGA\0" \ -"\x06" "SWAPGS\0" "\x06" "RDTSCP\0" "\x08" "PREFETCH\0" "\x09" "PREFETCHW\0" \ -"\x05" "PI2FW\0" "\x05" "PI2FD\0" "\x05" "PF2IW\0" "\x05" "PF2ID\0" "\x06" "PFNACC\0" \ -"\x07" "PFPNACC\0" "\x07" "PFCMPGE\0" "\x05" "PFMIN\0" "\x05" "PFRCP\0" "\x07" "PFRSQRT\0" \ -"\x05" "PFSUB\0" "\x05" "PFADD\0" "\x07" "PFCMPGT\0" "\x05" "PFMAX\0" "\x08" "PFRCPIT1\0" \ -"\x08" "PFRSQIT1\0" "\x06" "PFSUBR\0" "\x05" "PFACC\0" "\x07" "PFCMPEQ\0" "\x05" "PFMUL\0" \ -"\x08" "PFRCPIT2\0" "\x07" "PMULHRW\0" "\x06" "PSWAPD\0" "\x07" "PAVGUSB\0" \ -"\x06" "MOVUPS\0" "\x06" "MOVUPD\0" "\x05" "MOVSS\0" "\x05" "MOVSD\0" "\x07" "VMOVUPS\0" \ -"\x07" "VMOVUPD\0" "\x06" "VMOVSS\0" "\x06" "VMOVSD\0" "\x07" "MOVHLPS\0" "\x06" "MOVLPS\0" \ -"\x06" "MOVLPD\0" "\x08" "MOVSLDUP\0" "\x07" "MOVDDUP\0" "\x08" "VMOVHLPS\0" \ -"\x07" "VMOVLPS\0" "\x07" "VMOVLPD\0" "\x09" "VMOVSLDUP\0" "\x08" "VMOVDDUP\0" \ -"\x08" "UNPCKLPS\0" "\x08" "UNPCKLPD\0" "\x09" "VUNPCKLPS\0" "\x09" "VUNPCKLPD\0" \ -"\x08" "UNPCKHPS\0" "\x08" "UNPCKHPD\0" "\x09" "VUNPCKHPS\0" "\x09" "VUNPCKHPD\0" \ -"\x07" "MOVLHPS\0" "\x06" "MOVHPS\0" "\x06" "MOVHPD\0" "\x08" "MOVSHDUP\0" \ -"\x08" "VMOVLHPS\0" "\x07" "VMOVHPS\0" "\x07" "VMOVHPD\0" "\x09" "VMOVSHDUP\0" \ -"\x0b" "PREFETCHNTA\0" "\x0a" "PREFETCHT0\0" "\x0a" "PREFETCHT1\0" "\x0a" "PREFETCHT2\0" \ -"\x06" "MOVAPS\0" "\x06" "MOVAPD\0" "\x07" "VMOVAPS\0" "\x07" "VMOVAPD\0" "\x08" "CVTPI2PS\0" \ -"\x08" "CVTPI2PD\0" "\x08" "CVTSI2SS\0" "\x08" "CVTSI2SD\0" "\x09" "VCVTSI2SS\0" \ -"\x09" "VCVTSI2SD\0" "\x07" "MOVNTPS\0" "\x07" "MOVNTPD\0" "\x07" "MOVNTSS\0" \ -"\x07" "MOVNTSD\0" "\x08" "VMOVNTPS\0" "\x08" "VMOVNTPD\0" "\x09" "CVTTPS2PI\0" \ -"\x09" "CVTTPD2PI\0" "\x09" "CVTTSS2SI\0" "\x09" "CVTTSD2SI\0" "\x0a" "VCVTTSS2SI\0" \ -"\x0a" "VCVTTSD2SI\0" "\x08" "CVTPS2PI\0" "\x08" "CVTPD2PI\0" "\x08" "CVTSS2SI\0" \ -"\x08" "CVTSD2SI\0" "\x09" "VCVTSS2SI\0" "\x09" "VCVTSD2SI\0" "\x07" "UCOMISS\0" \ -"\x07" "UCOMISD\0" "\x08" "VUCOMISS\0" "\x08" "VUCOMISD\0" "\x06" "COMISS\0" \ -"\x06" "COMISD\0" "\x07" "VCOMISS\0" "\x07" "VCOMISD\0" "\x08" "MOVMSKPS\0" \ -"\x08" "MOVMSKPD\0" "\x09" "VMOVMSKPS\0" "\x09" "VMOVMSKPD\0" "\x06" "SQRTPS\0" \ -"\x06" "SQRTPD\0" "\x06" "SQRTSS\0" "\x06" "SQRTSD\0" "\x07" "VSQRTPS\0" "\x07" "VSQRTPD\0" \ -"\x07" "VSQRTSS\0" "\x07" "VSQRTSD\0" "\x07" "RSQRTPS\0" "\x07" "RSQRTSS\0" \ -"\x08" "VRSQRTPS\0" "\x08" "VRSQRTSS\0" "\x05" "RCPPS\0" "\x05" "RCPSS\0" "\x06" "VRCPPS\0" \ -"\x06" "VRCPSS\0" "\x05" "ANDPS\0" "\x05" "ANDPD\0" "\x06" "VANDPS\0" "\x06" "VANDPD\0" \ -"\x06" "ANDNPS\0" "\x06" "ANDNPD\0" "\x07" "VANDNPS\0" "\x07" "VANDNPD\0" "\x04" "ORPS\0" \ -"\x04" "ORPD\0" "\x05" "VORPS\0" "\x05" "VORPD\0" "\x05" "XORPS\0" "\x05" "XORPD\0" \ -"\x06" "VXORPS\0" "\x06" "VXORPD\0" "\x05" "ADDPS\0" "\x05" "ADDPD\0" "\x05" "ADDSS\0" \ -"\x05" "ADDSD\0" "\x06" "VADDPS\0" "\x06" "VADDPD\0" "\x06" "VADDSS\0" "\x06" "VADDSD\0" \ -"\x05" "MULPS\0" "\x05" "MULPD\0" "\x05" "MULSS\0" "\x05" "MULSD\0" "\x06" "VMULPS\0" \ -"\x06" "VMULPD\0" "\x06" "VMULSS\0" "\x06" "VMULSD\0" "\x08" "CVTPS2PD\0" "\x08" "CVTPD2PS\0" \ -"\x08" "CVTSS2SD\0" "\x08" "CVTSD2SS\0" "\x09" "VCVTPS2PD\0" "\x09" "VCVTPD2PS\0" \ -"\x09" "VCVTSS2SD\0" "\x09" "VCVTSD2SS\0" "\x08" "CVTDQ2PS\0" "\x08" "CVTPS2DQ\0" \ -"\x09" "CVTTPS2DQ\0" "\x09" "VCVTDQ2PS\0" "\x09" "VCVTPS2DQ\0" "\x0a" "VCVTTPS2DQ\0" \ -"\x05" "SUBPS\0" "\x05" "SUBPD\0" "\x05" "SUBSS\0" "\x05" "SUBSD\0" "\x06" "VSUBPS\0" \ -"\x06" "VSUBPD\0" "\x06" "VSUBSS\0" "\x06" "VSUBSD\0" "\x05" "MINPS\0" "\x05" "MINPD\0" \ -"\x05" "MINSS\0" "\x05" "MINSD\0" "\x06" "VMINPS\0" "\x06" "VMINPD\0" "\x06" "VMINSS\0" \ -"\x06" "VMINSD\0" "\x05" "DIVPS\0" "\x05" "DIVPD\0" "\x05" "DIVSS\0" "\x05" "DIVSD\0" \ -"\x06" "VDIVPS\0" "\x06" "VDIVPD\0" "\x06" "VDIVSS\0" "\x06" "VDIVSD\0" "\x05" "MAXPS\0" \ -"\x05" "MAXPD\0" "\x05" "MAXSS\0" "\x05" "MAXSD\0" "\x06" "VMAXPS\0" "\x06" "VMAXPD\0" \ -"\x06" "VMAXSS\0" "\x06" "VMAXSD\0" "\x09" "PUNPCKLBW\0" "\x0a" "VPUNPCKLBW\0" \ -"\x09" "PUNPCKLWD\0" "\x0a" "VPUNPCKLWD\0" "\x09" "PUNPCKLDQ\0" "\x0a" "VPUNPCKLDQ\0" \ -"\x08" "PACKSSWB\0" "\x09" "VPACKSSWB\0" "\x07" "PCMPGTB\0" "\x08" "VPCMPGTB\0" \ -"\x07" "PCMPGTW\0" "\x08" "VPCMPGTW\0" "\x07" "PCMPGTD\0" "\x08" "VPCMPGTD\0" \ -"\x08" "PACKUSWB\0" "\x09" "VPACKUSWB\0" "\x09" "PUNPCKHBW\0" "\x0a" "VPUNPCKHBW\0" \ -"\x09" "PUNPCKHWD\0" "\x0a" "VPUNPCKHWD\0" "\x09" "PUNPCKHDQ\0" "\x0a" "VPUNPCKHDQ\0" \ -"\x08" "PACKSSDW\0" "\x09" "VPACKSSDW\0" "\x0a" "PUNPCKLQDQ\0" "\x0b" "VPUNPCKLQDQ\0" \ -"\x0a" "PUNPCKHQDQ\0" "\x0b" "VPUNPCKHQDQ\0" "\x04" "MOVD\0" "\x04" "MOVQ\0" \ -"\x05" "VMOVD\0" "\x05" "VMOVQ\0" "\x06" "MOVDQA\0" "\x06" "MOVDQU\0" "\x07" "VMOVDQA\0" \ -"\x07" "VMOVDQU\0" "\x06" "PSHUFW\0" "\x06" "PSHUFD\0" "\x07" "PSHUFHW\0" "\x07" "PSHUFLW\0" \ -"\x07" "VPSHUFD\0" "\x08" "VPSHUFHW\0" "\x08" "VPSHUFLW\0" "\x07" "PCMPEQB\0" \ -"\x08" "VPCMPEQB\0" "\x07" "PCMPEQW\0" "\x08" "VPCMPEQW\0" "\x07" "PCMPEQD\0" \ -"\x08" "VPCMPEQD\0" "\x04" "EMMS\0" "\x0a" "VZEROUPPER\0" "\x08" "VZEROALL\0" \ -"\x06" "VMREAD\0" "\x05" "EXTRQ\0" "\x07" "INSERTQ\0" "\x07" "VMWRITE\0" "\x08" "CVTPH2PS\0" \ -"\x08" "CVTPS2PH\0" "\x06" "HADDPD\0" "\x06" "HADDPS\0" "\x07" "VHADDPD\0" \ -"\x07" "VHADDPS\0" "\x06" "HSUBPD\0" "\x06" "HSUBPS\0" "\x07" "VHSUBPD\0" "\x07" "VHSUBPS\0" \ -"\x05" "XSAVE\0" "\x07" "XSAVE64\0" "\x06" "LFENCE\0" "\x06" "XRSTOR\0" "\x08" "XRSTOR64\0" \ -"\x06" "MFENCE\0" "\x08" "XSAVEOPT\0" "\x0a" "XSAVEOPT64\0" "\x06" "SFENCE\0" \ -"\x07" "CLFLUSH\0" "\x06" "POPCNT\0" "\x03" "BSF\0" "\x05" "TZCNT\0" "\x03" "BSR\0" \ -"\x05" "LZCNT\0" "\x07" "CMPEQPS\0" "\x07" "CMPLTPS\0" "\x07" "CMPLEPS\0" "\x0a" "CMPUNORDPS\0" \ -"\x08" "CMPNEQPS\0" "\x08" "CMPNLTPS\0" "\x08" "CMPNLEPS\0" "\x08" "CMPORDPS\0" \ -"\x07" "CMPEQPD\0" "\x07" "CMPLTPD\0" "\x07" "CMPLEPD\0" "\x0a" "CMPUNORDPD\0" \ -"\x08" "CMPNEQPD\0" "\x08" "CMPNLTPD\0" "\x08" "CMPNLEPD\0" "\x08" "CMPORDPD\0" \ -"\x07" "CMPEQSS\0" "\x07" "CMPLTSS\0" "\x07" "CMPLESS\0" "\x0a" "CMPUNORDSS\0" \ -"\x08" "CMPNEQSS\0" "\x08" "CMPNLTSS\0" "\x08" "CMPNLESS\0" "\x08" "CMPORDSS\0" \ -"\x07" "CMPEQSD\0" "\x07" "CMPLTSD\0" "\x07" "CMPLESD\0" "\x0a" "CMPUNORDSD\0" \ -"\x08" "CMPNEQSD\0" "\x08" "CMPNLTSD\0" "\x08" "CMPNLESD\0" "\x08" "CMPORDSD\0" \ -"\x08" "VCMPEQPS\0" "\x08" "VCMPLTPS\0" "\x08" "VCMPLEPS\0" "\x0b" "VCMPUNORDPS\0" \ -"\x09" "VCMPNEQPS\0" "\x09" "VCMPNLTPS\0" "\x09" "VCMPNLEPS\0" "\x09" "VCMPORDPS\0" \ -"\x0b" "VCMPEQ_UQPS\0" "\x09" "VCMPNGEPS\0" "\x09" "VCMPNGTPS\0" "\x0b" "VCMPFALSEPS\0" \ -"\x0c" "VCMPNEQ_OQPS\0" "\x08" "VCMPGEPS\0" "\x08" "VCMPGTPS\0" "\x0a" "VCMPTRUEPS\0" \ -"\x0b" "VCMPEQ_OSPS\0" "\x0b" "VCMPLT_OQPS\0" "\x0b" "VCMPLE_OQPS\0" "\x0d" "VCMPUNORD_SPS\0" \ -"\x0c" "VCMPNEQ_USPS\0" "\x0c" "VCMPNLT_UQPS\0" "\x0c" "VCMPNLE_UQPS\0" "\x0b" "VCMPORD_SPS\0" \ -"\x0b" "VCMPEQ_USPS\0" "\x0c" "VCMPNGE_UQPS\0" "\x0c" "VCMPNGT_UQPS\0" "\x0e" "VCMPFALSE_OSPS\0" \ -"\x0c" "VCMPNEQ_OSPS\0" "\x0b" "VCMPGE_OQPS\0" "\x0b" "VCMPGT_OQPS\0" "\x0d" "VCMPTRUE_USPS\0" \ -"\x08" "VCMPEQPD\0" "\x08" "VCMPLTPD\0" "\x08" "VCMPLEPD\0" "\x0b" "VCMPUNORDPD\0" \ -"\x09" "VCMPNEQPD\0" "\x09" "VCMPNLTPD\0" "\x09" "VCMPNLEPD\0" "\x09" "VCMPORDPD\0" \ -"\x0b" "VCMPEQ_UQPD\0" "\x09" "VCMPNGEPD\0" "\x09" "VCMPNGTPD\0" "\x0b" "VCMPFALSEPD\0" \ -"\x0c" "VCMPNEQ_OQPD\0" "\x08" "VCMPGEPD\0" "\x08" "VCMPGTPD\0" "\x0a" "VCMPTRUEPD\0" \ -"\x0b" "VCMPEQ_OSPD\0" "\x0b" "VCMPLT_OQPD\0" "\x0b" "VCMPLE_OQPD\0" "\x0d" "VCMPUNORD_SPD\0" \ -"\x0c" "VCMPNEQ_USPD\0" "\x0c" "VCMPNLT_UQPD\0" "\x0c" "VCMPNLE_UQPD\0" "\x0b" "VCMPORD_SPD\0" \ -"\x0b" "VCMPEQ_USPD\0" "\x0c" "VCMPNGE_UQPD\0" "\x0c" "VCMPNGT_UQPD\0" "\x0e" "VCMPFALSE_OSPD\0" \ -"\x0c" "VCMPNEQ_OSPD\0" "\x0b" "VCMPGE_OQPD\0" "\x0b" "VCMPGT_OQPD\0" "\x0d" "VCMPTRUE_USPD\0" \ -"\x08" "VCMPEQSS\0" "\x08" "VCMPLTSS\0" "\x08" "VCMPLESS\0" "\x0b" "VCMPUNORDSS\0" \ -"\x09" "VCMPNEQSS\0" "\x09" "VCMPNLTSS\0" "\x09" "VCMPNLESS\0" "\x09" "VCMPORDSS\0" \ -"\x0b" "VCMPEQ_UQSS\0" "\x09" "VCMPNGESS\0" "\x09" "VCMPNGTSS\0" "\x0b" "VCMPFALSESS\0" \ -"\x0c" "VCMPNEQ_OQSS\0" "\x08" "VCMPGESS\0" "\x08" "VCMPGTSS\0" "\x0a" "VCMPTRUESS\0" \ -"\x0b" "VCMPEQ_OSSS\0" "\x0b" "VCMPLT_OQSS\0" "\x0b" "VCMPLE_OQSS\0" "\x0d" "VCMPUNORD_SSS\0" \ -"\x0c" "VCMPNEQ_USSS\0" "\x0c" "VCMPNLT_UQSS\0" "\x0c" "VCMPNLE_UQSS\0" "\x0b" "VCMPORD_SSS\0" \ -"\x0b" "VCMPEQ_USSS\0" "\x0c" "VCMPNGE_UQSS\0" "\x0c" "VCMPNGT_UQSS\0" "\x0e" "VCMPFALSE_OSSS\0" \ -"\x0c" "VCMPNEQ_OSSS\0" "\x0b" "VCMPGE_OQSS\0" "\x0b" "VCMPGT_OQSS\0" "\x0d" "VCMPTRUE_USSS\0" \ -"\x08" "VCMPEQSD\0" "\x08" "VCMPLTSD\0" "\x08" "VCMPLESD\0" "\x0b" "VCMPUNORDSD\0" \ -"\x09" "VCMPNEQSD\0" "\x09" "VCMPNLTSD\0" "\x09" "VCMPNLESD\0" "\x09" "VCMPORDSD\0" \ -"\x0b" "VCMPEQ_UQSD\0" "\x09" "VCMPNGESD\0" "\x09" "VCMPNGTSD\0" "\x0b" "VCMPFALSESD\0" \ -"\x0c" "VCMPNEQ_OQSD\0" "\x08" "VCMPGESD\0" "\x08" "VCMPGTSD\0" "\x0a" "VCMPTRUESD\0" \ -"\x0b" "VCMPEQ_OSSD\0" "\x0b" "VCMPLT_OQSD\0" "\x0b" "VCMPLE_OQSD\0" "\x0d" "VCMPUNORD_SSD\0" \ -"\x0c" "VCMPNEQ_USSD\0" "\x0c" "VCMPNLT_UQSD\0" "\x0c" "VCMPNLE_UQSD\0" "\x0b" "VCMPORD_SSD\0" \ -"\x0b" "VCMPEQ_USSD\0" "\x0c" "VCMPNGE_UQSD\0" "\x0c" "VCMPNGT_UQSD\0" "\x0e" "VCMPFALSE_OSSD\0" \ -"\x0c" "VCMPNEQ_OSSD\0" "\x0b" "VCMPGE_OQSD\0" "\x0b" "VCMPGT_OQSD\0" "\x0d" "VCMPTRUE_USSD\0" \ -"\x06" "PINSRW\0" "\x07" "VPINSRW\0" "\x06" "PEXTRW\0" "\x07" "VPEXTRW\0" "\x06" "SHUFPS\0" \ -"\x06" "SHUFPD\0" "\x07" "VSHUFPS\0" "\x07" "VSHUFPD\0" "\x09" "CMPXCHG8B\0" \ -"\x0a" "CMPXCHG16B\0" "\x07" "VMPTRST\0" "\x08" "ADDSUBPD\0" "\x08" "ADDSUBPS\0" \ -"\x09" "VADDSUBPD\0" "\x09" "VADDSUBPS\0" "\x05" "PSRLW\0" "\x06" "VPSRLW\0" \ -"\x05" "PSRLD\0" "\x06" "VPSRLD\0" "\x05" "PSRLQ\0" "\x06" "VPSRLQ\0" "\x05" "PADDQ\0" \ -"\x06" "VPADDQ\0" "\x06" "PMULLW\0" "\x07" "VPMULLW\0" "\x07" "MOVQ2DQ\0" "\x07" "MOVDQ2Q\0" \ -"\x08" "PMOVMSKB\0" "\x09" "VPMOVMSKB\0" "\x07" "PSUBUSB\0" "\x08" "VPSUBUSB\0" \ -"\x07" "PSUBUSW\0" "\x08" "VPSUBUSW\0" "\x06" "PMINUB\0" "\x07" "VPMINUB\0" \ -"\x04" "PAND\0" "\x05" "VPAND\0" "\x07" "PADDUSB\0" "\x08" "VPADDUSW\0" "\x07" "PADDUSW\0" \ -"\x06" "PMAXUB\0" "\x07" "VPMAXUB\0" "\x05" "PANDN\0" "\x06" "VPANDN\0" "\x05" "PAVGB\0" \ -"\x06" "VPAVGB\0" "\x05" "PSRAW\0" "\x06" "VPSRAW\0" "\x05" "PSRAD\0" "\x06" "VPSRAD\0" \ -"\x05" "PAVGW\0" "\x06" "VPAVGW\0" "\x07" "PMULHUW\0" "\x08" "VPMULHUW\0" "\x06" "PMULHW\0" \ -"\x07" "VPMULHW\0" "\x09" "CVTTPD2DQ\0" "\x08" "CVTDQ2PD\0" "\x08" "CVTPD2DQ\0" \ -"\x0a" "VCVTTPD2DQ\0" "\x09" "VCVTDQ2PD\0" "\x09" "VCVTPD2DQ\0" "\x06" "MOVNTQ\0" \ -"\x07" "MOVNTDQ\0" "\x08" "VMOVNTDQ\0" "\x06" "PSUBSB\0" "\x07" "VPSUBSB\0" \ -"\x06" "PSUBSW\0" "\x07" "VPSUBSW\0" "\x06" "PMINSW\0" "\x07" "VPMINSW\0" "\x03" "POR\0" \ -"\x04" "VPOR\0" "\x06" "PADDSB\0" "\x07" "VPADDSB\0" "\x06" "PADDSW\0" "\x07" "VPADDSW\0" \ -"\x06" "PMAXSW\0" "\x07" "VPMAXSW\0" "\x04" "PXOR\0" "\x05" "VPXOR\0" "\x05" "LDDQU\0" \ -"\x06" "VLDDQU\0" "\x05" "PSLLW\0" "\x06" "VPSLLW\0" "\x05" "PSLLD\0" "\x06" "VPSLLD\0" \ -"\x05" "PSLLQ\0" "\x06" "VPSLLQ\0" "\x07" "PMULUDQ\0" "\x08" "VPMULUDQ\0" "\x07" "PMADDWD\0" \ -"\x08" "VPMADDWD\0" "\x06" "PSADBW\0" "\x07" "VPSADBW\0" "\x08" "MASKMOVQ\0" \ -"\x0a" "MASKMOVDQU\0" "\x0b" "VMASKMOVDQU\0" "\x05" "PSUBB\0" "\x06" "VPSUBB\0" \ -"\x05" "PSUBW\0" "\x06" "VPSUBW\0" "\x05" "PSUBD\0" "\x06" "VPSUBD\0" "\x05" "PSUBQ\0" \ -"\x06" "VPSUBQ\0" "\x05" "PADDB\0" "\x06" "VPADDB\0" "\x05" "PADDW\0" "\x06" "VPADDW\0" \ -"\x05" "PADDD\0" "\x06" "VPADDD\0" "\x07" "FNSTENV\0" "\x06" "FSTENV\0" "\x06" "FNSTCW\0" \ -"\x05" "FSTCW\0" "\x06" "FNCLEX\0" "\x05" "FCLEX\0" "\x06" "FNINIT\0" "\x05" "FINIT\0" \ -"\x06" "FNSAVE\0" "\x05" "FSAVE\0" "\x06" "FNSTSW\0" "\x05" "FSTSW\0" "\x06" "PSHUFB\0" \ -"\x07" "VPSHUFB\0" "\x06" "PHADDW\0" "\x07" "VPHADDW\0" "\x06" "PHADDD\0" "\x07" "VPHADDD\0" \ -"\x07" "PHADDSW\0" "\x08" "VPHADDSW\0" "\x09" "PMADDUBSW\0" "\x0a" "VPMADDUBSW\0" \ -"\x06" "PHSUBW\0" "\x07" "VPHSUBW\0" "\x06" "PHSUBD\0" "\x07" "VPHSUBD\0" "\x07" "PHSUBSW\0" \ -"\x08" "VPHSUBSW\0" "\x06" "PSIGNB\0" "\x07" "VPSIGNB\0" "\x06" "PSIGNW\0" \ -"\x07" "VPSIGNW\0" "\x06" "PSIGND\0" "\x07" "VPSIGND\0" "\x08" "PMULHRSW\0" \ -"\x09" "VPMULHRSW\0" "\x09" "VPERMILPS\0" "\x09" "VPERMILPD\0" "\x07" "VTESTPS\0" \ -"\x07" "VTESTPD\0" "\x08" "PBLENDVB\0" "\x08" "BLENDVPS\0" "\x08" "BLENDVPD\0" \ -"\x05" "PTEST\0" "\x06" "VPTEST\0" "\x0c" "VBROADCASTSS\0" "\x0c" "VBROADCASTSD\0" \ -"\x0e" "VBROADCASTF128\0" "\x05" "PABSB\0" "\x06" "VPABSB\0" "\x05" "PABSW\0" \ -"\x06" "VPABSW\0" "\x05" "PABSD\0" "\x06" "VPABSD\0" "\x08" "PMOVSXBW\0" "\x09" "VPMOVSXBW\0" \ -"\x08" "PMOVSXBD\0" "\x09" "VPMOVSXBD\0" "\x08" "PMOVSXBQ\0" "\x09" "VPMOVSXBQ\0" \ -"\x08" "PMOVSXWD\0" "\x09" "VPMOVSXWD\0" "\x08" "PMOVSXWQ\0" "\x09" "VPMOVSXWQ\0" \ -"\x08" "PMOVSXDQ\0" "\x09" "VPMOVSXDQ\0" "\x06" "PMULDQ\0" "\x07" "VPMULDQ\0" \ -"\x07" "PCMPEQQ\0" "\x08" "VPCMPEQQ\0" "\x08" "MOVNTDQA\0" "\x09" "VMOVNTDQA\0" \ -"\x08" "PACKUSDW\0" "\x09" "VPACKUSDW\0" "\x0a" "VMASKMOVPS\0" "\x0a" "VMASKMOVPD\0" \ -"\x08" "PMOVZXBW\0" "\x09" "VPMOVZXBW\0" "\x08" "PMOVZXBD\0" "\x09" "VPMOVZXBD\0" \ -"\x08" "PMOVZXBQ\0" "\x09" "VPMOVZXBQ\0" "\x08" "PMOVZXWD\0" "\x09" "VPMOVZXWD\0" \ -"\x08" "PMOVZXWQ\0" "\x09" "VPMOVZXWQ\0" "\x08" "PMOVZXDQ\0" "\x09" "VPMOVZXDQ\0" \ -"\x07" "PCMPGTQ\0" "\x08" "VPCMPGTQ\0" "\x06" "PMINSB\0" "\x07" "VPMINSB\0" \ -"\x06" "PMINSD\0" "\x07" "VPMINSD\0" "\x06" "PMINUW\0" "\x07" "VPMINUW\0" "\x06" "PMINUD\0" \ -"\x07" "VPMINUD\0" "\x06" "PMAXSB\0" "\x07" "VPMAXSB\0" "\x06" "PMAXSD\0" "\x07" "VPMAXSD\0" \ -"\x06" "PMAXUW\0" "\x07" "VPMAXUW\0" "\x06" "PMAXUD\0" "\x07" "VPMAXUD\0" "\x06" "PMULLD\0" \ -"\x07" "VPMULLD\0" "\x0a" "PHMINPOSUW\0" "\x0b" "VPHMINPOSUW\0" "\x06" "INVEPT\0" \ -"\x07" "INVVPID\0" "\x07" "INVPCID\0" "\x0e" "VFMADDSUB132PS\0" "\x0e" "VFMADDSUB132PD\0" \ -"\x0e" "VFMSUBADD132PS\0" "\x0e" "VFMSUBADD132PD\0" "\x0b" "VFMADD132PS\0" \ -"\x0b" "VFMADD132PD\0" "\x0b" "VFMADD132SS\0" "\x0b" "VFMADD132SD\0" "\x0b" "VFMSUB132PS\0" \ -"\x0b" "VFMSUB132PD\0" "\x0b" "VFMSUB132SS\0" "\x0b" "VFMSUB132SD\0" "\x0c" "VFNMADD132PS\0" \ -"\x0c" "VFNMADD132PD\0" "\x0c" "VFNMADD132SS\0" "\x0c" "VFNMADD132SD\0" "\x0c" "VFNMSUB132PS\0" \ -"\x0c" "VFNMSUB132PD\0" "\x0c" "VFNMSUB132SS\0" "\x0c" "VFNMSUB132SD\0" "\x0e" "VFMADDSUB213PS\0" \ -"\x0e" "VFMADDSUB213PD\0" "\x0e" "VFMSUBADD213PS\0" "\x0e" "VFMSUBADD213PD\0" \ -"\x0b" "VFMADD213PS\0" "\x0b" "VFMADD213PD\0" "\x0b" "VFMADD213SS\0" "\x0b" "VFMADD213SD\0" \ -"\x0b" "VFMSUB213PS\0" "\x0b" "VFMSUB213PD\0" "\x0b" "VFMSUB213SS\0" "\x0b" "VFMSUB213SD\0" \ -"\x0c" "VFNMADD213PS\0" "\x0c" "VFNMADD213PD\0" "\x0c" "VFNMADD213SS\0" "\x0c" "VFNMADD213SD\0" \ -"\x0c" "VFNMSUB213PS\0" "\x0c" "VFNMSUB213PD\0" "\x0c" "VFNMSUB213SS\0" "\x0c" "VFNMSUB213SD\0" \ -"\x0e" "VFMADDSUB231PS\0" "\x0e" "VFMADDSUB231PD\0" "\x0e" "VFMSUBADD231PS\0" \ -"\x0e" "VFMSUBADD231PD\0" "\x0b" "VFMADD231PS\0" "\x0b" "VFMADD231PD\0" "\x0b" "VFMADD231SS\0" \ -"\x0b" "VFMADD231SD\0" "\x0b" "VFMSUB231PS\0" "\x0b" "VFMSUB231PD\0" "\x0b" "VFMSUB231SS\0" \ -"\x0b" "VFMSUB231SD\0" "\x0c" "VFNMADD231PS\0" "\x0c" "VFNMADD231PD\0" "\x0c" "VFNMADD231SS\0" \ -"\x0c" "VFNMADD231SD\0" "\x0c" "VFNMSUB231PS\0" "\x0c" "VFNMSUB231PD\0" "\x0c" "VFNMSUB231SS\0" \ -"\x0c" "VFNMSUB231SD\0" "\x06" "AESIMC\0" "\x07" "VAESIMC\0" "\x06" "AESENC\0" \ -"\x07" "VAESENC\0" "\x0a" "AESENCLAST\0" "\x0b" "VAESENCLAST\0" "\x06" "AESDEC\0" \ -"\x07" "VAESDEC\0" "\x0a" "AESDECLAST\0" "\x0b" "VAESDECLAST\0" "\x05" "MOVBE\0" \ -"\x05" "CRC32\0" "\x0a" "VPERM2F128\0" "\x07" "ROUNDPS\0" "\x08" "VROUNDPS\0" \ -"\x07" "ROUNDPD\0" "\x08" "VROUNDPD\0" "\x07" "ROUNDSS\0" "\x08" "VROUNDSS\0" \ -"\x07" "ROUNDSD\0" "\x08" "VROUNDSD\0" "\x07" "BLENDPS\0" "\x08" "VBLENDPS\0" \ -"\x07" "BLENDPD\0" "\x08" "VBLENDPD\0" "\x07" "PBLENDW\0" "\x08" "VPBLENDW\0" \ -"\x07" "PALIGNR\0" "\x08" "VPALIGNR\0" "\x06" "PEXTRB\0" "\x07" "VPEXTRB\0" \ -"\x06" "PEXTRD\0" "\x06" "PEXTRQ\0" "\x07" "VPEXTRD\0" "\x07" "VPEXTRQ\0" "\x09" "EXTRACTPS\0" \ -"\x0a" "VEXTRACTPS\0" "\x0b" "VINSERTF128\0" "\x0c" "VEXTRACTF128\0" "\x06" "PINSRB\0" \ -"\x07" "VPINSRB\0" "\x08" "INSERTPS\0" "\x09" "VINSERTPS\0" "\x06" "PINSRD\0" \ -"\x06" "PINSRQ\0" "\x07" "VPINSRD\0" "\x07" "VPINSRQ\0" "\x04" "DPPS\0" "\x05" "VDPPS\0" \ -"\x04" "DPPD\0" "\x05" "VDPPD\0" "\x07" "MPSADBW\0" "\x08" "VMPSADBW\0" "\x09" "PCLMULQDQ\0" \ -"\x0a" "VPCLMULQDQ\0" "\x09" "VBLENDVPS\0" "\x09" "VBLENDVPD\0" "\x09" "VPBLENDVB\0" \ -"\x09" "PCMPESTRM\0" "\x0a" "VPCMPESTRM\0" "\x09" "PCMPESTRI\0" "\x0a" "VPCMPESTRI\0" \ -"\x09" "PCMPISTRM\0" "\x0a" "VPCMPISTRM\0" "\x09" "PCMPISTRI\0" "\x0a" "VPCMPISTRI\0" \ -"\x0f" "AESKEYGENASSIST\0" "\x10" "VAESKEYGENASSIST\0" "\x06" "PSRLDQ\0" "\x07" "VPSRLDQ\0" \ -"\x06" "PSLLDQ\0" "\x07" "VPSLLDQ\0" "\x06" "FXSAVE\0" "\x08" "FXSAVE64\0" \ -"\x08" "RDFSBASE\0" "\x07" "FXRSTOR\0" "\x09" "FXRSTOR64\0" "\x08" "RDGSBASE\0" \ -"\x07" "LDMXCSR\0" "\x08" "WRFSBASE\0" "\x08" "VLDMXCSR\0" "\x07" "STMXCSR\0" \ -"\x08" "WRGSBASE\0" "\x08" "VSTMXCSR\0" "\x07" "VMPTRLD\0" "\x07" "VMCLEAR\0" \ -"\x05" "VMXON\0" "\x06" "MOVSXD\0" "\x05" "PAUSE\0" "\x04" "WAIT\0" "\x06" "RDRAND\0" \ -"\x06" "_3DNOW\0"; - -const _WRegister _REGISTERS[] = { - {3, "RAX"}, {3, "RCX"}, {3, "RDX"}, {3, "RBX"}, {3, "RSP"}, {3, "RBP"}, {3, "RSI"}, {3, "RDI"}, {2, "R8"}, {2, "R9"}, {3, "R10"}, {3, "R11"}, {3, "R12"}, {3, "R13"}, {3, "R14"}, {3, "R15"}, - {3, "EAX"}, {3, "ECX"}, {3, "EDX"}, {3, "EBX"}, {3, "ESP"}, {3, "EBP"}, {3, "ESI"}, {3, "EDI"}, {3, "R8D"}, {3, "R9D"}, {4, "R10D"}, {4, "R11D"}, {4, "R12D"}, {4, "R13D"}, {4, "R14D"}, {4, "R15D"}, - {2, "AX"}, {2, "CX"}, {2, "DX"}, {2, "BX"}, {2, "SP"}, {2, "BP"}, {2, "SI"}, {2, "DI"}, {3, "R8W"}, {3, "R9W"}, {4, "R10W"}, {4, "R11W"}, {4, "R12W"}, {4, "R13W"}, {4, "R14W"}, {4, "R15W"}, - {2, "AL"}, {2, "CL"}, {2, "DL"}, {2, "BL"}, {2, "AH"}, {2, "CH"}, {2, "DH"}, {2, "BH"}, {3, "R8B"}, {3, "R9B"}, {4, "R10B"}, {4, "R11B"}, {4, "R12B"}, {4, "R13B"}, {4, "R14B"}, {4, "R15B"}, - {3, "SPL"}, {3, "BPL"}, {3, "SIL"}, {3, "DIL"}, - {2, "ES"}, {2, "CS"}, {2, "SS"}, {2, "DS"}, {2, "FS"}, {2, "GS"}, - {3, "RIP"}, - {3, "ST0"}, {3, "ST1"}, {3, "ST2"}, {3, "ST3"}, {3, "ST4"}, {3, "ST5"}, {3, "ST6"}, {3, "ST7"}, - {3, "MM0"}, {3, "MM1"}, {3, "MM2"}, {3, "MM3"}, {3, "MM4"}, {3, "MM5"}, {3, "MM6"}, {3, "MM7"}, - {4, "XMM0"}, {4, "XMM1"}, {4, "XMM2"}, {4, "XMM3"}, {4, "XMM4"}, {4, "XMM5"}, {4, "XMM6"}, {4, "XMM7"}, {4, "XMM8"}, {4, "XMM9"}, {5, "XMM10"}, {5, "XMM11"}, {5, "XMM12"}, {5, "XMM13"}, {5, "XMM14"}, {5, "XMM15"}, - {4, "YMM0"}, {4, "YMM1"}, {4, "YMM2"}, {4, "YMM3"}, {4, "YMM4"}, {4, "YMM5"}, {4, "YMM6"}, {4, "YMM7"}, {4, "YMM8"}, {4, "YMM9"}, {5, "YMM10"}, {5, "YMM11"}, {5, "YMM12"}, {5, "YMM13"}, {5, "YMM14"}, {5, "YMM15"}, - {3, "CR0"}, {0, ""}, {3, "CR2"}, {3, "CR3"}, {3, "CR4"}, {0, ""}, {0, ""}, {0, ""}, {3, "CR8"}, - {3, "DR0"}, {3, "DR1"}, {3, "DR2"}, {3, "DR3"}, {0, ""}, {0, ""}, {3, "DR6"}, {3, "DR7"} -}; - -#endif /* DISTORM_LIGHT */ diff --git a/diStorm/src/operands.c b/diStorm/src/operands.c deleted file mode 100644 index e1f0215..0000000 --- a/diStorm/src/operands.c +++ /dev/null @@ -1,1302 +0,0 @@ -/* -operands.c - -diStorm3 - Powerful disassembler for X86/AMD64 -http://ragestorm.net/distorm/ -distorm at gmail dot com -Copyright (C) 2003-2012 Gil Dabah - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see -*/ - - -#include "config.h" -#include "operands.h" -#include "x86defs.h" -#include "insts.h" -#include "../include/mnemonics.h" - - -/* Maps a register to its register-class mask. */ -uint32_t _REGISTERTORCLASS[] = /* Based on _RegisterType enumeration! */ -{RM_AX, RM_CX, RM_DX, RM_BX, RM_SP, RM_BP, RM_SI, RM_DI, RM_R8, RM_R9, RM_R10, RM_R11, RM_R12, RM_R13, RM_R14, RM_R15, - RM_AX, RM_CX, RM_DX, RM_BX, RM_SP, RM_BP, RM_SI, RM_DI, RM_R8, RM_R9, RM_R10, RM_R11, RM_R12, RM_R13, RM_R14, RM_R15, - RM_AX, RM_CX, RM_DX, RM_BX, RM_SP, RM_BP, RM_SI, RM_DI, RM_R8, RM_R9, RM_R10, RM_R11, RM_R12, RM_R13, RM_R14, RM_R15, - RM_AX, RM_CX, RM_DX, RM_BX, RM_AX, RM_CX, RM_DX, RM_BX, RM_R8, RM_R9, RM_R10, RM_R11, RM_R12, RM_R13, RM_R14, RM_R15, - RM_SP, RM_BP, RM_SI, RM_DI, - 0, 0, 0, 0, 0, 0, - 0, - RM_FPU, RM_FPU, RM_FPU, RM_FPU, RM_FPU, RM_FPU, RM_FPU, RM_FPU, - RM_MMX, RM_MMX, RM_MMX, RM_MMX, RM_MMX, RM_MMX, RM_MMX, RM_MMX, - RM_SSE, RM_SSE, RM_SSE, RM_SSE, RM_SSE, RM_SSE, RM_SSE, RM_SSE, RM_SSE, RM_SSE, RM_SSE, RM_SSE, RM_SSE, RM_SSE, RM_SSE, RM_SSE, - RM_AVX, RM_AVX, RM_AVX, RM_AVX, RM_AVX, RM_AVX, RM_AVX, RM_AVX, RM_AVX, RM_AVX, RM_AVX, RM_AVX, RM_AVX, RM_AVX, RM_AVX, RM_AVX, - RM_CR, 0, RM_CR, RM_CR, RM_CR, 0, 0, 0, RM_CR, - RM_DR, RM_DR, RM_DR, RM_DR, 0, 0, RM_DR, RM_DR -}; - -typedef enum {OPERAND_SIZE_NONE = 0, OPERAND_SIZE8, OPERAND_SIZE16, OPERAND_SIZE32, OPERAND_SIZE64, OPERAND_SIZE80, OPERAND_SIZE128, OPERAND_SIZE256} _OperandSizeType; -static uint16_t _OPSIZETOINT[] = {0, 8, 16, 32, 64, 80, 128, 256}; - -/* A helper function to fix the 8 bits register if REX is used (to support SIL, DIL, etc). */ -static unsigned int _FASTCALL_ operands_fix_8bit_rex_base(unsigned int reg) -{ - if ((reg >= 4) && (reg < 8)) return reg + REGS8_REX_BASE - 4; - return reg + REGS8_BASE; -} - -/* A helper function to set operand's type and size. */ -static void _FASTCALL_ operands_set_ts(_Operand* op, _OperandType type, uint16_t size) -{ - op->type = type; - op->size = size; -} - -/* A helper function to set operand's type, size and index. */ -static void _FASTCALL_ operands_set_tsi(_Operand* op, _OperandType type, uint16_t size, unsigned int index) -{ - op->type = type; - op->index = (uint8_t)index; - op->size = size; -} - -/* A helper function to read an unsigned integer from the stream safely. */ -static int _FASTCALL_ read_stream_safe_uint(_CodeInfo* ci, void* result, unsigned int size) -{ - ci->codeLen -= size; - if (ci->codeLen < 0) return FALSE; - switch (size) - { - case 1: *(uint8_t*)result = *(uint8_t*)ci->code; break; - case 2: *(uint16_t*)result = RUSHORT(ci->code); break; - case 4: *(uint32_t*)result = RULONG(ci->code); break; - case 8: *(uint64_t*)result = RULLONG(ci->code); break; - } - ci->code += size; - return TRUE; -} - -/* A helper function to read a signed integer from the stream safely. */ -static int _FASTCALL_ read_stream_safe_sint(_CodeInfo* ci, int64_t* result, unsigned int size) -{ - ci->codeLen -= size; - if (ci->codeLen < 0) return FALSE; - switch (size) - { - case 1: *result = *(int8_t*)ci->code; break; - case 2: *result = RSHORT(ci->code); break; - case 4: *result = RLONG(ci->code); break; - case 8: *result = RLLONG(ci->code); break; - } - ci->code += size; - return TRUE; -} - -/* - * SIB decoding is the most confusing part when decoding IA-32 instructions. - * This explanation should clear up some stuff. - * - * ! When base == 5, use EBP as the base register ! - * if (rm == 4) { - * if mod == 01, decode SIB byte and ALSO read a 8 bits displacement. - * if mod == 10, decode SIB byte and ALSO read a 32 bits displacement. - * if mod == 11 <-- EXCEPTION, this is a general-purpose register and mustn't lead to SIB decoding! - * ; So far so good, now the confusing part comes in with mod == 0 and base=5, but no worry. - * if (mod == 00) { - * decode SIB byte WITHOUT any displacement. - * EXCEPTION!!! when base == 5, read a 32 bits displacement, but this time DO NOT use (EBP) BASE at all! - * } - * - * NOTE: base could specify None (no base register) if base==5 and mod==0, but then you also need DISP32. - * } - */ -static void operands_extract_sib(_DInst* di, _OperandNumberType opNum, - _PrefixState* ps, _DecodeType effAdrSz, - unsigned int sib, unsigned int mod) -{ - unsigned int scale = 0, index = 0, base = 0; - unsigned int vrex = ps->vrex; - uint8_t* pIndex = NULL; - - _Operand* op = &di->ops[opNum]; - - /* - * SIB bits: - * |7---6-5----3-2---0| - * |SCALE| INDEX| BASE| - * |------------------| - */ - scale = (sib >> 6) & 3; - index = (sib >> 3) & 7; - base = sib & 7; - - /* - * The following fields: base/index/scale/disp8/32 are ALL optional by specific rules! - * The idea here is to keep the indirection as a simple-memory type. - * Because the base is optional, and we might be left with only one index. - * So even if there's a base but no index, or vice versa, we end up with one index register. - */ - - /* In 64 bits the REX prefix might affect the index of the SIB byte. */ - if (vrex & PREFIX_EX_X) { - ps->usedPrefixes |= INST_PRE_REX; - index += EX_GPR_BASE; - } - - if (index == 4) { /* No index is used. Use SMEM. */ - op->type = O_SMEM; - pIndex = &op->index; - } else { - op->type = O_MEM; - pIndex = &di->base; - /* No base, unless it is updated below. E.G: [EAX*4] has no base reg. */ - } - - if (base != 5) { - if (vrex & PREFIX_EX_B) ps->usedPrefixes |= INST_PRE_REX; - *pIndex = effAdrSz == Decode64Bits ? REGS64_BASE : REGS32_BASE; - *pIndex += (uint8_t)(base + ((vrex & PREFIX_EX_B) ? EX_GPR_BASE : 0)); - } else if (mod != 0) { - /* - * if base == 5 then you have to decode according to MOD. - * mod(00) - disp32. - * mod(01) - disp8 + rBP - * mod(10) - disp32 + rBP - * mod(11) - not possible, it's a general-purpose register. - */ - - if (vrex & PREFIX_EX_B) ps->usedPrefixes |= INST_PRE_REX; - if (effAdrSz == Decode64Bits) *pIndex = REGS64_BASE + 5 + ((vrex & PREFIX_EX_B) ? EX_GPR_BASE : 0); - else *pIndex = REGS32_BASE + 5 + ((vrex & PREFIX_EX_B) ? EX_GPR_BASE : 0); - } else if (index == 4) { - /* 32bits displacement only. */ - op->type = O_DISP; - return; - } - - if (index != 4) { /* In 64 bits decoding mode, if index == R12, it's valid! */ - if (effAdrSz == Decode64Bits) op->index = (uint8_t)(REGS64_BASE + index); - else op->index = (uint8_t)(REGS32_BASE + index); - di->scale = scale != 0 ? (1 << scale) : 0; - } -} - -/* - * This seems to be the hardest part in decoding the operands. - * If you take a look carefully at Table 2-2. 32-Bit Addressing Forms with the ModR/M Byte, - * you will understand it's easy to decode the operands. - - * First we check the DT, so we can decide according to which Table in the documentation we are supposed to decode. - * Then we follow the specific table whether it's 16 bits or 32/64 bits. - - * Don't forget that Operand Size AND Address Size prefixes may change the decoding! - - * Some instructions force the use of RM16 or other specific types, so take it into account. - */ -static int operands_extract_modrm(_CodeInfo* ci, - _DInst* di, _OpType type, - _OperandNumberType opNum, _PrefixState* ps, - _DecodeType effOpSz, _DecodeType effAdrSz, - int* lockableInstruction, unsigned int mod, unsigned int rm, - _iflags instFlags) -{ - unsigned int vrex = ps->vrex, sib = 0, base = 0; - _Operand* op = &di->ops[opNum]; - uint16_t size = 0; - - if (mod == 3) { - /* - * General-purpose register is handled the same way in 16/32/64 bits decoding modes. - * NOTE!! that we have to override the size of the register, since it was set earlier as Memory and not Register! - */ - op->type = O_REG; - /* Start with original size which was set earlier, some registers have same size of memory and depend on it. */ - size = op->size; - switch(type) - { - case OT_RFULL_M16: - case OT_RM_FULL: - switch (effOpSz) - { - case Decode16Bits: - ps->usedPrefixes |= INST_PRE_OP_SIZE; - if (vrex & PREFIX_EX_B) { - ps->usedPrefixes |= INST_PRE_REX; - rm += EX_GPR_BASE; - } - size = 16; - rm += REGS16_BASE; - break; - case Decode32Bits: - ps->usedPrefixes |= INST_PRE_OP_SIZE; - if (vrex & PREFIX_EX_B) { - ps->usedPrefixes |= INST_PRE_REX; - rm += EX_GPR_BASE; - } - size = 32; - rm += REGS32_BASE; - break; - case Decode64Bits: - /* A fix for SMSW RAX which use the REX prefix. */ - if (type == OT_RFULL_M16) ps->usedPrefixes |= INST_PRE_REX; - /* CALL NEAR/PUSH/POP defaults to 64 bits. --> INST_64BITS, REX isn't required, thus ignored anyways. */ - if (instFlags & INST_PRE_REX) ps->usedPrefixes |= INST_PRE_REX; - /* Include REX if used for REX.B. */ - if (vrex & PREFIX_EX_B) { - ps->usedPrefixes |= INST_PRE_REX; - rm += EX_GPR_BASE; - } - size = 64; - rm += REGS64_BASE; - break; - } - break; - case OT_R32_64_M8: - /* FALL THROUGH, decode 32 or 64 bits register. */ - case OT_R32_64_M16: - /* FALL THROUGH, decode 32 or 64 bits register. */ - case OT_RM32_64: /* Take care specifically in MOVNTI/MOVD/CVT's instructions, making it _REG64 with REX or if they are promoted. */ - if (vrex & PREFIX_EX_B) { - ps->usedPrefixes |= INST_PRE_REX; - rm += EX_GPR_BASE; - } - /* Is it a promoted instruction? (only INST_64BITS is set and REX isn't required.) */ - if ((ci->dt == Decode64Bits) && ((instFlags & (INST_64BITS | INST_PRE_REX)) == INST_64BITS)) { - size = 64; - rm += REGS64_BASE; - break; - } - /* Give a chance to REX.W. Because if it was a promoted instruction we don't care about REX.W anyways. */ - if (vrex & PREFIX_EX_W) { - ps->usedPrefixes |= INST_PRE_REX; - size = 64; - rm += REGS64_BASE; - } else { - size = 32; - rm += REGS32_BASE; - } - break; - case OT_RM16_32: /* Used only with MOVZXD instruction to support 16 bits operand. */ - if (vrex & PREFIX_EX_B) { - ps->usedPrefixes |= INST_PRE_REX; - rm += EX_GPR_BASE; - } - /* Is it 16 bits operand size? */ - if (ps->decodedPrefixes & INST_PRE_OP_SIZE) { - ps->usedPrefixes |= INST_PRE_OP_SIZE; - size = 16; - rm += REGS16_BASE; - } else { - size = 32; - rm += REGS32_BASE; - } - break; - case OT_RM16: - if (vrex & PREFIX_EX_B) { - ps->usedPrefixes |= INST_PRE_REX; - rm += EX_GPR_BASE; - } - rm += REGS16_BASE; - break; - case OT_RM8: - if (ps->prefixExtType == PET_REX) { - ps->usedPrefixes |= INST_PRE_REX; - rm = operands_fix_8bit_rex_base(rm + ((vrex & PREFIX_EX_B) ? EX_GPR_BASE : 0)); - } else rm += REGS8_BASE; - break; - case OT_MM32: - case OT_MM64: - /* MMX doesn't support extended registers. */ - size = 64; - rm += MMXREGS_BASE; - break; - - case OT_XMM16: - case OT_XMM32: - case OT_XMM64: - case OT_XMM128: - if (vrex & PREFIX_EX_B) { - ps->usedPrefixes |= INST_PRE_REX; - rm += EX_GPR_BASE; - } - size = 128; - rm += SSEREGS_BASE; - break; - - case OT_RM32: - case OT_R32_M8: - case OT_R32_M16: - if (vrex & PREFIX_EX_B) { - ps->usedPrefixes |= INST_PRE_REX; - rm += EX_GPR_BASE; - } - size = 32; - rm += REGS32_BASE; - break; - - case OT_YMM256: - if (vrex & PREFIX_EX_B) rm += EX_GPR_BASE; - rm += AVXREGS_BASE; - break; - case OT_YXMM64_256: - case OT_YXMM128_256: - if (vrex & PREFIX_EX_B) rm += EX_GPR_BASE; - if (vrex & PREFIX_EX_L) { - size = 256; - rm += AVXREGS_BASE; - } else { - size = 128; - rm += SSEREGS_BASE; - } - break; - case OT_WXMM32_64: - case OT_LXMM64_128: - if (vrex & PREFIX_EX_B) rm += EX_GPR_BASE; - size = 128; - rm += SSEREGS_BASE; - break; - - case OT_WRM32_64: - case OT_REG32_64_M8: - case OT_REG32_64_M16: - if (vrex & PREFIX_EX_B) rm += EX_GPR_BASE; - if (vrex & PREFIX_EX_W) { - size = 64; - rm += REGS64_BASE; - } else { - size = 32; - rm += REGS32_BASE; - } - break; - - default: return FALSE; - } - op->size = size; - op->index = (uint8_t)rm; - return TRUE; - } - - /* Memory indirection decoding ahead:) */ - - ps->usedPrefixes |= INST_PRE_ADDR_SIZE; - if (lockableInstruction && (ps->decodedPrefixes & INST_PRE_LOCK)) *lockableInstruction = TRUE; - - if (effAdrSz == Decode16Bits) { - /* Decoding according to Table 2-1. (16 bits) */ - if ((mod == 0) && (rm == 6)) { - /* 6 is a special case - only 16 bits displacement. */ - op->type = O_DISP; - di->dispSize = 16; - if (!read_stream_safe_sint(ci, (int64_t*)&di->disp, sizeof(int16_t))) return FALSE; - } else { - /* - * Create the O_MEM for 16 bits indirection that requires 2 registers, E.G: [BS+SI]. - * or create O_SMEM for a single register indirection, E.G: [BP]. - */ - static uint8_t MODS[] = {R_BX, R_BX, R_BP, R_BP, R_SI, R_DI, R_BP, R_BX}; - static uint8_t MODS2[] = {R_SI, R_DI, R_SI, R_DI}; - if (rm < 4) { - op->type = O_MEM; - di->base = MODS[rm]; - op->index = MODS2[rm]; - } else { - op->type = O_SMEM; - op->index = MODS[rm]; - } - - if (mod == 1) { /* 8 bits displacement + indirection */ - di->dispSize = 8; - if (!read_stream_safe_sint(ci, (int64_t*)&di->disp, sizeof(int8_t))) return FALSE; - } else if (mod == 2) { /* 16 bits displacement + indirection */ - di->dispSize = 16; - if (!read_stream_safe_sint(ci, (int64_t*)&di->disp, sizeof(int16_t))) return FALSE; - } - } - - if ((rm == 2) || (rm == 3) || ((rm == 6) && (mod != 0))) { - /* BP's default segment is SS, so ignore it. */ - prefixes_use_segment(INST_PRE_SS, ps, ci->dt, di); - } else { - /* Ignore default DS segment. */ - prefixes_use_segment(INST_PRE_DS, ps, ci->dt, di); - } - } else { /* Decode32Bits or Decode64Bits! */ - /* Remember that from a 32/64 bits ModR/M byte a SIB byte could follow! */ - if ((mod == 0) && (rm == 5)) { - - /* 5 is a special case - only 32 bits displacement, or RIP relative. */ - di->dispSize = 32; - if (!read_stream_safe_sint(ci, (int64_t*)&di->disp, sizeof(int32_t))) return FALSE; - - if (ci->dt == Decode64Bits) { - /* In 64 bits decoding mode depsite of the address size, a RIP-relative address it is. */ - op->type = O_SMEM; - op->index = R_RIP; - di->flags |= FLAG_RIP_RELATIVE; - } else { - /* Absolute address: */ - op->type = O_DISP; - } - } else { - if (rm == 4) { - /* 4 is a special case - SIB byte + disp8/32 follows! */ - /* Read SIB byte. */ - if (!read_stream_safe_uint(ci, &sib, sizeof(int8_t))) return FALSE; - operands_extract_sib(di, opNum, ps, effAdrSz, sib, mod); - } else { - op->type = O_SMEM; - if (vrex & PREFIX_EX_B) { - ps->usedPrefixes |= INST_PRE_REX; - rm += EX_GPR_BASE; - } - - if (effAdrSz == Decode64Bits) op->index = (uint8_t)(REGS64_BASE + rm); - else op->index = (uint8_t)(REGS32_BASE + rm); - } - - if (mod == 1) { - di->dispSize = 8; - if (!read_stream_safe_sint(ci, (int64_t*)&di->disp, sizeof(int8_t))) return FALSE; - } else if ((mod == 2) || ((sib & 7) == 5)) { /* If there is no BASE, read DISP32! */ - di->dispSize = 32; - if (!read_stream_safe_sint(ci, (int64_t*)&di->disp, sizeof(int32_t))) return FALSE; - } - } - - /* Get the base register. */ - base = op->index; - if (di->base != R_NONE) base = di->base; - else if (di->scale >= 2) base = 0; /* If it's only an index but got scale, it's still DS. */ - /* Default for EBP/ESP is SS segment. 64 bits mode ignores DS anyway. */ - if ((base == R_EBP) || (base == R_ESP)) prefixes_use_segment(INST_PRE_SS, ps, ci->dt, di); - else prefixes_use_segment(INST_PRE_DS, ps, ci->dt, di); - } - - return TRUE; -} - - -/* - * This function is reponsible to textually format a required operand according to its type. - * It is vital to understand that there are other operands than what the ModR/M byte specifies. - - * Only by decoding the operands of an instruction which got a LOCK prefix, we could tell whether it may use the LOCK prefix. - * According to Intel, LOCK prefix must precede some specific instructions AND in their memory destination operand form (which means first operand). - * LOCK INC EAX, would generate an exception, but LOCK INC [EAX] is alright. - * Also LOCK ADD BX, [BP] would generate an exception. - - * Return code: - * TRUE - continue parsing the instruction and its operands, everything went right 'till now. - * FALSE - not enough bytes, or invalid operands. - */ - -int operands_extract(_CodeInfo* ci, _DInst* di, _InstInfo* ii, - _iflags instFlags, _OpType type, _OperandNumberType opNum, - unsigned int modrm, _PrefixState* ps, _DecodeType effOpSz, - _DecodeType effAdrSz, int* lockableInstruction) -{ - int ret = 0; - unsigned int mod = 0, reg = 0, rm = 0, vexV = ps->vexV; - unsigned int vrex = ps->vrex, typeHandled = TRUE; - _Operand* op = &di->ops[opNum]; - - /* Used to indicate the size of the MEMORY INDIRECTION only. */ - _OperandSizeType opSize = OPERAND_SIZE_NONE; - - /* - * ModRM bits: - * |7-6-5--------3-2-0| - * |MOD|REG/OPCODE|RM | - * |------------------| - */ - mod = (modrm >> 6) & 3; /* Mode(register-indirection, disp8+reg+indirection, disp16+reg+indirection, general-purpose register) */ - reg = (modrm >> 3) & 7; /* Register(could be part of the opcode itself or general-purpose register) */ - rm = modrm & 7; /* Specifies which general-purpose register or disp+reg to use. */ - - /* -- Memory Indirection Operands (that cannot be a general purpose register) -- */ - switch (type) - { - case OT_MEM64_128: /* Used only by CMPXCHG8/16B. */ - /* Make a specific check when the type is OT_MEM64_128 since the lockable CMPXCHG8B uses this one... */ - if (lockableInstruction && (ps->decodedPrefixes & INST_PRE_LOCK)) *lockableInstruction = TRUE; - if (effOpSz == Decode64Bits) { - ps->usedPrefixes |= INST_PRE_REX; - opSize = OPERAND_SIZE128; - } else opSize = OPERAND_SIZE64; - break; - case OT_MEM32: opSize = OPERAND_SIZE32; break; - case OT_MEM32_64: - /* Used by MOVNTI. Default size is 32bits, 64bits with REX. */ - if (effOpSz == Decode64Bits) { - ps->usedPrefixes |= INST_PRE_REX; - opSize = OPERAND_SIZE64; - } else opSize = OPERAND_SIZE32; - break; - case OT_MEM64: opSize = OPERAND_SIZE64; break; - case OT_MEM128: opSize = OPERAND_SIZE128; break; - case OT_MEM16_FULL: /* The size indicates about the second item of the pair. */ - switch (effOpSz) - { - case Decode16Bits: - ps->usedPrefixes |= INST_PRE_OP_SIZE; - opSize = OPERAND_SIZE16; - break; - case Decode32Bits: - ps->usedPrefixes |= INST_PRE_OP_SIZE; - opSize = OPERAND_SIZE32; - break; - case Decode64Bits: - /* Mark usage of REX only if it was required. */ - if ((instFlags & (INST_64BITS | INST_PRE_REX)) == (INST_64BITS | INST_PRE_REX)) ps->usedPrefixes |= INST_PRE_REX; - opSize = OPERAND_SIZE64; - break; - } - break; - case OT_MEM16_3264: /* The size indicates about the second item of the pair. */ - if (ci->dt == Decode64Bits) opSize = OPERAND_SIZE64; - else opSize = OPERAND_SIZE32; - break; - case OT_MEM_OPT: - /* Since the MEM is optional, only when mod != 3, then return true as if the operand was alright. */ - if (mod == 0x3) return TRUE; - break; - case OT_FPUM16: opSize = OPERAND_SIZE16; break; - case OT_FPUM32: opSize = OPERAND_SIZE32; break; - case OT_FPUM64: opSize = OPERAND_SIZE64; break; - case OT_FPUM80: opSize = OPERAND_SIZE80; break; - case OT_LMEM128_256: - if (vrex & PREFIX_EX_L) opSize = OPERAND_SIZE256; - else opSize = OPERAND_SIZE128; - break; - case OT_MEM: /* Size is unknown, but still handled. */ break; - default: typeHandled = FALSE; break; - } - if (typeHandled) { - /* All of the above types can't use a general-purpose register (a MOD of 3)!. */ - if (mod == 0x3) { - if (lockableInstruction) *lockableInstruction = FALSE; - return FALSE; - } - op->size = _OPSIZETOINT[opSize]; - ret = operands_extract_modrm(ci, di, type, opNum, ps, effOpSz, effAdrSz, lockableInstruction, mod, rm, instFlags); - if ((op->type == O_REG) || (op->type == O_SMEM) || (op->type == O_MEM)) { - di->usedRegistersMask |= _REGISTERTORCLASS[op->index]; - } - return ret; - } - - /* -- Memory Indirection Operands (that can be a register) -- */ - typeHandled = TRUE; - switch (type) - { - case OT_RM_FULL: - ps->usedPrefixes |= INST_PRE_OP_SIZE; - /* PUSH/JMP/CALL are automatically promoted to 64 bits! */ - if (effOpSz == Decode32Bits) { - opSize = OPERAND_SIZE32; - break; - } else if (effOpSz == Decode64Bits) { - /* Mark usage of REX only if it was required. */ - if ((instFlags & INST_64BITS) == 0) ps->usedPrefixes |= INST_PRE_REX; - opSize = OPERAND_SIZE64; - break; - } - /* FALL THROUGH BECAUSE dt==Decoded16Bits @-<----*/ - case OT_RM16: - /* If we got here not from OT_RM16, then the prefix was used. */ - if (type != OT_RM16) ps->usedPrefixes |= INST_PRE_OP_SIZE; - opSize = OPERAND_SIZE16; - break; - case OT_RM32_64: - /* The default size is 32, which can be 64 with a REX only. */ - if (effOpSz == Decode64Bits) { - opSize = OPERAND_SIZE64; - /* Mark REX prefix as used if non-promoted instruction. */ - if ((instFlags & (INST_64BITS | INST_PRE_REX)) == (INST_64BITS | INST_PRE_REX)) { - ps->usedPrefixes |= INST_PRE_REX; - } - } else opSize = OPERAND_SIZE32; - break; - case OT_RM16_32: - /* Ignore REX, it's either 32 or 16 bits RM. */ - if (ps->decodedPrefixes & INST_PRE_OP_SIZE) { - ps->usedPrefixes |= INST_PRE_OP_SIZE; - /* Assume: We are in 64bits when we have this operand used. */ - opSize = OPERAND_SIZE16; - } else opSize = OPERAND_SIZE32; - break; - case OT_WXMM32_64: - case OT_WRM32_64: - if (vrex & PREFIX_EX_W) opSize = OPERAND_SIZE64; - else opSize = OPERAND_SIZE32; - break; - case OT_YXMM64_256: - if (vrex & PREFIX_EX_L) opSize = OPERAND_SIZE256; - else opSize = OPERAND_SIZE64; - break; - case OT_YXMM128_256: - if (vrex & PREFIX_EX_L) opSize = OPERAND_SIZE256; - else opSize = OPERAND_SIZE128; - break; - case OT_LXMM64_128: - if (vrex & PREFIX_EX_L) opSize = OPERAND_SIZE128; - else opSize = OPERAND_SIZE64; - break; - case OT_RFULL_M16: - ps->usedPrefixes |= INST_PRE_OP_SIZE; - opSize = OPERAND_SIZE16; - break; - - case OT_RM8: - case OT_R32_M8: - case OT_R32_64_M8: - case OT_REG32_64_M8: - opSize = OPERAND_SIZE8; - break; - - case OT_XMM16: - case OT_R32_M16: - case OT_R32_64_M16: - case OT_REG32_64_M16: - opSize = OPERAND_SIZE16; - break; - - case OT_RM32: - case OT_MM32: - case OT_XMM32: - opSize = OPERAND_SIZE32; - break; - - case OT_MM64: - case OT_XMM64: - opSize = OPERAND_SIZE64; - break; - - case OT_XMM128: opSize = OPERAND_SIZE128; break; - case OT_YMM256: opSize = OPERAND_SIZE256; break; - default: typeHandled = FALSE; break; - } - if (typeHandled) { - /* Fill size of memory dereference for operand. */ - op->size = _OPSIZETOINT[opSize]; - ret = operands_extract_modrm(ci, di, type, opNum, ps, effOpSz, effAdrSz, lockableInstruction, mod, rm, instFlags); - if ((op->type == O_REG) || (op->type == O_SMEM) || (op->type == O_MEM)) { - di->usedRegistersMask |= _REGISTERTORCLASS[op->index]; - } - return ret; - } - - /* Simple operand type (no ModRM byte). */ - switch (type) - { - case OT_IMM8: - operands_set_ts(op, O_IMM, 8); - if (!read_stream_safe_uint(ci, &di->imm.byte, sizeof(int8_t))) return FALSE; - break; - case OT_IMM_FULL: /* 16, 32 or 64, depends on prefixes. */ - if (effOpSz == Decode16Bits) { - ps->usedPrefixes |= INST_PRE_OP_SIZE; - /* FALL THROUGH */ - case OT_IMM16: /* Force 16 bits imm. */ - operands_set_ts(op, O_IMM, 16); - if (!read_stream_safe_uint(ci, &di->imm.word, sizeof(int16_t))) return FALSE; - break; - /* - * Extension: MOV imm64, requires REX. - * Make sure it needs the REX. - * REX must be present because op size function takes it into consideration. - */ - } else if ((effOpSz == Decode64Bits) && - ((instFlags & (INST_64BITS | INST_PRE_REX)) == (INST_64BITS | INST_PRE_REX))) { - ps->usedPrefixes |= INST_PRE_REX; - - operands_set_ts(op, O_IMM, 64); - if (!read_stream_safe_uint(ci, &di->imm.qword, sizeof(int64_t))) return FALSE; - break; - } else ps->usedPrefixes |= INST_PRE_OP_SIZE; - /* FALL THROUGH BECAUSE dt==Decoded32Bits @-<----*/ - case OT_IMM32: - op->type = O_IMM; - if (ci->dt == Decode64Bits) { - /* - * Imm32 is sign extended to 64 bits! - * Originally the op size was 64, but later was changed to reflect real size of imm. - */ - op->size = 32; - /* Use this as an indicator that it should be signed extended. */ - di->flags |= FLAG_IMM_SIGNED; - if (!read_stream_safe_sint(ci, &di->imm.sqword, sizeof(int32_t))) return FALSE; - } else { - op->size = 32; - if (!read_stream_safe_uint(ci, &di->imm.dword, sizeof(int32_t))) return FALSE; - } - break; - case OT_SEIMM8: /* Sign extended immediate. */ - /* - * PUSH SEIMM8 can be prefixed by operand size: - * Input stream: 66, 6a, 55 - * 64bits DT: push small 55 - * 32bits DT: push small 55 - * 16bits DT: push large 55 - * small/large indicates the size of the eSP pointer advancement. - * Check the instFlags (ii->flags) if it can be operand-size-prefixed and if the prefix exists. - */ - op->type = O_IMM; - if ((instFlags & INST_PRE_OP_SIZE) && (ps->decodedPrefixes & INST_PRE_OP_SIZE)) { - ps->usedPrefixes |= INST_PRE_OP_SIZE; - switch (ci->dt) - { - case Decode16Bits: op->size = 32; break; - case Decode32Bits: - case Decode64Bits: - op->size = 16; - break; - } - } else op->size = 8; - di->flags |= FLAG_IMM_SIGNED; - if (!read_stream_safe_sint(ci, &di->imm.sqword, sizeof(int8_t))) return FALSE; - break; - case OT_IMM16_1: - operands_set_ts(op, O_IMM1, 16); - if (!read_stream_safe_uint(ci, &di->imm.ex.i1, sizeof(int16_t))) return FALSE; - break; - case OT_IMM8_1: - operands_set_ts(op, O_IMM1, 8); - if (!read_stream_safe_uint(ci, &di->imm.ex.i1, sizeof(int8_t))) return FALSE; - break; - case OT_IMM8_2: - operands_set_ts(op, O_IMM2, 8); - if (!read_stream_safe_uint(ci, &di->imm.ex.i2, sizeof(int8_t))) return FALSE; - break; - case OT_REG8: - operands_set_ts(op, O_REG, 8); - if (ps->prefixExtType) { - /* - * If REX prefix is valid then we will have to use low bytes. - * This is a PASSIVE behavior changer of REX prefix, it affects operands even if its value is 0x40 ! - */ - ps->usedPrefixes |= INST_PRE_REX; - op->index = (uint8_t)operands_fix_8bit_rex_base(reg + ((vrex & PREFIX_EX_R) ? EX_GPR_BASE : 0)); - } else op->index = (uint8_t)(REGS8_BASE + reg); - break; - case OT_REG16: - operands_set_tsi(op, O_REG, 16, REGS16_BASE + reg); - break; - case OT_REG_FULL: - switch (effOpSz) - { - case Decode16Bits: - ps->usedPrefixes |= INST_PRE_OP_SIZE; - if (vrex & PREFIX_EX_R) { - ps->usedPrefixes |= INST_PRE_REX; - reg += EX_GPR_BASE; - } - operands_set_tsi(op, O_REG, 16, REGS16_BASE + reg); - break; - case Decode32Bits: - if (vrex & PREFIX_EX_R) { - ps->usedPrefixes |= INST_PRE_REX; - reg += EX_GPR_BASE; - } else ps->usedPrefixes |= INST_PRE_OP_SIZE; - operands_set_tsi(op, O_REG, 32, REGS32_BASE + reg); - break; - case Decode64Bits: /* rex must be presented. */ - ps->usedPrefixes |= INST_PRE_REX; - operands_set_tsi(op, O_REG, 64, REGS64_BASE + reg + ((vrex & PREFIX_EX_R) ? EX_GPR_BASE : 0)); - break; - } - break; - case OT_REG32: - if (vrex & PREFIX_EX_R) { - ps->usedPrefixes |= INST_PRE_REX; - reg += EX_GPR_BASE; - } - operands_set_tsi(op, O_REG, 32, REGS32_BASE + reg); - break; - case OT_REG32_64: /* Handle CVT's, MOVxX and MOVNTI instructions which could be extended to 64 bits registers with REX. */ - if (vrex & PREFIX_EX_R) { - ps->usedPrefixes |= INST_PRE_REX; - reg += EX_GPR_BASE; - } - - /* Is it a promoted instruction? (only INST_64BITS is set and REX isn't required.) */ - if ((ci->dt == Decode64Bits) && ((instFlags & (INST_64BITS | INST_PRE_REX)) == INST_64BITS)) { - operands_set_tsi(op, O_REG, 64, REGS64_BASE + reg); - break; - } - /* Give a chance to REX.W. Because if it was a promoted instruction we don't care about REX.W anyways. */ - if (vrex & PREFIX_EX_W) { - ps->usedPrefixes |= INST_PRE_REX; - operands_set_tsi(op, O_REG, 64, REGS64_BASE + reg); - } else operands_set_tsi(op, O_REG, 32, REGS32_BASE + reg); - break; - case OT_FREG32_64_RM: /* Force decoding mode. Used for MOV CR(n)/DR(n) which defaults to 64 bits operand size in 64 bits. */ - if (vrex & PREFIX_EX_B) { - ps->usedPrefixes |= INST_PRE_REX; - rm += EX_GPR_BASE; - } - - if (ci->dt == Decode64Bits) operands_set_tsi(op, O_REG, 64, REGS64_BASE + rm); - else operands_set_tsi(op, O_REG, 32, REGS32_BASE + rm); - break; - case OT_MM: /* MMX register */ - operands_set_tsi(op, O_REG, 64, MMXREGS_BASE + reg); - break; - case OT_MM_RM: /* MMX register, this time from the RM field */ - operands_set_tsi(op, O_REG, 64, MMXREGS_BASE + rm); - break; - case OT_REGXMM0: /* Implicit XMM0 operand. */ - reg = 0; - vrex = 0; - /* FALL THROUGH */ - case OT_XMM: /* SSE register */ - if (vrex & PREFIX_EX_R) { - ps->usedPrefixes |= INST_PRE_REX; - reg += EX_GPR_BASE; - } - operands_set_tsi(op, O_REG, 128, SSEREGS_BASE + reg); - break; - case OT_XMM_RM: /* SSE register, this time from the RM field */ - if (vrex & PREFIX_EX_B) { - ps->usedPrefixes |= INST_PRE_REX; - rm += EX_GPR_BASE; - } - operands_set_tsi(op, O_REG, 128, SSEREGS_BASE + rm); - break; - case OT_CREG: - /* - * Don't parse if the reg exceeds the bounds of the array. - * Most of the CR's are not implemented, so if there's no matching string, the operand is invalid. - */ - if (vrex & PREFIX_EX_R) { - ps->usedPrefixes |= INST_PRE_REX; - reg += EX_GPR_BASE; - } else if ((ci->dt == Decode32Bits) && (ps->decodedPrefixes & INST_PRE_LOCK)) { - /* - * NOTE: In 32 bits decoding mode, - * if the lock prefix is set before MOV CR(n) it will become the 4th bit of the REG field like REX.R in 64 bits. - */ - reg += EX_GPR_BASE; - ps->usedPrefixes |= INST_PRE_LOCK; - } - /* Ignore some registers which do not exist. */ - if ((reg >= CREGS_MAX) || (reg == 1) || ((reg >= 5) && (reg <= 7))) return FALSE; - - op->type = O_REG; - if (ci->dt == Decode64Bits) op->size = 64; - else op->size = 32; - op->index = (uint8_t)(CREGS_BASE + reg); - break; - case OT_DREG: - /* - * In 64 bits there are 16 debug registers. - * but accessing any of dr8-15 which aren't implemented will cause an #ud. - */ - if ((reg == 4) || (reg == 5) || (vrex & PREFIX_EX_R)) return FALSE; - - op->type = O_REG; - if (ci->dt == Decode64Bits) op->size = 64; - else op->size = 32; - op->index = (uint8_t)(DREGS_BASE + reg); - break; - case OT_SREG: /* Works with REG16 only! */ - /* If lockableInstruction pointer is non-null we know it's the first operand. */ - if (lockableInstruction && (reg == 1)) return FALSE; /* Can't MOV CS, . */ - /*Don't parse if the reg exceeds the bounds of the array. */ - if (reg <= SEG_REGS_MAX - 1) operands_set_tsi(op, O_REG, 16, SREGS_BASE + reg); - else return FALSE; - break; - case OT_SEG: - op->type = O_REG; - /* Size of reg is always 16, it's up to caller to zero extend it to operand size. */ - op->size = 16; - ps->usedPrefixes |= INST_PRE_OP_SIZE; - /* - * Extract the SEG from ii->flags this time!!! - * Check whether an operand size prefix is used. - */ - switch (instFlags & INST_PRE_SEGOVRD_MASK) - { - case INST_PRE_ES: op->index = R_ES; break; - case INST_PRE_CS: op->index = R_CS; break; - case INST_PRE_SS: op->index = R_SS; break; - case INST_PRE_DS: op->index = R_DS; break; - case INST_PRE_FS: op->index = R_FS; break; - case INST_PRE_GS: op->index = R_GS; break; - } - break; - case OT_ACC8: - operands_set_tsi(op, O_REG, 8, R_AL); - break; - case OT_ACC16: - operands_set_tsi(op, O_REG, 16, R_AX); - break; - case OT_ACC_FULL_NOT64: /* No REX.W support for IN/OUT. */ - vrex &= ~PREFIX_EX_W; - case OT_ACC_FULL: - if (effOpSz == Decode16Bits) { - ps->usedPrefixes |= INST_PRE_OP_SIZE; - operands_set_tsi(op, O_REG, 16, R_AX); - } else if (effOpSz == Decode32Bits) { - ps->usedPrefixes |= INST_PRE_OP_SIZE; - operands_set_tsi(op, O_REG, 32, R_EAX); - } else { /* Decode64Bits */ - /* Only non-promoted instructions need REX in order to decode in 64 bits. */ - /* MEM-OFFSET MOV's are NOT automatically promoted to 64 bits. */ - if (~instFlags & INST_64BITS) { - ps->usedPrefixes |= INST_PRE_REX; - } - operands_set_tsi(op, O_REG, 64, R_RAX); - } - break; - case OT_PTR16_FULL: - /* ptr16:full - full is size of operand size to read, therefore Operand Size Prefix affects this. So we need to handle it. */ - if (effOpSz == Decode16Bits) { - ps->usedPrefixes |= INST_PRE_OP_SIZE; - ci->codeLen -= sizeof(int16_t)*2; - if (ci->codeLen < 0) return FALSE; - - operands_set_ts(op, O_PTR, 16); - di->imm.ptr.off = RUSHORT(ci->code); /* Read offset first. */ - di->imm.ptr.seg = RUSHORT((ci->code + sizeof(int16_t))); /* And read segment. */ - - ci->code += sizeof(int16_t)*2; - } else { /* Decode32Bits, for Decode64Bits this instruction is invalid. */ - ps->usedPrefixes |= INST_PRE_OP_SIZE; - ci->codeLen -= sizeof(int32_t) + sizeof(int16_t); - if (ci->codeLen < 0) return FALSE; - - operands_set_ts(op, O_PTR, 32); - di->imm.ptr.off = RULONG(ci->code); /* Read 32bits offset this time. */ - di->imm.ptr.seg = RUSHORT((ci->code + sizeof(int32_t))); /* And read segment, 16 bits. */ - - ci->code += sizeof(int32_t) + sizeof(int16_t); - } - break; - case OT_RELCB: - case OT_RELC_FULL: - - if (type == OT_RELCB) { - operands_set_ts(op, O_PC, 8); - if (!read_stream_safe_sint(ci, &di->imm.sqword, sizeof(int8_t))) return FALSE; - } else { /* OT_RELC_FULL */ - - /* Yep, operand size prefix affects relc also. */ - ps->usedPrefixes |= INST_PRE_OP_SIZE; - if (effOpSz == Decode16Bits) { - operands_set_ts(op, O_PC, 16); - if (!read_stream_safe_sint(ci, &di->imm.sqword, sizeof(int16_t))) return FALSE; - } else { /* Decode32Bits or Decode64Bits = for now they are the same */ - operands_set_ts(op, O_PC, 32); - if (!read_stream_safe_sint(ci, &di->imm.sqword, sizeof(int32_t))) return FALSE; - } - } - - /* Support for hint, see if there's a segment override. */ - if ((ii->opcodeId >= I_JO) && (ii->opcodeId <= I_JG)) { - if (ps->decodedPrefixes & INST_PRE_CS) { - ps->usedPrefixes |= INST_PRE_CS; - di->flags |= FLAG_HINT_NOT_TAKEN; - } else if (ps->decodedPrefixes & INST_PRE_DS) { - ps->usedPrefixes |= INST_PRE_DS; - di->flags |= FLAG_HINT_TAKEN; - } - } - break; - case OT_MOFFS8: - op->size = 8; - /* FALL THROUGH, size won't be changed. */ - case OT_MOFFS_FULL: - op->type = O_DISP; - if (op->size == 0) { - /* Calculate size of operand (same as ACC size). */ - switch (effOpSz) - { - case Decode16Bits: op->size = 16; break; - case Decode32Bits: op->size = 32; break; - case Decode64Bits: op->size = 64; break; - } - } - - prefixes_use_segment(INST_PRE_DS, ps, ci->dt, di); - - /* - * Just a pointer to a BYTE, WORD, DWORD, QWORD. Works only with ACC8/16/32/64 respectively. - * MOV [0x1234], AL ; MOV AX, [0x1234] ; MOV EAX, [0x1234], note that R/E/AX will be chosen by OT_ACC_FULL. - */ - if (effAdrSz == Decode16Bits) { - ps->usedPrefixes |= INST_PRE_ADDR_SIZE; - - di->dispSize = 16; - if (!read_stream_safe_uint(ci, &di->disp, sizeof(int16_t))) return FALSE; - } else if (effAdrSz == Decode32Bits) { - ps->usedPrefixes |= INST_PRE_ADDR_SIZE; - - di->dispSize = 32; - if (!read_stream_safe_uint(ci, &di->disp, sizeof(int32_t))) return FALSE; - } else { /* Decode64Bits */ - di->dispSize = 64; - if (!read_stream_safe_uint(ci, &di->disp, sizeof(int64_t))) return FALSE; - } - break; - case OT_CONST1: - operands_set_ts(op, O_IMM, 8); - di->imm.byte = 1; - break; - case OT_REGCL: - operands_set_tsi(op, O_REG, 8, R_CL); - break; - - case OT_FPU_SI: - /* Low 3 bits specify the REG, similar to the MODR/M byte reg. */ - operands_set_tsi(op, O_REG, 32, FPUREGS_BASE + (*(ci->code-1) & 7)); - break; - case OT_FPU_SSI: - operands_set_tsi(op, O_REG, 32, R_ST0); - operands_set_tsi(op + 1, O_REG, 32, FPUREGS_BASE + (*(ci->code-1) & 7)); - break; - case OT_FPU_SIS: - operands_set_tsi(op, O_REG, 32, FPUREGS_BASE + (*(ci->code-1) & 7)); - operands_set_tsi(op + 1, O_REG, 32, R_ST0); - break; - - /* - * Special treatment for Instructions-Block: - * INC/DEC (only 16/32 bits) /PUSH/POP/XCHG instructions, which get their REG from their own binary code. - - * Notice these instructions are 1 or 2 byte long, - * code points after the byte which represents the instruction itself, - * thus, even if the instructions are 2 bytes long it will read its last byte which contains the REG info. - */ - case OT_IB_RB: - /* Low 3 bits specify the REG, similar to the MODR/M byte reg. */ - operands_set_ts(op, O_REG, 8); - reg = *(ci->code-1) & 7; - if (vrex & PREFIX_EX_B) { - ps->usedPrefixes |= INST_PRE_REX; - op->index = (uint8_t)operands_fix_8bit_rex_base(reg + EX_GPR_BASE); - } else if (ps->prefixExtType == PET_REX) { - ps->usedPrefixes |= INST_PRE_REX; - op->index = (uint8_t)operands_fix_8bit_rex_base(reg); - } else op->index = (uint8_t)(REGS8_BASE + reg); - break; - case OT_IB_R_FULL: - reg = *(ci->code-1) & 7; - switch (effOpSz) - { - case Decode16Bits: - ps->usedPrefixes |= INST_PRE_OP_SIZE; - if (vrex & PREFIX_EX_B) { - ps->usedPrefixes |= INST_PRE_REX; - reg += EX_GPR_BASE; - } - operands_set_tsi(op, O_REG, 16, REGS16_BASE + reg); - break; - case Decode32Bits: - if (vrex & PREFIX_EX_B) { - ps->usedPrefixes |= INST_PRE_REX; - reg += EX_GPR_BASE; - } else ps->usedPrefixes |= INST_PRE_OP_SIZE; - operands_set_tsi(op, O_REG, 32, REGS32_BASE + reg); - break; - case Decode64Bits: - /* - * Automatically promoted instruction can drop REX prefix if not required. - * PUSH/POP defaults to 64 bits. --> INST_64BITS - * MOV imm64 / BSWAP requires REX.W to be 64 bits --> INST_64BITS | INST_PRE_REX - */ - if ((instFlags & INST_64BITS) && ((instFlags & INST_PRE_REX) == 0)) { - if (vrex & PREFIX_EX_B) { - ps->usedPrefixes |= INST_PRE_REX; - reg += EX_GPR_BASE; - } - } else { - ps->usedPrefixes |= INST_PRE_REX; - reg += (vrex & PREFIX_EX_B) ? EX_GPR_BASE : 0; - } - operands_set_tsi(op, O_REG, 64, REGS64_BASE + reg); - break; - } - break; - - /* - * Special treatment for repeatable instructions. - - * We want the following output: - * If there's only the REP/NZ prefix, we won't output anything (All operands are implicit). - * If there's an operand size prefix, we will change the suffix letter of the mnemonic, which specifies the size of operand to the required one. - * If there's a segment override prefix, we will output the segment and the used index register (EDI/ESI). - * If there's an address size prefix, we will output the (segment if needed and) the used and inverted index register (DI/SI). - - * Example: - * :: Decoding in 16 bits mode! :: - * AD ~ LODSW - * 66 AD ~ LODSD - * F3 AC ~ REP LODSB - * F3 66 AD ~ REP LODSD - * F3 3E AC ~ REP LODS BYTE DS:[SI] - * F3 67 AD ~ REP LODS WORD [ESI] - - * The basic form of a repeatable instruction has its operands hidden and has a suffix letter - * which implies on the size of operation being done. - * Therefore, we cannot change the mnemonic here when we encounter another prefix and its not the decoder's responsibility to do so. - * That's why the caller is responsible to add the suffix letter if no other prefixes are used. - * And all we are doing here is formatting the operand correctly. - */ - case OT_REGI_ESI: - ps->usedPrefixes |= INST_PRE_ADDR_SIZE; - - op->type = O_SMEM; - - /* This might be a 16, 32 or 64 bits instruction, depends on the decoding mode. */ - if (instFlags & INST_16BITS) { - ps->usedPrefixes |= INST_PRE_OP_SIZE; - - if (effOpSz == Decode16Bits) op->size = 16; - else if ((effOpSz == Decode64Bits) && (instFlags & INST_64BITS)) { - ps->usedPrefixes |= INST_PRE_REX; - op->size = 64; - } else op->size = 32; - } else op->size = 8; - - /* - * Clear segment in case OT_REGI_EDI was parsed earlier, - * DS can be overridden and therefore has precedence. - */ - di->segment = 0; - prefixes_use_segment(INST_PRE_DS, ps, ci->dt, di); - - if (effAdrSz == Decode16Bits) op->index = R_SI; - else if (effAdrSz == Decode32Bits) op->index = R_ESI; - else op->index = R_RSI; - break; - case OT_REGI_EDI: - ps->usedPrefixes |= INST_PRE_ADDR_SIZE; - - op->type = O_SMEM; - - /* This might be a 16 or 32 bits instruction, depends on the decoding mode. */ - if (instFlags & INST_16BITS) { - ps->usedPrefixes |= INST_PRE_OP_SIZE; - - if (effOpSz == Decode16Bits) op->size = 16; - else if ((effOpSz == Decode64Bits) && (instFlags & INST_64BITS)) { - ps->usedPrefixes |= INST_PRE_REX; - op->size = 64; - } else op->size = 32; - } else op->size = 8; - - /* Note: The [rDI] operand can't be prefixed by a segment override, therefore we don't set usedPrefixes. */ - if ((opNum == ONT_1) && (ci->dt != Decode64Bits)) di->segment = R_ES | SEGMENT_DEFAULT; /* No ES in 64 bits mode. */ - - if (effAdrSz == Decode16Bits) op->index = R_DI; - else if (effAdrSz == Decode32Bits) op->index = R_EDI; - else op->index = R_RDI; - break; - - /* Used for In/Out instructions varying forms. */ - case OT_REGDX: - /* Simple single IN/OUT instruction. */ - operands_set_tsi(op, O_REG, 16, R_DX); - break; - - /* Used for INVLPGA instruction. */ - case OT_REGECX: - operands_set_tsi(op, O_REG, 32, R_ECX); - break; - case OT_REGI_EBXAL: - /* XLAT BYTE [rBX + AL] */ - ps->usedPrefixes |= INST_PRE_ADDR_SIZE; - - prefixes_use_segment(INST_PRE_DS, ps, ci->dt, di); - - /* Size of deref is always 8 for xlat. */ - operands_set_tsi(op, O_MEM, 8, R_AL); - - if (effAdrSz == Decode16Bits) di->base = R_BX; - else if (effAdrSz == Decode32Bits) di->base = R_EBX; - else { - ps->usedPrefixes |= INST_PRE_REX; - di->base = R_RBX; - } - break; - case OT_REGI_EAX: - /* - * Implicit rAX as memory indirection operand. Used by AMD's SVM instructions. - * Since this is a memory indirection, the default address size in 64bits decoding mode is 64. - */ - - if (effAdrSz == Decode64Bits) operands_set_tsi(op, O_SMEM, 64, R_RAX); - else if (effAdrSz == Decode32Bits) { - ps->usedPrefixes |= INST_PRE_ADDR_SIZE; - operands_set_tsi(op, O_SMEM, 32, R_EAX); - } else { - ps->usedPrefixes |= INST_PRE_ADDR_SIZE; - operands_set_tsi(op, O_SMEM, 16, R_AX); - } - break; - case OT_VXMM: - operands_set_tsi(op, O_REG, 128, SSEREGS_BASE + vexV); - break; - case OT_XMM_IMM: - ci->codeLen -= sizeof(int8_t); - if (ci->codeLen < 0) return FALSE; - - if (ci->dt == Decode32Bits) reg = (*ci->code >> 4) & 0x7; - else reg = (*ci->code >> 4) & 0xf; - operands_set_tsi(op, O_REG, 128, SSEREGS_BASE + reg); - - ci->code += sizeof(int8_t); - break; - case OT_YXMM: - if (vrex & PREFIX_EX_R) reg += EX_GPR_BASE; - if (ps->vrex & PREFIX_EX_L) operands_set_tsi(op, O_REG, 256, AVXREGS_BASE + reg); - else operands_set_tsi(op, O_REG, 128, SSEREGS_BASE + reg); - break; - case OT_YXMM_IMM: - ci->codeLen -= sizeof(int8_t); - if (ci->codeLen < 0) return FALSE; - - if (ci->dt == Decode32Bits) reg = (*ci->code >> 4) & 0x7; - else reg = (*ci->code >> 4) & 0xf; - - if (ps->vrex & PREFIX_EX_L) operands_set_tsi(op, O_REG, 256, AVXREGS_BASE + reg); - else operands_set_tsi(op, O_REG, 128, SSEREGS_BASE + reg); - - ci->code += sizeof(int8_t); - break; - case OT_YMM: - if (vrex & PREFIX_EX_R) reg += EX_GPR_BASE; - operands_set_tsi(op, O_REG, 256, AVXREGS_BASE + reg); - break; - case OT_VYMM: - operands_set_tsi(op, O_REG, 256, AVXREGS_BASE + vexV); - break; - case OT_VYXMM: - if (ps->vrex & PREFIX_EX_L) operands_set_tsi(op, O_REG, 256, AVXREGS_BASE + vexV); - else operands_set_tsi(op, O_REG, 128, SSEREGS_BASE + vexV); - break; - case OT_WREG32_64: - if (vrex & PREFIX_EX_R) reg += EX_GPR_BASE; - if (ps->vrex & PREFIX_EX_W) operands_set_tsi(op, O_REG, 64, REGS64_BASE + reg); - else operands_set_tsi(op, O_REG, 32, REGS32_BASE + reg); - break; - default: return FALSE; - } - - if ((op->type == O_REG) || (op->type == O_SMEM) || (op->type == O_MEM)) { - di->usedRegistersMask |= _REGISTERTORCLASS[op->index]; - } - - return TRUE; -} diff --git a/diStorm/src/operands.h b/diStorm/src/operands.h deleted file mode 100644 index 6785e64..0000000 --- a/diStorm/src/operands.h +++ /dev/null @@ -1,40 +0,0 @@ -/* -operands.h - -diStorm3 - Powerful disassembler for X86/AMD64 -http://ragestorm.net/distorm/ -distorm at gmail dot com -Copyright (C) 2003-2012 Gil Dabah - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see -*/ - - -#ifndef OPERANDS_H -#define OPERANDS_H - -#include "config.h" -#include "decoder.h" -#include "prefix.h" -#include "instructions.h" - - -extern uint32_t _REGISTERTORCLASS[]; - -int operands_extract(_CodeInfo* ci, _DInst* di, _InstInfo* ii, - _iflags instFlags, _OpType type, _OperandNumberType opNum, - unsigned int modrm, _PrefixState* ps, _DecodeType effOpSz, - _DecodeType effAdrSz, int* lockableInstruction); - -#endif /* OPERANDS_H */ diff --git a/diStorm/src/prefix.c b/diStorm/src/prefix.c deleted file mode 100644 index 53f09b6..0000000 --- a/diStorm/src/prefix.c +++ /dev/null @@ -1,380 +0,0 @@ -/* -prefix.c - -diStorm3 - Powerful disassembler for X86/AMD64 -http://ragestorm.net/distorm/ -distorm at gmail dot com -Copyright (C) 2003-2012 Gil Dabah - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see -*/ - - -#include "prefix.h" - -#include "x86defs.h" -#include "instructions.h" -#include "../include/mnemonics.h" - - -/* - * The main purpose of this module is to keep track of all kind of prefixes a single instruction may have. - * The problem is that a single instruction may have up to six different prefix-types. - * That's why I have to detect such cases and drop those excess prefixes. - */ - -int prefixes_is_valid(unsigned int ch, _DecodeType dt) -{ - switch (ch) { - /* for i in xrange(0x40, 0x50): print "case 0x%2x:" % i */ - case 0x40: /* REX: */ - case 0x41: - case 0x42: - case 0x43: - case 0x44: - case 0x45: - case 0x46: - case 0x47: - case 0x48: - case 0x49: - case 0x4a: - case 0x4b: - case 0x4c: - case 0x4d: - case 0x4e: - case 0x4f: return (dt == Decode64Bits); - case PREFIX_LOCK: return TRUE; - case PREFIX_REPNZ: return TRUE; - case PREFIX_REP: return TRUE; - case PREFIX_CS: return TRUE; - case PREFIX_SS: return TRUE; - case PREFIX_DS: return TRUE; - case PREFIX_ES: return TRUE; - case PREFIX_FS: return TRUE; - case PREFIX_GS: return TRUE; - case PREFIX_OP_SIZE: return TRUE; - case PREFIX_ADDR_SIZE: return TRUE; - /* The VEXs might be false positives, the decode_perfixes will determine for sure. */ - case PREFIX_VEX2b: /* VEX is supported for all modes, because 16 bits Pmode is included. */ - case PREFIX_VEX3b: return TRUE; - } - return FALSE; -} - -/* Ignore a specific prefix type. */ -void prefixes_ignore(_PrefixState* ps, _PrefixIndexer pi) -{ - /* - * If that type of prefix appeared already, set the bit of that *former* prefix. - * Anyway, set the new index of that prefix type to the current index, so next time we know its position. - */ - if (ps->pfxIndexer[pi] != PFXIDX_NONE) ps->unusedPrefixesMask |= (1 << ps->pfxIndexer[pi]); -} - -/* Ignore all prefix. */ -void prefixes_ignore_all(_PrefixState* ps) -{ - int i; - for (i = 0; i < PFXIDX_MAX; i++) - prefixes_ignore(ps, i); -} - -/* Calculates which prefixes weren't used and accordingly sets the bits in the unusedPrefixesMask. */ -uint16_t prefixes_set_unused_mask(_PrefixState* ps) -{ - /* - * The decodedPrefixes represents the prefixes that were *read* from the binary stream for the instruction. - * The usedPrefixes represents the prefixes that were actually used by the instruction in the *decode* phase. - * Xoring between the two will result in a 'diff' which returns the prefixes that were read - * from the stream *and* that were never used in the actual decoding. - * - * Only one prefix per type can be set in decodedPrefixes from the stream. - * Therefore it's enough to check each type once and set the flag accordingly. - * That's why we had to book-keep each prefix type and its position. - * So now we know which bits we need to set exactly in the mask. - */ - _iflags unusedPrefixesDiff = ps->decodedPrefixes ^ ps->usedPrefixes; - - /* Examine unused prefixes by type: */ - /* - * About REX: it might be set in the diff although it was never in the stream itself. - * This is because the vrex is shared between VEX and REX and some places flag it as REX usage, while - * we were really decoding an AVX instruction. - * It's not a big problem, because the prefixes_ignore func will ignore it anyway, - * since it wasn't seen earlier. But it's important to know this. - */ - if (unusedPrefixesDiff & INST_PRE_REX) prefixes_ignore(ps, PFXIDX_REX); - if (unusedPrefixesDiff & INST_PRE_SEGOVRD_MASK) prefixes_ignore(ps, PFXIDX_SEG); - if (unusedPrefixesDiff & INST_PRE_LOKREP_MASK) prefixes_ignore(ps, PFXIDX_LOREP); - if (unusedPrefixesDiff & INST_PRE_OP_SIZE) prefixes_ignore(ps, PFXIDX_OP_SIZE); - if (unusedPrefixesDiff & INST_PRE_ADDR_SIZE) prefixes_ignore(ps, PFXIDX_ADRS); - /* If a VEX instruction was found, its prefix is considered as used, therefore no point for checking for it. */ - - return ps->unusedPrefixesMask; -} - -/* - * Mark a prefix as unused, and bookkeep where we last saw this same type, - * because in the future we might want to disable it too. - */ -_INLINE_ void prefixes_track_unused(_PrefixState* ps, int index, _PrefixIndexer pi) -{ - prefixes_ignore(ps, pi); - /* Book-keep the current index for this type. */ - ps->pfxIndexer[pi] = index; -} - -/* - * Read as many prefixes as possible, up to 15 bytes, and halt when we encounter non-prefix byte. - * This algorithm tries to imitate a real processor, where the same prefix can appear a few times, etc. - * The tiny complexity is that we want to know when a prefix was superfluous and mark any copy of it as unused. - * Note that the last prefix of its type will be considered as used, and all the others (of same type) before it as unused. - */ -void prefixes_decode(const uint8_t* code, int codeLen, _PrefixState* ps, _DecodeType dt) -{ - int index, done; - uint8_t vex; - - /* - * First thing to do, scan for prefixes, there are six types of prefixes. - * There may be up to six prefixes before a single instruction, not the same type, no special order, - * except REX/VEX must precede immediately the first opcode byte. - * BTW - This is the reason why I didn't make the REP prefixes part of the instructions (STOS/SCAS/etc). - * - * Another thing, the instruction maximum size is 15 bytes, thus if we read more than 15 bytes, we will halt. - * - * We attach all prefixes to the next instruction, there might be two or more occurrences from the same prefix. - * Also, since VEX can be allowed only once we will test it separately. - */ - for (index = 0, done = FALSE; - (codeLen > 0) && (code - ps->start < INST_MAXIMUM_SIZE); - code++, codeLen--, index++) { - /* - NOTE: AMD treat lock/rep as two different groups... But I am based on Intel. - - - Lock and Repeat: - - 0xF0 — LOCK - - 0xF2 — REPNE/REPNZ - - 0xF3 - REP/REPE/REPZ - - Segment Override: - - 0x2E - CS - - 0x36 - SS - - 0x3E - DS - - 0x26 - ES - - 0x64 - FS - - 0x65 - GS - - Operand-Size Override: 0x66, switching default size. - - Address-Size Override: 0x67, switching default size. - - 64 Bits: - - REX: 0x40 - 0x4f, extends register access. - - 2 Bytes VEX: 0xc4 - - 3 Bytes VEX: 0xc5 - 32 Bits: - - 2 Bytes VEX: 0xc4 11xx-xxxx - - 3 Bytes VEX: 0xc5 11xx-xxxx - */ - - /* Examine what type of prefix we got. */ - switch (*code) - { - /* REX type, 64 bits decoding mode only: */ - case 0x40: - case 0x41: - case 0x42: - case 0x43: - case 0x44: - case 0x45: - case 0x46: - case 0x47: - case 0x48: - case 0x49: - case 0x4a: - case 0x4b: - case 0x4c: - case 0x4d: - case 0x4e: - case 0x4f: - if (dt == Decode64Bits) { - ps->decodedPrefixes |= INST_PRE_REX; - ps->vrex = *code & 0xf; /* Keep only BXRW. */ - ps->rexPos = code; - ps->prefixExtType = PET_REX; - prefixes_track_unused(ps, index, PFXIDX_REX); - } else done = TRUE; /* If we are not in 64 bits mode, it's an instruction, then halt. */ - break; - - /* LOCK and REPx type: */ - case PREFIX_LOCK: - ps->decodedPrefixes |= INST_PRE_LOCK; - prefixes_track_unused(ps, index, PFXIDX_LOREP); - break; - case PREFIX_REPNZ: - ps->decodedPrefixes |= INST_PRE_REPNZ; - prefixes_track_unused(ps, index, PFXIDX_LOREP); - break; - case PREFIX_REP: - ps->decodedPrefixes |= INST_PRE_REP; - prefixes_track_unused(ps, index, PFXIDX_LOREP); - break; - - /* Seg Overide type: */ - case PREFIX_CS: - ps->decodedPrefixes |= INST_PRE_CS; - prefixes_track_unused(ps, index, PFXIDX_SEG); - break; - case PREFIX_SS: - ps->decodedPrefixes |= INST_PRE_SS; - prefixes_track_unused(ps, index, PFXIDX_SEG); - break; - case PREFIX_DS: - ps->decodedPrefixes |= INST_PRE_DS; - prefixes_track_unused(ps, index, PFXIDX_SEG); - break; - case PREFIX_ES: - ps->decodedPrefixes |= INST_PRE_ES; - prefixes_track_unused(ps, index, PFXIDX_SEG); - break; - case PREFIX_FS: - ps->decodedPrefixes |= INST_PRE_FS; - prefixes_track_unused(ps, index, PFXIDX_SEG); - break; - case PREFIX_GS: - ps->decodedPrefixes |= INST_PRE_GS; - prefixes_track_unused(ps, index, PFXIDX_SEG); - break; - - /* Op Size type: */ - case PREFIX_OP_SIZE: - ps->decodedPrefixes |= INST_PRE_OP_SIZE; - prefixes_track_unused(ps, index, PFXIDX_OP_SIZE); - break; - - /* Addr Size type: */ - case PREFIX_ADDR_SIZE: - ps->decodedPrefixes |= INST_PRE_ADDR_SIZE; - prefixes_track_unused(ps, index, PFXIDX_ADRS); - break; - - /* Non-prefix byte now, so break 2. */ - default: done = TRUE; break; - } - if (done) break; - } - - /* 2 Bytes VEX: */ - if ((codeLen >= 2) && - (*code == PREFIX_VEX2b) && - ((code - ps->start) <= INST_MAXIMUM_SIZE - 2)) { - /* - * In 32 bits the second byte has to be in the special range of Mod=11. - * Otherwise it might be a normal LDS instruction. - */ - if ((dt == Decode64Bits) || (*(code + 1) >= INST_DIVIDED_MODRM)) { - ps->vexPos = code + 1; - ps->decodedPrefixes |= INST_PRE_VEX; - ps->prefixExtType = PET_VEX2BYTES; - - /* - * VEX 1 byte bits: - * |7-6--3-2-10| - * |R|vvvv|L|pp| - * |-----------| - */ - - /* -- Convert from VEX prefix to VREX flags -- */ - vex = *ps->vexPos; - if (~vex & 0x80 && dt == Decode64Bits) ps->vrex |= PREFIX_EX_R; /* Convert VEX.R. */ - if (vex & 4) ps->vrex |= PREFIX_EX_L; /* Convert VEX.L. */ - - code += 2; - } - } - - /* 3 Bytes VEX: */ - if ((codeLen >= 3) && - (*code == PREFIX_VEX3b) && - ((code - ps->start) <= INST_MAXIMUM_SIZE - 3) && - (~ps->decodedPrefixes & INST_PRE_VEX)) { - /* - * In 32 bits the second byte has to be in the special range of Mod=11. - * Otherwise it might be a normal LES instruction. - * And we don't care now about the 3rd byte. - */ - if ((dt == Decode64Bits) || (*(code + 1) >= INST_DIVIDED_MODRM)) { - ps->vexPos = code + 1; - ps->decodedPrefixes |= INST_PRE_VEX; - ps->prefixExtType = PET_VEX3BYTES; - - /* - * VEX first and second bytes: - * |7-6-5-4----0| |7-6--3-2-10| - * |R|X|B|m-mmmm| |W|vvvv|L|pp| - * |------------| |-----------| - */ - - /* -- Convert from VEX prefix to VREX flags -- */ - vex = *ps->vexPos; - ps->vrex |= ((~vex >> 5) & 0x7); /* Shift and invert VEX.R/X/B to their place */ - vex = *(ps->vexPos + 1); - if (vex & 4) ps->vrex |= PREFIX_EX_L; /* Convert VEX.L. */ - if (vex & 0x80) ps->vrex |= PREFIX_EX_W; /* Convert VEX.W. */ - - /* Clear some flags if the mode isn't 64 bits. */ - if (dt != Decode64Bits) ps->vrex &= ~(PREFIX_EX_B | PREFIX_EX_X | PREFIX_EX_R | PREFIX_EX_W); - - code += 3; - } - } - - /* - * Save last byte scanned address, so the decoder could keep on scanning from this point and on and on and on. - * In addition the decoder is able to know that the last byte could lead to MMX/SSE instructions (preceding REX if exists). - */ - ps->last = code; /* ps->last points to an opcode byte. */ -} - -/* - * For every memory-indirection operand we want to set its corresponding default segment. - * If the segment is being overrided, we need to see whether we use it or not. - * We will use it only if it's not the default one already. - */ -void prefixes_use_segment(_iflags defaultSeg, _PrefixState* ps, _DecodeType dt, _DInst* di) -{ - _iflags flags = 0; - if (dt == Decode64Bits) flags = ps->decodedPrefixes & INST_PRE_SEGOVRD_MASK64; - else flags = ps->decodedPrefixes & INST_PRE_SEGOVRD_MASK; - - if ((flags == 0) || (flags == defaultSeg)) { - flags = defaultSeg; - di->segment |= SEGMENT_DEFAULT; - } else if (flags != defaultSeg) { - /* Use it only if it's non-default segment. */ - ps->usedPrefixes |= flags; - } - - /* ASSERT: R_XX must be below 128. */ - switch (flags) - { - case INST_PRE_ES: di->segment |= R_ES; break; - case INST_PRE_CS: di->segment |= R_CS; break; - case INST_PRE_SS: di->segment |= R_SS; break; - case INST_PRE_DS: di->segment |= R_DS; break; - case INST_PRE_FS: di->segment |= R_FS; break; - case INST_PRE_GS: di->segment |= R_GS; break; - } - - /* If it's one of the CS,SS,DS,ES and the mode is 64 bits, set segment it to none, since it's ignored. */ - if ((dt == Decode64Bits) && (flags & INST_PRE_SEGOVRD_MASK32)) di->segment = R_NONE; -} diff --git a/diStorm/src/prefix.h b/diStorm/src/prefix.h deleted file mode 100644 index 673aa50..0000000 --- a/diStorm/src/prefix.h +++ /dev/null @@ -1,76 +0,0 @@ -/* -prefix.h - -diStorm3 - Powerful disassembler for X86/AMD64 -http://ragestorm.net/distorm/ -distorm at gmail dot com -Copyright (C) 2003-2012 Gil Dabah - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see -*/ - - -#ifndef PREFIX_H -#define PREFIX_H - -#include "config.h" -#include "decoder.h" - - -/* Specifies the type of the extension prefix, such as: REX, 2 bytes VEX, 3 bytes VEX. */ -typedef enum {PET_NONE = 0, PET_REX, PET_VEX2BYTES, PET_VEX3BYTES} _PrefixExtType; - -/* Specifies an index into a table of prefixes by their type. */ -typedef enum {PFXIDX_NONE = -1, PFXIDX_REX, PFXIDX_LOREP, PFXIDX_SEG, PFXIDX_OP_SIZE, PFXIDX_ADRS, PFXIDX_MAX} _PrefixIndexer; - -/* -* This holds the prefixes state for the current instruction we decode. -* decodedPrefixes includes all specific prefixes that the instruction got. -* start is a pointer to the first prefix to take into account. -* last is a pointer to the last byte we scanned. -* Other pointers are used to keep track of prefixes positions and help us know if they appeared already and where. -*/ -typedef struct { - _iflags decodedPrefixes, usedPrefixes; - const uint8_t *start, *last, *vexPos, *rexPos; - _PrefixExtType prefixExtType; - uint16_t unusedPrefixesMask; - /* Indicates whether the operand size prefix (0x66) was used as a mandatory prefix. */ - int isOpSizeMandatory; - /* If VEX prefix is used, store the VEX.vvvv field. */ - unsigned int vexV; - /* The fields B/X/R/W/L of REX and VEX are stored together in this byte. */ - unsigned int vrex; - - /* !! Make sure pfxIndexer is LAST! Otherwise memset won't work well with it. !! */ - - /* Holds the offset to the prefix byte by its type. */ - int pfxIndexer[PFXIDX_MAX]; -} _PrefixState; - -/* -* Intel supports 6 types of prefixes, whereas AMD supports 5 types (lock is seperated from rep/nz). -* REX is the fifth prefix type, this time I'm based on AMD64. -* VEX is the 6th, though it can't be repeated. -*/ -#define MAX_PREFIXES (5) - -int prefixes_is_valid(unsigned int ch, _DecodeType dt); -void prefixes_ignore(_PrefixState* ps, _PrefixIndexer pi); -void prefixes_ignore_all(_PrefixState* ps); -uint16_t prefixes_set_unused_mask(_PrefixState* ps); -void prefixes_decode(const uint8_t* code, int codeLen, _PrefixState* ps, _DecodeType dt); -void prefixes_use_segment(_iflags defaultSeg, _PrefixState* ps, _DecodeType dt, _DInst* di); - -#endif /* PREFIX_H */ diff --git a/diStorm/src/textdefs.c b/diStorm/src/textdefs.c deleted file mode 100644 index eec26f1..0000000 --- a/diStorm/src/textdefs.c +++ /dev/null @@ -1,184 +0,0 @@ -/* -textdefs.c - -diStorm3 - Powerful disassembler for X86/AMD64 -http://ragestorm.net/distorm/ -distorm at gmail dot com -Copyright (C) 2003-2012 Gil Dabah - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see -*/ - - -#include "textdefs.h" - -#ifndef DISTORM_LIGHT - -static uint8_t Nibble2ChrTable[16] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'a', 'b', 'c', 'd', 'e', 'f'}; -#define NIBBLE_TO_CHR Nibble2ChrTable[t] - -void _FASTCALL_ str_hex_b(_WString* s, unsigned int x) -{ - /* - * def prebuilt(): - * s = "" - * for i in xrange(256): - * if ((i % 0x10) == 0): - * s += "\r\n" - * s += "\"%02x\", " % (i) - * return s - */ - static int8_t TextBTable[256][3] = { - "00", "01", "02", "03", "04", "05", "06", "07", "08", "09", "0a", "0b", "0c", "0d", "0e", "0f", - "10", "11", "12", "13", "14", "15", "16", "17", "18", "19", "1a", "1b", "1c", "1d", "1e", "1f", - "20", "21", "22", "23", "24", "25", "26", "27", "28", "29", "2a", "2b", "2c", "2d", "2e", "2f", - "30", "31", "32", "33", "34", "35", "36", "37", "38", "39", "3a", "3b", "3c", "3d", "3e", "3f", - "40", "41", "42", "43", "44", "45", "46", "47", "48", "49", "4a", "4b", "4c", "4d", "4e", "4f", - "50", "51", "52", "53", "54", "55", "56", "57", "58", "59", "5a", "5b", "5c", "5d", "5e", "5f", - "60", "61", "62", "63", "64", "65", "66", "67", "68", "69", "6a", "6b", "6c", "6d", "6e", "6f", - "70", "71", "72", "73", "74", "75", "76", "77", "78", "79", "7a", "7b", "7c", "7d", "7e", "7f", - "80", "81", "82", "83", "84", "85", "86", "87", "88", "89", "8a", "8b", "8c", "8d", "8e", "8f", - "90", "91", "92", "93", "94", "95", "96", "97", "98", "99", "9a", "9b", "9c", "9d", "9e", "9f", - "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7", "a8", "a9", "aa", "ab", "ac", "ad", "ae", "af", - "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7", "b8", "b9", "ba", "bb", "bc", "bd", "be", "bf", - "c0", "c1", "c2", "c3", "c4", "c5", "c6", "c7", "c8", "c9", "ca", "cb", "cc", "cd", "ce", "cf", - "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", "d8", "d9", "da", "db", "dc", "dd", "de", "df", - "e0", "e1", "e2", "e3", "e4", "e5", "e6", "e7", "e8", "e9", "ea", "eb", "ec", "ed", "ee", "ef", - "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", "fa", "fb", "fc", "fd", "fe", "ff" - }; - - /* - * Fixed length of 3 including null terminate character. - */ - memcpy(&s->p[s->length], TextBTable[x & 255], 3); - s->length += 2; -} - -void _FASTCALL_ str_code_hb(_WString* s, unsigned int x) -{ - static int8_t TextHBTable[256][5] = { - /* - * def prebuilt(): - * s = "" - * for i in xrange(256): - * if ((i % 0x10) == 0): - * s += "\r\n" - * s += "\"0x%x\", " % (i) - * return s - */ - "0x0", "0x1", "0x2", "0x3", "0x4", "0x5", "0x6", "0x7", "0x8", "0x9", "0xa", "0xb", "0xc", "0xd", "0xe", "0xf", - "0x10", "0x11", "0x12", "0x13", "0x14", "0x15", "0x16", "0x17", "0x18", "0x19", "0x1a", "0x1b", "0x1c", "0x1d", "0x1e", "0x1f", - "0x20", "0x21", "0x22", "0x23", "0x24", "0x25", "0x26", "0x27", "0x28", "0x29", "0x2a", "0x2b", "0x2c", "0x2d", "0x2e", "0x2f", - "0x30", "0x31", "0x32", "0x33", "0x34", "0x35", "0x36", "0x37", "0x38", "0x39", "0x3a", "0x3b", "0x3c", "0x3d", "0x3e", "0x3f", - "0x40", "0x41", "0x42", "0x43", "0x44", "0x45", "0x46", "0x47", "0x48", "0x49", "0x4a", "0x4b", "0x4c", "0x4d", "0x4e", "0x4f", - "0x50", "0x51", "0x52", "0x53", "0x54", "0x55", "0x56", "0x57", "0x58", "0x59", "0x5a", "0x5b", "0x5c", "0x5d", "0x5e", "0x5f", - "0x60", "0x61", "0x62", "0x63", "0x64", "0x65", "0x66", "0x67", "0x68", "0x69", "0x6a", "0x6b", "0x6c", "0x6d", "0x6e", "0x6f", - "0x70", "0x71", "0x72", "0x73", "0x74", "0x75", "0x76", "0x77", "0x78", "0x79", "0x7a", "0x7b", "0x7c", "0x7d", "0x7e", "0x7f", - "0x80", "0x81", "0x82", "0x83", "0x84", "0x85", "0x86", "0x87", "0x88", "0x89", "0x8a", "0x8b", "0x8c", "0x8d", "0x8e", "0x8f", - "0x90", "0x91", "0x92", "0x93", "0x94", "0x95", "0x96", "0x97", "0x98", "0x99", "0x9a", "0x9b", "0x9c", "0x9d", "0x9e", "0x9f", - "0xa0", "0xa1", "0xa2", "0xa3", "0xa4", "0xa5", "0xa6", "0xa7", "0xa8", "0xa9", "0xaa", "0xab", "0xac", "0xad", "0xae", "0xaf", - "0xb0", "0xb1", "0xb2", "0xb3", "0xb4", "0xb5", "0xb6", "0xb7", "0xb8", "0xb9", "0xba", "0xbb", "0xbc", "0xbd", "0xbe", "0xbf", - "0xc0", "0xc1", "0xc2", "0xc3", "0xc4", "0xc5", "0xc6", "0xc7", "0xc8", "0xc9", "0xca", "0xcb", "0xcc", "0xcd", "0xce", "0xcf", - "0xd0", "0xd1", "0xd2", "0xd3", "0xd4", "0xd5", "0xd6", "0xd7", "0xd8", "0xd9", "0xda", "0xdb", "0xdc", "0xdd", "0xde", "0xdf", - "0xe0", "0xe1", "0xe2", "0xe3", "0xe4", "0xe5", "0xe6", "0xe7", "0xe8", "0xe9", "0xea", "0xeb", "0xec", "0xed", "0xee", "0xef", - "0xf0", "0xf1", "0xf2", "0xf3", "0xf4", "0xf5", "0xf6", "0xf7", "0xf8", "0xf9", "0xfa", "0xfb", "0xfc", "0xfd", "0xfe", "0xff" - }; - - if (x < 0x10) { /* < 0x10 has a fixed length of 4 including null terminate. */ - memcpy(&s->p[s->length], TextHBTable[x & 255], 4); - s->length += 3; - } else { /* >= 0x10 has a fixed length of 5 including null terminate. */ - memcpy(&s->p[s->length], TextHBTable[x & 255], 5); - s->length += 4; - } -} - -void _FASTCALL_ str_code_hdw(_WString* s, uint32_t x) -{ - int8_t* buf; - int i = 0, shift = 0; - unsigned int t = 0; - - buf = (int8_t*)&s->p[s->length]; - - buf[0] = '0'; - buf[1] = 'x'; - buf += 2; - - for (shift = 28; shift != 0; shift -= 4) { - t = (x >> shift) & 0xf; - if (i | t) buf[i++] = NIBBLE_TO_CHR; - } - t = x & 0xf; - buf[i++] = NIBBLE_TO_CHR; - - s->length += i + 2; - buf[i] = '\0'; -} - -void _FASTCALL_ str_code_hqw(_WString* s, uint8_t src[8]) -{ - int8_t* buf; - int i = 0, shift = 0; - uint32_t x = RULONG(&src[sizeof(int32_t)]); - int t; - - buf = (int8_t*)&s->p[s->length]; - buf[0] = '0'; - buf[1] = 'x'; - buf += 2; - - for (shift = 28; shift != -4; shift -= 4) { - t = (x >> shift) & 0xf; - if (i | t) buf[i++] = NIBBLE_TO_CHR; - } - - x = RULONG(src); - for (shift = 28; shift != 0; shift -= 4) { - t = (x >> shift) & 0xf; - if (i | t) buf[i++] = NIBBLE_TO_CHR; - } - t = x & 0xf; - buf[i++] = NIBBLE_TO_CHR; - - s->length += i + 2; - buf[i] = '\0'; -} - -#ifdef SUPPORT_64BIT_OFFSET -void _FASTCALL_ str_off64(_WString* s, OFFSET_INTEGER x) -{ - int8_t* buf; - int i = 0, shift = 0; - OFFSET_INTEGER t = 0; - - buf = (int8_t*)&s->p[s->length]; - - buf[0] = '0'; - buf[1] = 'x'; - buf += 2; - - for (shift = 60; shift != 0; shift -= 4) { - t = (x >> shift) & 0xf; - if (i | t) buf[i++] = NIBBLE_TO_CHR; - } - t = x & 0xf; - buf[i++] = NIBBLE_TO_CHR; - - s->length += i + 2; - buf[i] = '\0'; -} -#endif /* SUPPORT_64BIT_OFFSET */ - -#endif /* DISTORM_LIGHT */ diff --git a/diStorm/src/textdefs.h b/diStorm/src/textdefs.h deleted file mode 100644 index 275cf88..0000000 --- a/diStorm/src/textdefs.h +++ /dev/null @@ -1,71 +0,0 @@ -/* -textdefs.h - -diStorm3 - Powerful disassembler for X86/AMD64 -http://ragestorm.net/distorm/ -distorm at gmail dot com -Copyright (C) 2003-2012 Gil Dabah - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see -*/ - - -#ifndef TEXTDEFS_H -#define TEXTDEFS_H - -#include "config.h" -#include "wstring.h" - -#ifndef DISTORM_LIGHT - -#define PLUS_DISP_CHR '+' -#define MINUS_DISP_CHR '-' -#define OPEN_CHR '[' -#define CLOSE_CHR ']' -#define SP_CHR ' ' -#define SEG_OFF_CHR ':' - -/* -Naming Convention: - -* get - returns a pointer to a string. -* str - concatenates to string. - -* hex - means the function is used for hex dump (number is padded to required size) - Little Endian output. -* code - means the function is used for disassembled instruction - Big Endian output. -* off - means the function is used for 64bit offset - Big Endian output. - -* h - '0x' in front of the string. - -* b - byte -* dw - double word (can be used for word also) -* qw - quad word - -* all numbers are in HEX. -*/ - -extern int8_t TextBTable[256][4]; - -void _FASTCALL_ str_hex_b(_WString* s, unsigned int x); -void _FASTCALL_ str_code_hb(_WString* s, unsigned int x); -void _FASTCALL_ str_code_hdw(_WString* s, uint32_t x); -void _FASTCALL_ str_code_hqw(_WString* s, uint8_t src[8]); - -#ifdef SUPPORT_64BIT_OFFSET -void _FASTCALL_ str_off64(_WString* s, OFFSET_INTEGER x); -#endif - -#endif /* DISTORM_LIGHT */ - -#endif /* TEXTDEFS_H */ diff --git a/diStorm/src/wstring.c b/diStorm/src/wstring.c deleted file mode 100644 index 26b2260..0000000 --- a/diStorm/src/wstring.c +++ /dev/null @@ -1,59 +0,0 @@ -/* -wstring.c - -diStorm3 - Powerful disassembler for X86/AMD64 -http://ragestorm.net/distorm/ -distorm at gmail dot com -Copyright (C) 2003-2012 Gil Dabah - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see -*/ - - -#include "wstring.h" - -#ifndef DISTORM_LIGHT - -void strclear_WS(_WString* s) -{ - s->p[0] = '\0'; - s->length = 0; -} - -void chrcat_WS(_WString* s, uint8_t ch) -{ - s->p[s->length] = ch; - s->p[s->length + 1] = '\0'; - s->length += 1; -} - -void strcpylen_WS(_WString* s, const int8_t* buf, unsigned int len) -{ - s->length = len; - memcpy((int8_t*)s->p, buf, len + 1); -} - -void strcatlen_WS(_WString* s, const int8_t* buf, unsigned int len) -{ - memcpy((int8_t*)&s->p[s->length], buf, len + 1); - s->length += len; -} - -void strcat_WS(_WString* s, const _WString* s2) -{ - memcpy((int8_t*)&s->p[s->length], s2->p, s2->length + 1); - s->length += s2->length; -} - -#endif /* DISTORM_LIGHT */ diff --git a/diStorm/src/wstring.h b/diStorm/src/wstring.h deleted file mode 100644 index 6ff9ccf..0000000 --- a/diStorm/src/wstring.h +++ /dev/null @@ -1,47 +0,0 @@ -/* -wstring.h - -diStorm3 - Powerful disassembler for X86/AMD64 -http://ragestorm.net/distorm/ -distorm at gmail dot com -Copyright (C) 2003-2012 Gil Dabah - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see -*/ - - -#ifndef WSTRING_H -#define WSTRING_H - -#include "config.h" - -#ifndef DISTORM_LIGHT - -void strclear_WS(_WString* s); -void chrcat_WS(_WString* s, uint8_t ch); -void strcpylen_WS(_WString* s, const int8_t* buf, unsigned int len); -void strcatlen_WS(_WString* s, const int8_t* buf, unsigned int len); -void strcat_WS(_WString* s, const _WString* s2); - -/* -* Warning, this macro should be used only when the compiler knows the size of string in advance! -* This macro is used in order to spare the call to strlen when the strings are known already. -* Note: sizeof includes NULL terminated character. -*/ -#define strcat_WSN(s, t) strcatlen_WS((s), ((const int8_t*)t), sizeof((t))-1) -#define strcpy_WSN(s, t) strcpylen_WS((s), ((const int8_t*)t), sizeof((t))-1) - -#endif /* DISTORM_LIGHT */ - -#endif /* WSTRING_H */ diff --git a/diStorm/src/x86defs.h b/diStorm/src/x86defs.h deleted file mode 100644 index 74ad105..0000000 --- a/diStorm/src/x86defs.h +++ /dev/null @@ -1,94 +0,0 @@ -/* -x86defs.h - -diStorm3 - Powerful disassembler for X86/AMD64 -http://ragestorm.net/distorm/ -distorm at gmail dot com -Copyright (C) 2003-2012 Gil Dabah - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see -*/ - - -#ifndef X86DEFS_H -#define X86DEFS_H - - -#define SEG_REGS_MAX (6) -#define CREGS_MAX (9) -#define DREGS_MAX (8) - -/* Maximum instruction size, including prefixes */ -#define INST_MAXIMUM_SIZE (15) - -/* Maximum range of imm8 (comparison type) of special SSE CMP instructions. */ -#define INST_CMP_MAX_RANGE (8) - -/* Maximum range of imm8 (comparison type) of special AVX VCMP instructions. */ -#define INST_VCMP_MAX_RANGE (32) - -/* Wait instruction byte code. */ -#define INST_WAIT_INDEX (0x9b) - -/* Lea instruction byte code. */ -#define INST_LEA_INDEX (0x8d) - -/* NOP/XCHG instruction byte code. */ -#define INST_NOP_INDEX (0x90) - -/* ARPL/MOVSXD instruction byte code. */ -#define INST_ARPL_INDEX (0x63) - -/* - * Minimal MODR/M value of divided instructions. - * It's 0xc0, two MSBs set, which indicates a general purpose register is used too. - */ -#define INST_DIVIDED_MODRM (0xc0) - -/* This is the escape byte value used for 3DNow! instructions. */ -#define _3DNOW_ESCAPE_BYTE (0x0f) - -#define PREFIX_LOCK (0xf0) -#define PREFIX_REPNZ (0xf2) -#define PREFIX_REP (0xf3) -#define PREFIX_CS (0x2e) -#define PREFIX_SS (0x36) -#define PREFIX_DS (0x3e) -#define PREFIX_ES (0x26) -#define PREFIX_FS (0x64) -#define PREFIX_GS (0x65) -#define PREFIX_OP_SIZE (0x66) -#define PREFIX_ADDR_SIZE (0x67) -#define PREFIX_VEX2b (0xc5) -#define PREFIX_VEX3b (0xc4) - -/* REX prefix value range, 64 bits mode decoding only. */ -#define PREFIX_REX_LOW (0x40) -#define PREFIX_REX_HI (0x4f) -/* In order to use the extended GPR's we have to add 8 to the Modr/M info values. */ -#define EX_GPR_BASE (8) - -/* Mask for REX and VEX features: */ -/* Base */ -#define PREFIX_EX_B (1) -/* Index */ -#define PREFIX_EX_X (2) -/* Register */ -#define PREFIX_EX_R (4) -/* Operand Width */ -#define PREFIX_EX_W (8) -/* Vector Lengh */ -#define PREFIX_EX_L (0x10) - -#endif /* X86DEFS_H */ diff --git a/diStorm/diStorm.vcxproj b/libs/diStorm.vcxproj similarity index 88% rename from diStorm/diStorm.vcxproj rename to libs/diStorm.vcxproj index b268de3..59e95f4 100644 --- a/diStorm/diStorm.vcxproj +++ b/libs/diStorm.vcxproj @@ -22,25 +22,30 @@ {A4B94DE4-BE0E-4E7D-95E7-7B84E6F117A1} diStorm Win32Proj + 7.0 StaticLibrary Unicode true + v141_xp StaticLibrary Unicode + v141_xp StaticLibrary Unicode true + v141_xp StaticLibrary Unicode + v141_xp @@ -148,28 +153,28 @@ - - - - - - - - - + + + + + + + + + - - + + - - + + - - - - - + + + + + diff --git a/libs/distorm b/libs/distorm new file mode 160000 index 0000000..eec1181 --- /dev/null +++ b/libs/distorm @@ -0,0 +1 @@ +Subproject commit eec118175483749d9e35619566af428e44958955 diff --git a/libs/tinyxml b/libs/tinyxml new file mode 160000 index 0000000..b3e5aab --- /dev/null +++ b/libs/tinyxml @@ -0,0 +1 @@ +Subproject commit b3e5aabf9c0272fdfd05487b5ea12eaf4522713d diff --git a/tinyxml/tinyxml.vcxproj b/libs/tinyxml.vcxproj similarity index 93% rename from tinyxml/tinyxml.vcxproj rename to libs/tinyxml.vcxproj index 2e3f1ee..4de055c 100644 --- a/tinyxml/tinyxml.vcxproj +++ b/libs/tinyxml.vcxproj @@ -22,33 +22,34 @@ {187A751B-B47D-4A95-9F24-55D3D7ABB570} Win32Proj tinyxml + 7.0 StaticLibrary true Unicode - v90 + v141_xp StaticLibrary true Unicode - v90 + v141_xp StaticLibrary false true Unicode - v90 + v141_xp StaticLibrary false true Unicode - v90 + v141_xp @@ -151,14 +152,14 @@ - - - - + + + + - - + + diff --git a/libs/wtl b/libs/wtl new file mode 160000 index 0000000..3aa06df --- /dev/null +++ b/libs/wtl @@ -0,0 +1 @@ +Subproject commit 3aa06df29b17e40cf682c8beaeef4b0995ad14c6 diff --git a/ScyllaDllTest/ScyllaDllTest.sln b/tests/ScyllaDllTest.sln similarity index 100% rename from ScyllaDllTest/ScyllaDllTest.sln rename to tests/ScyllaDllTest.sln diff --git a/ScyllaDllTest/ScyllaDllTest/ScyllaDllTest.vcxproj b/tests/ScyllaDllTest/ScyllaDllTest.vcxproj similarity index 100% rename from ScyllaDllTest/ScyllaDllTest/ScyllaDllTest.vcxproj rename to tests/ScyllaDllTest/ScyllaDllTest.vcxproj diff --git a/ScyllaDllTest/ScyllaDllTest/Source.cpp b/tests/ScyllaDllTest/Source.cpp similarity index 100% rename from ScyllaDllTest/ScyllaDllTest/Source.cpp rename to tests/ScyllaDllTest/Source.cpp diff --git a/ScyllaDllTest/ScyllaTestExe/ScyllaTestExe.vcxproj b/tests/ScyllaTestExe/ScyllaTestExe.vcxproj similarity index 100% rename from ScyllaDllTest/ScyllaTestExe/ScyllaTestExe.vcxproj rename to tests/ScyllaTestExe/ScyllaTestExe.vcxproj diff --git a/ScyllaDllTest/ScyllaTestExe/main.cpp b/tests/ScyllaTestExe/main.cpp similarity index 100% rename from ScyllaDllTest/ScyllaTestExe/main.cpp rename to tests/ScyllaTestExe/main.cpp diff --git a/tinyxml/README b/tinyxml/README deleted file mode 100644 index 89e8fd9..0000000 --- a/tinyxml/README +++ /dev/null @@ -1,8 +0,0 @@ -Download tinyxml from here: https://sourceforge.net/projects/tinyxml/ -Copy the following files in this directory: -tinystr.cpp -tinyxml.cpp -tinyxmlerror.cpp -tinyxmlparser.cpp -tinystr.h -tinyxml.h \ No newline at end of file diff --git a/tinyxml/tinyxml.vcxproj.user b/tinyxml/tinyxml.vcxproj.user deleted file mode 100644 index ace9a86..0000000 --- a/tinyxml/tinyxml.vcxproj.user +++ /dev/null @@ -1,3 +0,0 @@ - - - \ No newline at end of file diff --git a/tools/ScyllaToImprecTree/ScyllaToImprecTree.sln b/tools/ScyllaToImprecTree/ScyllaToImprecTree.sln new file mode 100644 index 0000000..34275c8 --- /dev/null +++ b/tools/ScyllaToImprecTree/ScyllaToImprecTree.sln @@ -0,0 +1,20 @@ + +Microsoft Visual Studio Solution File, Format Version 11.00 +# Visual Studio 2010 +Project("{FAE04EC0-301F-11D3-BF4B-00C04F79EFBC}") = "ScyllaToImprecTree", "ScyllaToImprecTree\ScyllaToImprecTree.csproj", "{C3E06C45-DE06-4A09-9769-D7C477983440}" +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + Debug|x86 = Debug|x86 + Release|x86 = Release|x86 + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {C3E06C45-DE06-4A09-9769-D7C477983440}.Debug|x86.ActiveCfg = Debug|x86 + {C3E06C45-DE06-4A09-9769-D7C477983440}.Debug|x86.Build.0 = Debug|x86 + {C3E06C45-DE06-4A09-9769-D7C477983440}.Release|x86.ActiveCfg = Release|x86 + {C3E06C45-DE06-4A09-9769-D7C477983440}.Release|x86.Build.0 = Release|x86 + EndGlobalSection + GlobalSection(SolutionProperties) = preSolution + HideSolutionNode = FALSE + EndGlobalSection +EndGlobal diff --git a/tools/ScyllaToImprecTree/ScyllaToImprecTree/Form1.Designer.cs b/tools/ScyllaToImprecTree/ScyllaToImprecTree/Form1.Designer.cs new file mode 100644 index 0000000..e4284ac --- /dev/null +++ b/tools/ScyllaToImprecTree/ScyllaToImprecTree/Form1.Designer.cs @@ -0,0 +1,116 @@ +namespace ScyllaToImprecTree +{ + partial class Form1 + { + /// + /// Erforderliche Designervariable. + /// + private System.ComponentModel.IContainer components = null; + + /// + /// Verwendete Ressourcen bereinigen. + /// + /// True, wenn verwaltete Ressourcen gelöscht werden sollen; andernfalls False. + protected override void Dispose(bool disposing) + { + if (disposing && (components != null)) + { + components.Dispose(); + } + base.Dispose(disposing); + } + + #region Vom Windows Form-Designer generierter Code + + /// + /// Erforderliche Methode für die Designerunterstützung. + /// Der Inhalt der Methode darf nicht mit dem Code-Editor geändert werden. + /// + private void InitializeComponent() + { + this.button1 = new System.Windows.Forms.Button(); + this.label1 = new System.Windows.Forms.Label(); + this.label2 = new System.Windows.Forms.Label(); + this.textBox1 = new System.Windows.Forms.TextBox(); + this.textBox2 = new System.Windows.Forms.TextBox(); + this.SuspendLayout(); + // + // button1 + // + this.button1.Location = new System.Drawing.Point(195, 59); + this.button1.Name = "button1"; + this.button1.Size = new System.Drawing.Size(75, 23); + this.button1.TabIndex = 0; + this.button1.Text = "Do it"; + this.button1.UseVisualStyleBackColor = true; + this.button1.Click += new System.EventHandler(this.button1_Click); + // + // label1 + // + this.label1.AutoSize = true; + this.label1.Location = new System.Drawing.Point(12, 9); + this.label1.Name = "label1"; + this.label1.Size = new System.Drawing.Size(106, 13); + this.label1.TabIndex = 1; + this.label1.Text = "Scylla XML File Input"; + // + // label2 + // + this.label2.AutoSize = true; + this.label2.Location = new System.Drawing.Point(37, 33); + this.label2.Name = "label2"; + this.label2.Size = new System.Drawing.Size(81, 13); + this.label2.TabIndex = 2; + this.label2.Text = "ImpREC Output"; + // + // textBox1 + // + this.textBox1.Anchor = ((System.Windows.Forms.AnchorStyles)(((System.Windows.Forms.AnchorStyles.Top | System.Windows.Forms.AnchorStyles.Left) + | System.Windows.Forms.AnchorStyles.Right))); + this.textBox1.Location = new System.Drawing.Point(124, 6); + this.textBox1.Name = "textBox1"; + this.textBox1.Size = new System.Drawing.Size(368, 20); + this.textBox1.TabIndex = 3; + this.textBox1.MouseClick += new System.Windows.Forms.MouseEventHandler(this.textBox1_MouseClick); + this.textBox1.TextChanged += new System.EventHandler(this.textBox1_TextChanged); + this.textBox1.Enter += new System.EventHandler(this.textBox1_Enter); + // + // textBox2 + // + this.textBox2.Anchor = ((System.Windows.Forms.AnchorStyles)(((System.Windows.Forms.AnchorStyles.Top | System.Windows.Forms.AnchorStyles.Left) + | System.Windows.Forms.AnchorStyles.Right))); + this.textBox2.Location = new System.Drawing.Point(124, 30); + this.textBox2.Name = "textBox2"; + this.textBox2.Size = new System.Drawing.Size(368, 20); + this.textBox2.TabIndex = 4; + this.textBox2.Click += new System.EventHandler(this.textBox2_Click); + this.textBox2.Enter += new System.EventHandler(this.textBox2_Enter); + // + // Form1 + // + this.AutoScaleDimensions = new System.Drawing.SizeF(6F, 13F); + this.AutoScaleMode = System.Windows.Forms.AutoScaleMode.Font; + this.ClientSize = new System.Drawing.Size(504, 86); + this.Controls.Add(this.textBox2); + this.Controls.Add(this.textBox1); + this.Controls.Add(this.label2); + this.Controls.Add(this.label1); + this.Controls.Add(this.button1); + this.MaximizeBox = false; + this.Name = "Form1"; + this.Text = "Convert Scylla Tree to ImpREC Tree"; + this.ResumeLayout(false); + this.PerformLayout(); + + } + + #endregion + + private System.Windows.Forms.Button button1; + private System.Windows.Forms.Label label1; + private System.Windows.Forms.Label label2; + private System.Windows.Forms.TextBox textBox1; + private System.Windows.Forms.TextBox textBox2; + } +} + diff --git a/tools/ScyllaToImprecTree/ScyllaToImprecTree/Form1.cs b/tools/ScyllaToImprecTree/ScyllaToImprecTree/Form1.cs new file mode 100644 index 0000000..946cb5e --- /dev/null +++ b/tools/ScyllaToImprecTree/ScyllaToImprecTree/Form1.cs @@ -0,0 +1,125 @@ +using System; +using System.Xml; +using System.IO; + +using System.Windows.Forms; + +namespace ScyllaToImprecTree +{ + public partial class Form1 : Form + { + public Form1() + { + InitializeComponent(); + } + + private string _scyllaXmlPath = @""; + private string _imprecFilePath = @""; + + private void button1_Click(object sender, EventArgs e) + { + StreamWriter outputfile = new System.IO.StreamWriter(_imprecFilePath); + XmlDocument doc = new XmlDocument(); + doc.Load(_scyllaXmlPath); + + XmlNodeList nodes = doc.DocumentElement.SelectNodes("/target/module"); + + string filename = doc.DocumentElement.Attributes["filename"].Value; + string oepVa = doc.DocumentElement.Attributes["oep_va"].Value; + string iatVa = doc.DocumentElement.Attributes["iat_va"].Value; + string iatSize = doc.DocumentElement.Attributes["iat_size"].Value; + + outputfile.WriteLine("Target: " + filename); + outputfile.WriteLine("OEP: " + oepVa + "\tIATRVA: " + iatVa + "\tIATSize: " + iatSize); + outputfile.WriteLine(); + + foreach (XmlNode node in nodes) + { + string moduleFilename = node.Attributes["filename"].Value; + string firstThunkRva = node.Attributes["first_thunk_rva"].Value; + + XmlNodeList nodesImports = node.SelectNodes("import_valid"); + XmlNodeList nodesImportsInvalid = node.SelectNodes("import_invalid"); + + int sum = nodesImports.Count + nodesImportsInvalid.Count; + + outputfile.WriteLine("FThunk: " + firstThunkRva + "\tNbFunc: " + sum.ToString("X")); + + foreach (XmlNode import in nodesImports) + { + string importname = import.Attributes["name"].Value; + string importordinal = import.Attributes["ordinal"].Value; + string importrva = import.Attributes["iat_rva"].Value; + + outputfile.WriteLine("1\t" + importrva + "\t" + moduleFilename + "\t" + importordinal + "\t" + importname); + } + + foreach (XmlNode import in nodesImportsInvalid) + { + string importrva = import.Attributes["iat_rva"].Value; + string address_va = import.Attributes["address_va"].Value; + outputfile.WriteLine("0\t" + importrva + "\t" + moduleFilename + "\t" + 0 + "\t" + address_va); + } + + outputfile.WriteLine(); + } + + outputfile.Close(); + } + + private void textBox1_TextChanged(object sender, EventArgs e) + { + + } + + private void textBox1_Enter(object sender, EventArgs e) + { + openOpenFileDialog(); + } + + private void textBox1_MouseClick(object sender, MouseEventArgs e) + { + openOpenFileDialog(); + } + + private void openOpenFileDialog() + { + string path = string.Empty; + + OpenFileDialog openFileDialog1 = new OpenFileDialog(); + openFileDialog1.Filter = "xml files (*.xml)|*.xml|All files (*.*)|*.*"; + if (openFileDialog1.ShowDialog() == DialogResult.OK) + { + textBox1.Text = openFileDialog1.FileName; + _scyllaXmlPath = openFileDialog1.FileName; + } + } + + private void saveFile() + { + SaveFileDialog saveFileDialog1 = new SaveFileDialog(); + saveFileDialog1.Title = "Save ImpREC File"; + saveFileDialog1.CheckPathExists = true; + saveFileDialog1.DefaultExt = "txt"; + saveFileDialog1.Filter = "Text files (*.txt)|*.txt|All files (*.*)|*.*"; + saveFileDialog1.FilterIndex = 2; + saveFileDialog1.RestoreDirectory = true; + + if (saveFileDialog1.ShowDialog() == DialogResult.OK) + { + textBox2.Text = saveFileDialog1.FileName; + _imprecFilePath = saveFileDialog1.FileName; + } + } + + private void textBox2_Enter(object sender, EventArgs e) + { + saveFile(); + } + + private void textBox2_Click(object sender, EventArgs e) + { + saveFile(); + } + } +} diff --git a/tools/ScyllaToImprecTree/ScyllaToImprecTree/Form1.resx b/tools/ScyllaToImprecTree/ScyllaToImprecTree/Form1.resx new file mode 100644 index 0000000..1af7de1 --- /dev/null +++ b/tools/ScyllaToImprecTree/ScyllaToImprecTree/Form1.resx @@ -0,0 +1,120 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + text/microsoft-resx + + + 2.0 + + + System.Resources.ResXResourceReader, System.Windows.Forms, Version=4.0.0.0, Culture=neutral, PublicKeyToken=b77a5c561934e089 + + + System.Resources.ResXResourceWriter, System.Windows.Forms, Version=4.0.0.0, Culture=neutral, PublicKeyToken=b77a5c561934e089 + + \ No newline at end of file diff --git a/tools/ScyllaToImprecTree/ScyllaToImprecTree/Program.cs b/tools/ScyllaToImprecTree/ScyllaToImprecTree/Program.cs new file mode 100644 index 0000000..a2021a0 --- /dev/null +++ b/tools/ScyllaToImprecTree/ScyllaToImprecTree/Program.cs @@ -0,0 +1,20 @@ +using System; +using System.Collections.Generic; +using System.Windows.Forms; + +namespace ScyllaToImprecTree +{ + static class Program + { + /// + /// Der Haupteinstiegspunkt für die Anwendung. + /// + [STAThread] + static void Main() + { + Application.EnableVisualStyles(); + Application.SetCompatibleTextRenderingDefault(false); + Application.Run(new Form1()); + } + } +} diff --git a/tools/ScyllaToImprecTree/ScyllaToImprecTree/Properties/AssemblyInfo.cs b/tools/ScyllaToImprecTree/ScyllaToImprecTree/Properties/AssemblyInfo.cs new file mode 100644 index 0000000..23b32a0 --- /dev/null +++ b/tools/ScyllaToImprecTree/ScyllaToImprecTree/Properties/AssemblyInfo.cs @@ -0,0 +1,36 @@ +using System.Reflection; +using System.Runtime.CompilerServices; +using System.Runtime.InteropServices; + +// Allgemeine Informationen über eine Assembly werden über die folgenden +// Attribute gesteuert. Ändern Sie diese Attributwerte, um die Informationen zu ändern, +// die mit einer Assembly verknüpft sind. +[assembly: AssemblyTitle("ScyllaToImprecTree")] +[assembly: AssemblyDescription("")] +[assembly: AssemblyConfiguration("")] +[assembly: AssemblyCompany("")] +[assembly: AssemblyProduct("ScyllaToImprecTree")] +[assembly: AssemblyCopyright("Copyright © 2014")] +[assembly: AssemblyTrademark("")] +[assembly: AssemblyCulture("")] + +// Durch Festlegen von ComVisible auf "false" werden die Typen in dieser Assembly unsichtbar +// für COM-Komponenten. Wenn Sie auf einen Typ in dieser Assembly von +// COM zugreifen müssen, legen Sie das ComVisible-Attribut für diesen Typ auf "true" fest. +[assembly: ComVisible(false)] + +// Die folgende GUID bestimmt die ID der Typbibliothek, wenn dieses Projekt für COM verfügbar gemacht wird +[assembly: Guid("4f0db6ab-9ce1-4696-8804-f906dacbc53e")] + +// Versionsinformationen für eine Assembly bestehen aus den folgenden vier Werten: +// +// Hauptversion +// Nebenversion +// Buildnummer +// Revision +// +// Sie können alle Werte angeben oder die standardmäßigen Build- und Revisionsnummern +// übernehmen, indem Sie "*" eingeben: +// [assembly: AssemblyVersion("1.0.*")] +[assembly: AssemblyVersion("1.0.0.0")] +[assembly: AssemblyFileVersion("1.0.0.0")] diff --git a/tools/ScyllaToImprecTree/ScyllaToImprecTree/Properties/Resources.Designer.cs b/tools/ScyllaToImprecTree/ScyllaToImprecTree/Properties/Resources.Designer.cs new file mode 100644 index 0000000..db4a4e3 --- /dev/null +++ b/tools/ScyllaToImprecTree/ScyllaToImprecTree/Properties/Resources.Designer.cs @@ -0,0 +1,63 @@ +//------------------------------------------------------------------------------ +// +// Dieser Code wurde von einem Tool generiert. +// Laufzeitversion:4.0.30319.18444 +// +// Änderungen an dieser Datei können falsches Verhalten verursachen und gehen verloren, wenn +// der Code erneut generiert wird. +// +//------------------------------------------------------------------------------ + +namespace ScyllaToImprecTree.Properties { + using System; + + + /// + /// Eine stark typisierte Ressourcenklasse zum Suchen von lokalisierten Zeichenfolgen usw. + /// + // Diese Klasse wurde von der StronglyTypedResourceBuilder automatisch generiert + // -Klasse über ein Tool wie ResGen oder Visual Studio automatisch generiert. + // Um einen Member hinzuzufügen oder zu entfernen, bearbeiten Sie die .ResX-Datei und führen dann ResGen + // mit der /str-Option erneut aus, oder Sie erstellen Ihr VS-Projekt neu. + [global::System.CodeDom.Compiler.GeneratedCodeAttribute("System.Resources.Tools.StronglyTypedResourceBuilder", "4.0.0.0")] + [global::System.Diagnostics.DebuggerNonUserCodeAttribute()] + [global::System.Runtime.CompilerServices.CompilerGeneratedAttribute()] + internal class Resources { + + private static global::System.Resources.ResourceManager resourceMan; + + private static global::System.Globalization.CultureInfo resourceCulture; + + [global::System.Diagnostics.CodeAnalysis.SuppressMessageAttribute("Microsoft.Performance", "CA1811:AvoidUncalledPrivateCode")] + internal Resources() { + } + + /// + /// Gibt die zwischengespeicherte ResourceManager-Instanz zurück, die von dieser Klasse verwendet wird. + /// + [global::System.ComponentModel.EditorBrowsableAttribute(global::System.ComponentModel.EditorBrowsableState.Advanced)] + internal static global::System.Resources.ResourceManager ResourceManager { + get { + if (object.ReferenceEquals(resourceMan, null)) { + global::System.Resources.ResourceManager temp = new global::System.Resources.ResourceManager("ScyllaToImprecTree.Properties.Resources", typeof(Resources).Assembly); + resourceMan = temp; + } + return resourceMan; + } + } + + /// + /// Ãœberschreibt die CurrentUICulture-Eigenschaft des aktuellen Threads für alle + /// Ressourcenzuordnungen, die diese stark typisierte Ressourcenklasse verwenden. + /// + [global::System.ComponentModel.EditorBrowsableAttribute(global::System.ComponentModel.EditorBrowsableState.Advanced)] + internal static global::System.Globalization.CultureInfo Culture { + get { + return resourceCulture; + } + set { + resourceCulture = value; + } + } + } +} diff --git a/tools/ScyllaToImprecTree/ScyllaToImprecTree/Properties/Resources.resx b/tools/ScyllaToImprecTree/ScyllaToImprecTree/Properties/Resources.resx new file mode 100644 index 0000000..af7dbeb --- /dev/null +++ b/tools/ScyllaToImprecTree/ScyllaToImprecTree/Properties/Resources.resx @@ -0,0 +1,117 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + text/microsoft-resx + + + 2.0 + + + System.Resources.ResXResourceReader, System.Windows.Forms, Version=2.0.0.0, Culture=neutral, PublicKeyToken=b77a5c561934e089 + + + System.Resources.ResXResourceWriter, System.Windows.Forms, Version=2.0.0.0, Culture=neutral, PublicKeyToken=b77a5c561934e089 + + \ No newline at end of file diff --git a/tools/ScyllaToImprecTree/ScyllaToImprecTree/Properties/Settings.Designer.cs b/tools/ScyllaToImprecTree/ScyllaToImprecTree/Properties/Settings.Designer.cs new file mode 100644 index 0000000..8dc9e98 --- /dev/null +++ b/tools/ScyllaToImprecTree/ScyllaToImprecTree/Properties/Settings.Designer.cs @@ -0,0 +1,26 @@ +//------------------------------------------------------------------------------ +// +// Dieser Code wurde von einem Tool generiert. +// Laufzeitversion:4.0.30319.18444 +// +// Änderungen an dieser Datei können falsches Verhalten verursachen und gehen verloren, wenn +// der Code erneut generiert wird. +// +//------------------------------------------------------------------------------ + +namespace ScyllaToImprecTree.Properties { + + + [global::System.Runtime.CompilerServices.CompilerGeneratedAttribute()] + [global::System.CodeDom.Compiler.GeneratedCodeAttribute("Microsoft.VisualStudio.Editors.SettingsDesigner.SettingsSingleFileGenerator", "10.0.0.0")] + internal sealed partial class Settings : global::System.Configuration.ApplicationSettingsBase { + + private static Settings defaultInstance = ((Settings)(global::System.Configuration.ApplicationSettingsBase.Synchronized(new Settings()))); + + public static Settings Default { + get { + return defaultInstance; + } + } + } +} diff --git a/tools/ScyllaToImprecTree/ScyllaToImprecTree/Properties/Settings.settings b/tools/ScyllaToImprecTree/ScyllaToImprecTree/Properties/Settings.settings new file mode 100644 index 0000000..3964565 --- /dev/null +++ b/tools/ScyllaToImprecTree/ScyllaToImprecTree/Properties/Settings.settings @@ -0,0 +1,7 @@ + + + + + + + diff --git a/tools/ScyllaToImprecTree/ScyllaToImprecTree/ScyllaToImprecTree.csproj b/tools/ScyllaToImprecTree/ScyllaToImprecTree/ScyllaToImprecTree.csproj new file mode 100644 index 0000000..9d478cb --- /dev/null +++ b/tools/ScyllaToImprecTree/ScyllaToImprecTree/ScyllaToImprecTree.csproj @@ -0,0 +1,90 @@ + + + + Debug + x86 + 8.0.30703 + 2.0 + {C3E06C45-DE06-4A09-9769-D7C477983440} + WinExe + Properties + ScyllaToImprecTree + ScyllaToImprecTree + v2.0 + + + 512 + + + x86 + true + full + false + bin\Debug\ + DEBUG;TRACE + prompt + 4 + + + x86 + none + true + bin\Release\ + TRACE + prompt + 4 + + + + + + + + + + + + + + + + Form + + + Form1.cs + + + + + Form1.cs + + + ResXFileCodeGenerator + Resources.Designer.cs + Designer + + + True + Resources.resx + True + + + + SettingsSingleFileGenerator + Settings.Designer.cs + + + True + Settings.settings + True + + + + + \ No newline at end of file diff --git a/tools/ScyllaToImprecTree/ScyllaToImprecTree/app.config b/tools/ScyllaToImprecTree/ScyllaToImprecTree/app.config new file mode 100644 index 0000000..e59af44 --- /dev/null +++ b/tools/ScyllaToImprecTree/ScyllaToImprecTree/app.config @@ -0,0 +1,3 @@ + + +