From 2fcff594c070964e362dce706ab5dfbfcdc01ed8 Mon Sep 17 00:00:00 2001 From: Ionut Podgoreanu Date: Wed, 10 Dec 2025 20:55:30 +0200 Subject: [PATCH 1/2] ad916x_fmc: Replace dacfifo with data_offload Signed-off-by: Ionut Podgoreanu --- projects/ad916x_fmc/zcu102/Makefile | 7 +++++-- projects/ad916x_fmc/zcu102/system_bd.tcl | 8 +++++--- projects/ad916x_fmc/zcu102/system_top.v | 4 ---- 3 files changed, 10 insertions(+), 9 deletions(-) diff --git a/projects/ad916x_fmc/zcu102/Makefile b/projects/ad916x_fmc/zcu102/Makefile index 9f96e01bc4c..9d7184ca97c 100644 --- a/projects/ad916x_fmc/zcu102/Makefile +++ b/projects/ad916x_fmc/zcu102/Makefile @@ -11,17 +11,20 @@ M_DEPS += ../../dac_fmc_ebz/common/dac_fmc_ebz_bd.tcl M_DEPS += ../../scripts/adi_pd.tcl M_DEPS += ../../common/zcu102/zcu102_system_constr.xdc M_DEPS += ../../common/zcu102/zcu102_system_bd.tcl -M_DEPS += ../../common/xilinx/dacfifo_bd.tcl +M_DEPS += ../../common/xilinx/data_offload_bd.tcl +M_DEPS += ../../../library/util_hbm/scripts/adi_util_hbm.tcl M_DEPS += ../../../library/jesd204/scripts/jesd204.tcl M_DEPS += ../../../library/common/ad_iobuf.v LIB_DEPS += axi_dmac LIB_DEPS += axi_sysid +LIB_DEPS += data_offload LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac LIB_DEPS += jesd204/axi_jesd204_tx LIB_DEPS += jesd204/jesd204_tx LIB_DEPS += sysid_rom -LIB_DEPS += util_dacfifo +LIB_DEPS += util_do_ram +LIB_DEPS += util_hbm LIB_DEPS += util_pack/util_upack2 LIB_DEPS += xilinx/axi_adxcvr LIB_DEPS += xilinx/util_adxcvr diff --git a/projects/ad916x_fmc/zcu102/system_bd.tcl b/projects/ad916x_fmc/zcu102/system_bd.tcl index 4e9f38aed7b..de33ba9bce6 100644 --- a/projects/ad916x_fmc/zcu102/system_bd.tcl +++ b/projects/ad916x_fmc/zcu102/system_bd.tcl @@ -3,11 +3,12 @@ ### SPDX short identifier: ADIBSD ############################################################################### -set dac_fifo_address_width 13 +## Offload attributes +set dac_offload_type 0 ; ## BRAM +set dac_offload_size [expr $ad_project_params(NUM_LINKS)*$ad_project_params(JESD_L)*64*1024] source $ad_hdl_dir/projects/scripts/adi_pd.tcl source $ad_hdl_dir/projects/common/zcu102/zcu102_system_bd.tcl -source $ad_hdl_dir/projects/common/xilinx/dacfifo_bd.tcl source $ad_hdl_dir/projects/dac_fmc_ebz/common/dac_fmc_ebz_bd.tcl @@ -86,6 +87,7 @@ LINKS=$ad_project_params(NUM_LINKS)\ DAC_DEVICE=$ADI_DAC_DEVICE\ DAC_MODE=$ADI_DAC_MODE\ ADI_LANE_RATE=$ADI_LANE_RATE\ -DAC_FIFO_ADDR_WIDTH=$dac_fifo_address_width" +DAC_OFFLOAD:TYPE=$dac_offload_type\ +SIZE=$dac_offload_size" sysid_gen_sys_init_file $sys_cstring diff --git a/projects/ad916x_fmc/zcu102/system_top.v b/projects/ad916x_fmc/zcu102/system_top.v index 91c2cb67d48..62e13b42e3e 100644 --- a/projects/ad916x_fmc/zcu102/system_top.v +++ b/projects/ad916x_fmc/zcu102/system_top.v @@ -69,7 +69,6 @@ module system_top #( wire [ 2:0] spi1_csn; wire tx_ref_clk; wire [ 1:0] tx_sync; - wire dac_fifo_bypass; // spi @@ -113,8 +112,6 @@ module system_top #( fmc_txen_0 })); - assign dac_fifo_bypass = gpio_o[21]; - /* Board GPIOS. Buttons, LEDs, etc... */ assign gpio_i[20: 8] = gpio_bd_i; assign gpio_bd_o = gpio_o[7:0]; @@ -125,7 +122,6 @@ module system_top #( system_wrapper i_system_wrapper ( .gpio_i (gpio_i), .gpio_o (gpio_o), - .dac_fifo_bypass(dac_fifo_bypass), .spi0_csn (spi0_csn), .spi0_miso (spi_miso), .spi0_mosi (spi_mosi), From 981e1287f3e9c92b46e8be3d82511350048fdc99 Mon Sep 17 00:00:00 2001 From: Ionut Podgoreanu Date: Thu, 11 Dec 2025 17:50:41 +0200 Subject: [PATCH 2/2] docs: ad916x_fmc: Update for Data Offload support Signed-off-by: Ionut Podgoreanu --- .../ad916x_fmc_zcu102_block_diagram.svg | 22 +++++-------------- docs/projects/ad916x_fmc/index.rst | 15 +++++++------ 2 files changed, 13 insertions(+), 24 deletions(-) diff --git a/docs/projects/ad916x_fmc/ad916x_fmc_zcu102_block_diagram.svg b/docs/projects/ad916x_fmc/ad916x_fmc_zcu102_block_diagram.svg index eefee05060a..30d7b6b19b8 100644 --- a/docs/projects/ad916x_fmc/ad916x_fmc_zcu102_block_diagram.svg +++ b/docs/projects/ad916x_fmc/ad916x_fmc_zcu102_block_diagram.svg @@ -4053,15 +4053,15 @@ UTIL_DACFIFO + sodipodi:role="line">DATA_OFFLOAD JESD PHY - 1Mbyte ` - :ref:`axi_dmac` - --- + * - DATA_OFFLOAD + - :git-hdl:`data_offload ` + - :ref:`data_offload` + - --- * - TX JESD LINK - axi_ad916x_jesd - :ref:`axi_jesd204_tx` @@ -81,10 +85,6 @@ The data path and clock domains are depicted in the below diagram: - :git-hdl:`library/xilinx/util_adxcvr` - :ref:`util_adxcvr` - --- - * - UTIL_DACFIFO - - :git-hdl:`util_dacfifo ` - - --- - - --- * - UTIL_UPACK - :git-hdl:`util_upack2 ` - :ref:`util_upack2` @@ -156,6 +156,7 @@ dac_jesd204_transport 0x84A0_4000 dac_jesd204_xcvr 0x84A6_0000 dac_jesd204_link 0x84A9_0000 dac_dma 0x9C42_0000 +dac_data_offload 0x9C43_0000 ======================== =========== SPI connections @@ -311,6 +312,9 @@ HDL related * - AXI_ADXCVR for AMD - :git-hdl:`library/xilinx/axi_adxcvr` - :ref:`axi_adxcvr amd` + * - DATA_OFFLOAD + - :git-hdl:`library/data_offload` + - :ref:`data_offload` * - JESD204_TPL_DAC - :git-hdl:`library/jesd204/ad_ip_jesd204_tpl_dac` - :ref:`ad_ip_jesd204_tpl_dac` @@ -320,9 +324,6 @@ HDL related * - UTIL_ADXCVR for AMD - :git-hdl:`library/xilinx/util_adxcvr` - :ref:`util_adxcvr` - * - UTIL_DACFIFO - - :git-hdl:`library/util_dacfifo` - - :ref:`util_rfifo` * - UTIL_UPACK2 - :git-hdl:`library/util_pack/util_upack2` - :ref:`util_upack2`