Merge branch 'master' into FixBaseClassList

Author: Bolpat

changelog/dmd.deprecation-typesafe-variadic-class.dd

@@ -0,0 +1,40 @@
+Typesafe variadic class parameters have been deprecated
+
+This obscure feature allowed a limited form of implicit construction:
+
+---
+void check(bool x, Exception e...)
+{
+    if (!x)
+        throw e;
+}
+
+void main(string[] args)
+{
+    check(args.length > 1, "missing argument");
+}
+---
+
+However, few uses of this feature have been found, and one project was actually mistakenly using it instead of the more common Typesafe variadic array parameter.
+Considering D doesn't support implicit construction and already has a confusing amount of different variadic parameter forms, it was decided to remove this feature.
+
+As a corrective action, either call the constructor in the callee:
+
+---
+void check(string msg)
+{
+    if (!x)
+        throw new Exception(msg);
+}
+---
+
+Or let the caller construct the class instance:
+
+---
+void check(bool x, Exception e);
+
+void main(string[] args)
+{
+    check(args.length > 1, new Exception("missing argument"));
+}
+---

changelog/dmd.error-messages.dd

@@ -18,6 +18,23 @@ app.d(8): Error: function `attributediagnostic_nothrow.gc1` is not `nothrow`
 app.d(2):        and `object.Exception` being thrown but not caught makes it fail to infer `nothrow`
 )
 
+Function literals are now referred to by their (truncated) function body, instead of the internal `__lambda` name.
+
+---
+/*
+BEFORE:
+
+../test/test_.d(3): Error: function literal `__lambda1()` is not callable using argument types `(int)`
+    (() => 42)(1);
+              ^
+AFTER:
+
+../test/test_.d(3): Error: function literal `() => 42` is not callable using argument types `(int)`
+    (() => 42)(1);
+              ^
+*/
+---
+
 Match levels are now mentioned on ambiguous overloads: [#20637](https://github.com/dlang/dmd/pull/20637)
 
 Before:

compiler/src/dmd/backend/arm/cod1.d

@@ -1162,40 +1162,28 @@ void getlvalue(ref CodeBuilder cdb,ref code pcs,elem* e,regm_t keepmsk,RM rm = R
 // fltregs
 
 /*****************************
- * Given a result in registers, test it for true or false.
- * Will fail if TYfptr and the reg is ES!
- * If saveflag is true, preserve the contents of the
- * registers.
+ * Given a result in registers regm, test it for true or false.
+ * Params:
+ *      cdb = generated code sink
+ *      regm = result register(s) and mPSW
+ *      tym = type of result
+ *      saveflag = true means preserve the contents of the registers
  */
 @trusted
 void tstresult(ref CodeBuilder cdb, regm_t regm, tym_t tym, bool saveflag)
 {
-    reg_t scrreg;                      // scratch register
-    regm_t scrregm;
-
-    //if (!(regm & (mBP | ALLREGS)))
-        //printf("tstresult(regm = %s, tym = x%x, saveflag = %d)\n",
-            //regm_str(regm),tym,saveflag);
+    //printf("tstresult(regm = %s, tym = x%x, saveflag = %d)\n",regm_str(regm),tym,saveflag);
 
     tym = tybasic(tym);
     reg_t reg = findreg(regm);
     uint sz = _tysize[tym];
-    assert(regm & cgstate.allregs);
-static if (0)
-{
-    assert(regm & (XMMREGS | mBP | ALLREGS));
-    if (sz == 1)
-    {
-        assert(regm & BYTEREGS);
-        genregs(cdb, 0x84, reg, reg);        // TEST regL,regL
-        if (I64 && reg >= 4)
-            code_orrex(cdb.last(), REX);
-        return;
-    }
+    assert(regm & (cgstate.allregs | INSTR.FLOATREGS));
+
+    static if (0)
     if (regm & XMMREGS)
     {
         regm_t xregs = XMMREGS & ~regm;
-        const xreg = allocreg(cdb,xregs, TYdouble);
+        const xreg = allocreg(cdb,xregs,TYdouble);
         opcode_t op = 0;
         if (tym == TYdouble || tym == TYidouble || tym == TYcdouble)
             op = 0x660000;
@@ -1211,104 +1199,16 @@ static if (0)
         }
         return;
     }
-}
-    if (sz <= REGSIZE)
-    {
-        if (tym == TYfloat)
-        {
-            if (saveflag)
-            {
-                scrregm = cgstate.allregs & ~regm;              // possible scratch regs
-                scrreg = allocreg(cdb, scrregm, TYoffset); // allocate scratch reg
-                genmovreg(cdb, scrreg, reg);  // MOV scrreg,msreg
-                reg = scrreg;
-            }
-            getregs(cdb, mask(reg));
-            cdb.gen2(0xD1, modregrmx(3, 4, reg)); // SHL reg,1
-            return;
-        }
-    }
-
-    gentstreg(cdb,reg,sz == 8);                 // CMP reg,#0
-
 
-static if (0)
-{
-    if (saveflag || tyfv(tym))
+    if (tyfloating(tym))
     {
-    L1:
-        scrregm = ALLREGS & ~regm;              // possible scratch regs
-        scrreg = allocreg(cdb, scrregm, TYoffset); // allocate scratch reg
-        if (I32 || sz == REGSIZE * 2)
-        {
-            assert(regm & mMSW && regm & mLSW);
-
-            reg = findregmsw(regm);
-            if (I32)
-            {
-                if (tyfv(tym))
-                    genregs(cdb, MOVZXw, scrreg, reg); // MOVZX scrreg,msreg
-                else
-                {
-                    genmovreg(cdb, scrreg, reg);      // MOV scrreg,msreg
-                    if (tym == TYdouble || tym == TYdouble_alias)
-                        cdb.gen2(0xD1, modregrm(3, 4, scrreg)); // SHL scrreg,1
-                }
-            }
-            else
-            {
-                genmovreg(cdb, scrreg, reg);  // MOV scrreg,msreg
-                if (tym == TYfloat)
-                    cdb.gen2(0xD1, modregrm(3, 4, scrreg)); // SHL scrreg,1
-            }
-            reg = findreglsw(regm);
-            genorreg(cdb, scrreg, reg);           // OR scrreg,lsreg
-        }
-        else if (sz == 8)
-        {
-            // !I32
-            genmovreg(cdb, scrreg, AX);           // MOV scrreg,AX
-            if (tym == TYdouble || tym == TYdouble_alias)
-                cdb.gen2(0xD1 ,modregrm(3, 4, scrreg));         // SHL scrreg,1
-            genorreg(cdb, scrreg, BX);            // OR scrreg,BX
-            genorreg(cdb, scrreg, CX);            // OR scrreg,CX
-            genorreg(cdb, scrreg, DX);            // OR scrreg,DX
-        }
-        else
-            assert(0);
+        const ftype = INSTR.szToFtype(sz);
+        cdb.gen1(INSTR.fcmp_float(ftype,0,reg));    // FCMP Vn,#0.0
     }
     else
-    {
-        if (I32 || sz == REGSIZE * 2)
-        {
-            // can't test ES:LSW for 0
-            assert(regm & mMSW & ALLREGS && regm & (mLSW | mBP));
-
-            reg = findregmsw(regm);
-            if (cgstate.regcon.mvar & mask(reg))        // if register variable
-                goto L1;                        // don't trash it
-            getregs(cdb, mask(reg));            // we're going to trash reg
-            if (tyfloating(tym) && sz == 2 * _tysize[TYint])
-                cdb.gen2(0xD1, modregrm(3 ,4, reg));   // SHL reg,1
-            genorreg(cdb, reg, findreglsw(regm));     // OR reg,reg+1
-            if (I64)
-                code_orrex(cdb.last(), REX_W);
-       }
-        else if (sz == 8)
-        {   assert(regm == DOUBLEREGS_16);
-            getregs(cdb,mAX);                  // allocate AX
-            if (tym == TYdouble || tym == TYdouble_alias)
-                cdb.gen2(0xD1, modregrm(3, 4, AX));       // SHL AX,1
-            genorreg(cdb, AX, BX);          // OR AX,BX
-            genorreg(cdb, AX, CX);          // OR AX,CX
-            genorreg(cdb, AX, DX);          // OR AX,DX
-        }
-        else
-            assert(0);
-    }
+        gentstreg(cdb,reg,sz == 8);                 // CMP reg,#0
     code_orflag(cdb.last(),CFpsw);
 }
-}
 
 
 /******************************
@@ -2300,22 +2200,10 @@ static if (1)
         cdrelconst(cgstate,cdb,e,outretregs);
         return;
     }
-    if (tyfloating(tym))
-    {
-        objmod.fltused();
-        if (config.fpxmmregs &&
-            (tym == TYcfloat || tym == TYcdouble) &&
-            (outretregs & (XMMREGS | mPSW))
-           )
-        {
-            cloadxmm(cdb, e, outretregs);
-            return;
-        }
-    }
 
     if (outretregs == mPSW)
     {
-        regm_t retregs = cgstate.allregs;
+        regm_t retregs = tyfloating(tym) ? INSTR.FLOATREGS : cgstate.allregs;
         loaddata(cdb, e, retregs);
         fixresult(cdb, e, retregs, outretregs);
         return;
@@ -2326,8 +2214,6 @@ static if (1)
     cs.Iflags = 0;
     flags = outretregs & mPSW;             /* save original                */
     forregs = outretregs & (cgstate.allregs | INSTR.FLOATREGS);     // XMMREGS ?
-    //if (outretregs & mSTACK)
-        //forregs |= DOUBLEREGS;
     if (e.Eoper == OPconst)
     {
         if (tyvector(tym) && forregs & XMMREGS)
@@ -2397,7 +2283,7 @@ static if (1)
             const reg_t preg = e.Voffset ? e.Vsym.Spreg2 : e.Vsym.Spreg;
             const regm_t pregm = mask(preg);
 
-            if (!(sz <= 2 && pregm & XMMREGS))   // no SIMD instructions to load 1 or 2 byte quantities
+            //if (!(sz <= 2 && pregm & XMMREGS))   // no SIMD instructions to load 1 or 2 byte quantities
             {
                 if (debugr)
                     printf("%s.%d is fastpar and using register %s\n",
@@ -2458,7 +2344,7 @@ static if (1)
                 }
             }
         }
-        else if (forregs & XMMREGS)
+        else if (0 && forregs & XMMREGS)
         {
             // Can't load from registers directly to XMM regs
             //e.Vsym.Sflags &= ~GTregcand;
@@ -2477,10 +2363,18 @@ static if (1)
         }
         else if (sz <= REGSIZE)
         {
-            // LDR reg,[sp,#offset]
-            // https://www.scs.stanford.edu/~zyedidia/arm64/ldr_imm_gen.html
-            opcode_t opmv = PSOP.ldr | (29 << 5);
-            loadea(cdb, e, cs, opmv, reg, 0, 0, 0, RM.load);
+            if (tyfloating(tym))
+            {
+                loadea(cdb,e,cs,0,reg,0,0,0,RM.load);
+                outretregs = mask(reg);
+            }
+            else
+            {
+                // LDR reg,[sp,#offset]
+                // https://www.scs.stanford.edu/~zyedidia/arm64/ldr_imm_gen.html
+                opcode_t opmv = PSOP.ldr | (29 << 5);
+                loadea(cdb, e, cs, opmv, reg, 0, 0, 0, RM.load);
+            }
         }
         else if (sz <= 2 * REGSIZE)
         {
@@ -2515,6 +2409,7 @@ static if (1)
             assert(0);
         // Flags may already be set
         outretregs &= flags | ~mPSW;
+        //printf("outretregs: %llx\n", outretregs);
         fixresult(cdb, e, forregs, outretregs);
         return;
     }

compiler/src/dmd/backend/arm/cod2.d

@@ -374,7 +374,8 @@ void cddiv(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pretregs)
 @trusted
 void cdnot(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pretregs)
 {
-    //printf("cdnot()\n");
+    //printf("cdnot() pretregs = %s\n", regm_str(pretregs));
+    //elem_print(e);
     reg_t reg;
     regm_t forflags;
     elem* e1 = e.E1;
@@ -391,33 +392,23 @@ void cdnot(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pretregs)
 
     if (tyfloating(e1.Ety))
     {
-        code* cnop  = gen1(null, INSTR.nop);
-        code* ctrue = gen1(null, INSTR.nop);
-        logexp(cdb,e.E1,(op == OPnot) ? false : true,FL.code,ctrue);
-        forflags = pretregs & mPSW;
-        if (I64 && sz == 8)
-            forflags |= 64;
-        assert(tysize(e.Ety) <= REGSIZE);              // result better be int
-        CodeBuilder cdbfalse;
-        cdbfalse.ctor();
-        reg = allocreg(cdbfalse,pretregs,e.Ety);        // allocate reg for result
-        code* cfalse = cdbfalse.finish();
-        CodeBuilder cdbtrue;
-        cdbtrue.ctor();
-        cdbtrue.append(ctrue);
-        for (code* c1 = cfalse; c1; c1 = code_next(c1))
-            cdbtrue.gen(c1);                                      // duplicate reg save code
-        CodeBuilder cdbfalse2;
-        cdbfalse2.ctor();
-        movregconst(cdbfalse2,reg,0,forflags);                    // mov 0 into reg
-        cgstate.regcon.immed.mval &= ~mask(reg);                  // mark reg as unavail
-        movregconst(cdbtrue,reg,1,forflags);                      // mov 1 into reg
-        cgstate.regcon.immed.mval &= ~mask(reg);                  // mark reg as unavail
-        genBranch(cdbfalse2,COND.al,FL.code,cast(block*) cnop);   // JMP cnop
-        cdb.append(cfalse);
-        cdb.append(cdbfalse2);
-        cdb.append(cdbtrue);
-        cdb.append(cnop);
+        regm_t retregs1 = INSTR.FLOATREGS;
+        codelem(cgstate,cdb,e.E1,retregs1,1);
+        const V1 = findreg(retregs1);
+        const ftype = INSTR.szToFtype(sz);
+        cdb.gen1(INSTR.fcmpe_float(ftype,0,V1));        // FCMPE V1,#0.0
+
+        regm_t retregs = pretregs & cgstate.allregs;
+        if (!retregs)
+            retregs = cgstate.allregs;
+        const Rd = findreg(retregs);
+        const cond = op == OPnot ? COND.ne : COND.eq;
+        cdb.gen1(INSTR.cset(sz == 8,cond,Rd));          // CSET Rd,eq
+        uint N,immr,imms;
+        assert(encodeNImmrImms(0xFF,N,immr,imms));
+        cdb.gen1(INSTR.log_imm(0,0,0,immr,imms,Rd,Rd)); // AND Rd,Rd,#0xFF
+        pretregs &= ~mPSW;                              // flags already set
+        fixresult(cdb,e,retregs,pretregs);
     }
     else
     {