fix: align counter allocation for overflow

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
Source: b0cdaac

Author: BartoszDunajski

level_zero/core/source/cmdlist/cmdlist_hw.inl

@@ -207,7 +207,7 @@ void CommandListCoreFamily<gfxCoreFamily>::handleInOrderCounterOverflow(bool cop
         uint32_t newOffset = 0;
         if (inOrderExecInfo->getAllocationOffset() == 0) {
             // multitile immediate writes are uint64_t aligned
-            newOffset = this->partitionCount * device->getL0GfxCoreHelper().getImmediateWritePostSyncOffset();
+            newOffset = alignUp(this->partitionCount * device->getL0GfxCoreHelper().getImmediateWritePostSyncOffset(), MemoryConstants::cacheLineSize * 4);
         }
 
         inOrderExecInfo->setAllocationOffset(newOffset);

level_zero/core/source/device/device.cpp

@@ -35,7 +35,7 @@ NEO::TagAllocatorBase *getInOrderCounterAllocator(std::unique_ptr<NEO::TagAlloca
 
             const size_t maxPartitionCount = neoDevice.getDeviceBitfield().count();
 
-            const size_t nodeSize = immediateWritePostSyncOffset * maxPartitionCount * 2; // Multiplied by 2 to handle 32b overflow
+            const size_t nodeSize = alignUp(immediateWritePostSyncOffset * maxPartitionCount, MemoryConstants::cacheLineSize * 4) * 2; // Multiplied by 2 to handle 32b overflow
 
             DEBUG_BREAK_IF(alignUp(nodeSize, MemoryConstants::cacheLineSize) * NodeT::defaultAllocatorTagCount > MemoryConstants::pageSize64k);
 

level_zero/core/test/unit_tests/sources/cmdlist/test_in_order_cmdlist_1.cpp

@@ -765,7 +765,9 @@ HWTEST_F(InOrderCmdListTests, whenCreatingInOrderExecInfoThenReuseDeviceAlloc) {
     auto immCmdList2 = createImmCmdList<FamilyType::gfxCoreFamily>();
     auto gpuVa2 = immCmdList2->inOrderExecInfo->getBaseDeviceAddress();
 
-    EXPECT_EQ(alignUp(gpuVa1 + (device->getL0GfxCoreHelper().getImmediateWritePostSyncOffset() * 2), MemoryConstants::cacheLineSize), gpuVa2);
+    auto offset = alignUp(device->getL0GfxCoreHelper().getImmediateWritePostSyncOffset(), MemoryConstants::cacheLineSize * 4) * 2;
+
+    EXPECT_EQ(alignUp(gpuVa1 + offset, MemoryConstants::cacheLineSize), gpuVa2);
 
     // allocation from the same allocator
     EXPECT_EQ(immCmdList1->inOrderExecInfo->getDeviceCounterAllocation(), tag->getBaseGraphicsAllocation()->getGraphicsAllocation(0));
@@ -4660,7 +4662,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, InOrderCmdListTests, givenInOrderModeWhenProgrammin
             expectedCounter += static_cast<uint64_t>(std::numeric_limits<uint32_t>::max()) - 1;
         } else {
             expectedCounter = 1;
-            expectedOffset = useZeroOffset ? 0 : device->getL0GfxCoreHelper().getImmediateWritePostSyncOffset();
+            expectedOffset = useZeroOffset ? 0 : alignUp(device->getL0GfxCoreHelper().getImmediateWritePostSyncOffset(), MemoryConstants::cacheLineSize * 4);
         }
 
         EXPECT_EQ(expectedCounter, immCmdList->inOrderExecInfo->getCounterValue());
@@ -4740,7 +4742,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, InOrderCmdListTests, givenInOrderModeWhenProgrammin
             EXPECT_EQ(immCmdList->inOrderExecInfo->getBaseDeviceAddress(), postSync.getDestinationAddress());
         }
     } else {
-        offset = device->getL0GfxCoreHelper().getImmediateWritePostSyncOffset();
+        offset = alignUp(device->getL0GfxCoreHelper().getImmediateWritePostSyncOffset(), MemoryConstants::cacheLineSize * 4);
         if (isCompactEvent) {
             auto pcItor = find<PIPE_CONTROL *>(walkerItor, cmdList.end());
             ASSERT_NE(cmdList.end(), pcItor);