Hello @pascalgouedo,
I am running a test that converts an input in FP64 format into signed INT32.
operands_i = '{64'hc1e0000000000020, 64'h0, 64'h0}
rnd_mode_i = RNE
op_i = F2I
op_mode_i = 0
src_fmt_i = FP64
int_fmt_i = INT32
The result computed by the cvfpu is 64'hffffffff80000000 and the NV flag is set. However, after rounding, the converted result is equal to 64'hffffffff80000000 , ie -2^31 which is representable in INT32 format. Therefore, I expect the NX to be generated instead.
A similar issue was reported here #83 and fixed with release v0.8.1 #101.
The difference with that issue is that the input value was an integer equal to -2^31 (the smallest representable value). In this case, the input value is a double that is rounded into -2^31, which should not trigger an overflow.
@khandelwaltanuj