diff --git a/src/content/aeps/aep-1/README.md b/src/content/aeps/aep-1/README.md
index cd3fe9a57..76f7eb886 100644
--- a/src/content/aeps/aep-1/README.md
+++ b/src/content/aeps/aep-1/README.md
@@ -3,7 +3,7 @@ aep: 1
 title: AEP Purpose and Guidelines
 status: Final
 type: Meta
-author: Greg Osuri (@gosuri), Adam Bozanich (@boz)
+author: Greg Osuri (@gosuri) Adam Bozanich (@boz)
 discussions-to: https://github.com/ovrclk/aep/issues/1
 created: 2020-03-09
 updated: 2020-03-17
@@ -266,4 +266,4 @@ This document was derived heavily from [Ethereum's EIP-1] written by Martin Becz
 
 ## Copyright
 
-All content herein is licensed under [Apache 2.0](https://www.apache.org/licenses/LICENSE-2.0).
\ No newline at end of file
+All content herein is licensed under [Apache 2.0](https://www.apache.org/licenses/LICENSE-2.0).
diff --git a/src/content/aeps/aep-11/README.md b/src/content/aeps/aep-11/README.md
index bc28ec1ae..5882f315f 100644
--- a/src/content/aeps/aep-11/README.md
+++ b/src/content/aeps/aep-11/README.md
@@ -1,12 +1,12 @@
 ---
 aep: 11
 title: Managed Services Market
-author: Greg Osuri (@gosuri), Adam Bozanich (@boz)
+author: Greg Osuri (@gosuri) Adam Bozanich (@boz)
 status: Draft
 type: Standard
 category: Core
 created: 2020-03-09
-estimated-completion: 2026-01-01
+estimated-completion: 2026-12-15
 roadmap: major
 ---
 
diff --git a/src/content/aeps/aep-12/README.md b/src/content/aeps/aep-12/README.md
index e96fa8c7d..43a82d053 100644
--- a/src/content/aeps/aep-12/README.md
+++ b/src/content/aeps/aep-12/README.md
@@ -1,14 +1,3955 @@
 ---
 aep: 12
 title: Trusted Execution Environment (TEE)
-author: Adam Bozanich (@boz), Greg Osuri (@gosuri)
+author: Adam Bozanich (@boz) Greg Osuri (@gosuri)
 discussions-to: https://github.com/orgs/akash-network/discussions/614
 status: Draft
 type: Standard
 category: Core
 created: 2020-03-17
-updated: 2024-12-01
-estimated-completion: 2025-06-30
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+updated: 2025-07-07
+estimated-completion: 2025-08-30
+=======
+updated: 2025-07-30
+estimated-completion: 2025-09-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-09-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-09-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-09-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-09-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-09-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-09-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-09-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-09-30
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 roadmap: major
 ---
 
diff --git a/src/content/aeps/aep-13/README.md b/src/content/aeps/aep-13/README.md
index 0124e7c2e..e904456cb 100644
--- a/src/content/aeps/aep-13/README.md
+++ b/src/content/aeps/aep-13/README.md
@@ -1,7 +1,7 @@
 ---
 aep: 13
 title: "Mainnet 2: DCX Platform"
-author: Kaustubh Patral (@kaustubhkapatral), Greg Osuri (@gosuri)
+author: Kaustubh Patral (@kaustubhkapatral) Greg Osuri (@gosuri)
 status: Final
 type: Standard
 category: Core
@@ -81,4 +81,4 @@ In the event of upgrade complications, a well-defined rollback procedure should
 
 ## Copyright
 
-All content herein is licensed under [Apache 2.0](https://www.apache.org/licenses/LICENSE-2.0).
\ No newline at end of file
+All content herein is licensed under [Apache 2.0](https://www.apache.org/licenses/LICENSE-2.0).
diff --git a/src/content/aeps/aep-19/README.md b/src/content/aeps/aep-19/README.md
index 7431cd581..d2952cf3f 100644
--- a/src/content/aeps/aep-19/README.md
+++ b/src/content/aeps/aep-19/README.md
@@ -1,7 +1,7 @@
 ---
 aep: 19
 title: "Open Development Model"
-author: Greg Osuri (@gosuri), Anil Murty (@anilmurty)
+author: Greg Osuri (@gosuri) Anil Murty (@anilmurty)
 status: Final
 type: Meta
 created: 2022-12-19
@@ -49,4 +49,4 @@ Regular meetings help the Akash Network community operate more efficiently. If n
 
 ## Announcements
 
-* [Public Cloud is a Public Utility](https://akash.network/blog/public-cloud-is-a-public-utility/)
\ No newline at end of file
+* [Public Cloud is a Public Utility](https://akash.network/blog/public-cloud-is-a-public-utility/)
diff --git a/src/content/aeps/aep-29/README.md b/src/content/aeps/aep-29/README.md
index 054a4f805..83ec8aceb 100644
--- a/src/content/aeps/aep-29/README.md
+++ b/src/content/aeps/aep-29/README.md
@@ -1,197 +1,52590 @@
 ---
 aep: 29
-title: "Verifiable Hardware Provisioning"
-author: Sriram Vishwanath (@sriramvish) Artur Troian (@troian)
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+title: "Hardware Verification (Via Attestation)"
+=======
+title: "Hardware Verification using Trusted Execution"
+>>>>>>> Stashed changes
+=======
+title: "Hardware Verification using Trusted Execution"
+>>>>>>> Stashed changes
+=======
+title: "Hardware Verification using Trusted Execution"
+>>>>>>> Stashed changes
+=======
+title: "Hardware Verification using Trusted Execution"
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+=======
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+=======
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+title: "Hardware Verification using Trusted Execution"
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+=======
+title: "Hardware Verification using Trusted Execution"
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+=======
+title: "Hardware Verification using Trusted Execution"
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+=======
+title: "Hardware Verification using Trusted Execution"
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+=======
+title: "Hardware Verification using Trusted Execution"
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+title: "Hardware Verification using Trusted Execution"
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+=======
+title: "Hardware Verification using Trusted Execution"
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+=======
+title: "Hardware Verification using Trusted Execution"
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+=======
+title: "Hardware Verification using Trusted Execution"
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+=======
+title: "Hardware Verification using Trusted Execution"
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+=======
+title: "Hardware Verification using Trusted Execution"
+>>>>>>> Stashed changes
+=======
+title: "Hardware Verification using Trusted Execution"
+>>>>>>> Stashed changes
+=======
+title: "Hardware Verification using Trusted Execution"
+>>>>>>> Stashed changes
+=======
+title: "Hardware Verification using Trusted Execution"
+>>>>>>> Stashed changes
+=======
+title: "Hardware Verification using Trusted Execution"
+>>>>>>> Stashed changes
+=======
+title: "Hardware Verification using Trusted Execution"
+>>>>>>> Stashed changes
+=======
+title: "Hardware Verification using Trusted Execution"
+>>>>>>> Stashed changes
+=======
+title: "Hardware Verification using Trusted Execution"
+>>>>>>> Stashed changes
+=======
+title: "Hardware Verification using Trusted Execution"
+>>>>>>> Stashed changes
+=======
+title: "Hardware Verification using Trusted Execution"
+>>>>>>> Stashed changes
+=======
+title: "Hardware Verification using Trusted Execution"
+>>>>>>> Stashed changes
+=======
+title: "Hardware Verification using Trusted Execution"
+>>>>>>> Stashed changes
+=======
+title: "Hardware Verification using Trusted Execution"
+>>>>>>> Stashed changes
+=======
+title: "Hardware Verification using Trusted Execution"
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+=======
+title: "Hardware Verification using Trusted Execution"
+>>>>>>> Stashed changes
+=======
+title: "Hardware Verification using Trusted Execution"
+>>>>>>> Stashed changes
+author: Anil Murty (@anilmurty) Artur Troian (@troian)
 status: Final
 type: Standard
 category: Core
 created: 2024-06-27
-updated: 2024-12-01
-estimated-completion: 2025-06-31
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+updated: 2025-05-15
+estimated-completion: 2025-06-15
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
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+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-15
+>>>>>>> Stashed changes
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+>>>>>>> Stashed changes
 roadmap: major
-discussions-to: https://github.com/orgs/akash-network/discussions/614
-resolution: https://www.mintscan.io/akash/proposals/261
 ---
+## Motivation
+
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
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+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
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+<<<<<<< Updated upstream
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+<<<<<<< Updated upstream
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+<<<<<<< Updated upstream
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+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
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+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+Hardware Verification is an important aspect of improving the credibility of a decentralized platform like Akash and is a key component to achieving support for Confidential Computing as outlined in [AEP-65](https://akash.network/roadmap/aep-65/)
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+=======
+Currently, hardware provided by a provider is verified using a decentralized network of Auditors on Akash. While this approach is practical for a limited set of providers, the manual verification is proving challenging at scale, even more critical when incentives go onchain and are distributed without a human in the loop. Hardware Verification using Trusted Execution minimizes trust required to verify the accuracy of hardware provided by the providers on Akash network and serves as a fundamental building block for enabling Confidential Computing capabilities, as detailed in [AEP-65](https://akash.network/roadmap/aep-65/).
+>>>>>>> Stashed changes
+
+## Summary & Background
+
+Hardware Verification is the process of verifying that the specific CPU or GPU is what the provider claims to be. In the context of [Confidential Computing](https://akash.network/roadmap/aep-65/), this is achieved through an attestation process using a Trusted Authority
+
+### Attestation Process
+<<<<<<< Updated upstream
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+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
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+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+##### 1.  Measurement Collection 
+   The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+     - Platform identity (vendor, model, firmware version)
+     - Enclave or VM launch measurements
+     - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+##### 2. Verification
+   The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf),[NVIDIA NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+   
+   The verifier perfoms the following functions:
+     - Authenticates the hardware’s cryptographic identity
+     - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+     - Validates integrity and authenticity of the platform state
+
+##### 3. **Policy Enforcement**
+   Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+     - Is the platform from an approved vendor/model?
+     - Are all firmware and drivers up-to-date?
+     - Was the workload launched in a verified TEE?
+
+  The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+  - Gate access to secrets or encrypted data
+  - Approve running a sensitive workload
+  - Trigger alerts or block execution in untrusted environments
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service)
+https://nras.attestation.nvidia.com/
+https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html 
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system
+
+https://github.com/intel/trustauthority-client-for-python 
+https://github.com/intel/trustauthority-client-for-go 
+
+![Intel Attestation](intel-ita-attestation.png)
+
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+#### TEE Enabled Host Kernel & BIOS configuration
+
+BIOS configuration changes need to be made to enable TDX/ SGX (for intel) and SEV (for AMD). These typically also require a certain minimum version of the Linux Kernel to be used.
+
+##### Intel
+
+Enable memory encryption, TDX and SGX for Intel: https://github.com/canonical/tdx/blob/1.2/README.md 
+
+##### AMD
+
+Enable AMD SEV: https://github.com/AMDESE/AMDSEV/blob/master/README.md 
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
 
-## Motivation
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
+
+![Intel Attestation](intel-ita-attestation.png)
+
+## Scope of Work
+
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
+
+To that end, the following will need to be done
+
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+>>>>>>> Stashed changes
+=======
+
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
+
+![Attestation High-Level Flow](attestation-high-level.png)
+
+At a high level, the attestation process involves three main steps:
+
+#### 1.  Measurement Collection 
+
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
+
+
+#### 2. Verification
+
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
+
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
+
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
+
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
+
+### Vendor SDKs
+
+#### NVTrust SDK
+
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
+
+This is what attestation with the Nvidia SDK looks like at a high level
+
+![NVTrust Attestation](nvtrust-attestation.png)
+
+### Intel Trusted Authority SDK
+
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
 
-Verification of resources is critical for on-chain incentivization; hence, we propose a TEE-based verification mechanism detailed below and extend the [Trusted providers](../aep-9/README.md) proposal.
+![Intel Attestation](intel-ita-attestation.png)
 
-## Summary
+## Scope of Work
 
-Verifiable computing is an entire class of algorithms or systems where a particular portion of the compute stack is verifiable/provable in a trustless manner to participants within a decentralized network. Verifiable computing can take many forms, including:
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
 
-Verifiable provisioning of hardware: This corresponds to the case where we desire to verify the nature and extent to which a piece of hardware is provisioned for the Akash network.
+To that end, the following will need to be done
 
-Specifically, if a 4090 GPU were to be incorporated in the Akash network, verifiable provisioning ensures that it indeed matches its hardware specifications, and it is genuinely allocated for functions on the Akash network.
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
 
-Verifiable execution of program/software: This corresponds to the case where a program (any AI program, ranging from inference to training) is correctly executed on a node/set of nodes in the Akash network. For example, that a particular piece of code was executed correctly in a cluster of 4090s on the Akash network. Verifiable execution of programs/software also comes in multiple flavors, including:
-- Non-real-time: An offline verification mechanism that presents a proof in non-real-time, where the proof has no time or size constraints.
-- Optimistic, real-time proofs: An optimistic proof mechanism that can be verified or contested in (near) real time.
-- Zero knowledge, real-time proofs: A zero knowledge proof mechanism (that does not reveal anything about the inputs but can still be verified) in (near) real time.
+#### TEE Capable CPUs
 
-In this proposal, for the first year of this project, we focus on only the first type of verifiability: That of provisioning of hardware. After the completion of this first portion of the project, a further proposal will be submitted on non-real-time and subsequently, real-time verifiable computing within the Akash network. Please review the discussions on Github here (https://github.com/orgs/akash-network/discussions/614).
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
 
-## Benefits to Akash Network
+#### TEE Capable GPUs
 
-The need for verifiable provisioning of hardware is significant for a variety of reasons, including the elimination/reduction of Sybil attacks, and of other forms of misrepresentation and abuse in the network.
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
 
-## Verifiable Hardware Provisioning
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
 
-Verifiable hardware provisioning can be achieved in a variety of ways: by using schemes uniquely associated with particular types of hardware, by using access patterns and footprints associated with a particular make and model, and other ways. However, these schemes are dependent on hardware configurations and do not necessarily generalize well. In order to develop a scalable, universal solution, we take a trusted enclave (trusted execution environment) approach as follows:
+>>>>>>> Stashed changes
+=======
 
-Akash providers that intend to be "hardware verifiable" are equipped with a TEE, configured by Akash (such as Trusty [1], for more information on TEE, see tutorial [2]). Such a TEE contains a physically unclonable function (a PUF, see [3]) that can securely sign transactions. To ensure uniformity, this TEE will be designed to be a USB A/C dongle that can be attached to any hardware configuration.
+The attestation process with a trusted Authority is ratified in the  IETF's [Remote Attestation Procedures Architecture (RATS) RFC 9334](https://datatracker.ietf.org/doc/rfc9334/) and can be outlined in the following block diagram. In this diagram, the "Attester" is the software running on the device (typically the CPU/ GPU), the "Relying Party" is the client (typically the application developer) and the "Reference Value Provider" is the vendor (Nvidia, Intel, AMD etc)
 
-We will verify that the USB A/C dongle can be attached to any hardware configuration and provide a detailed set of instructions to install and use this dongle to enable each provider to become "hardware verifiable" on Akash.
+![Attestation High-Level Flow](attestation-high-level.png)
 
-This TEE will periodically perform the following two tasks, based on an internal pseudo-random timer:
+At a high level, the attestation process involves three main steps:
 
-### Identification task
+#### 1.  Measurement Collection 
 
-Following a pseudo-random clock, the TEE will query every GPU in the specific Akash provider on its status and device-level details.
+The system gathers cryptographic measurements from the hardware platform — including CPU, GPU, firmware, bootloader, and drivers. These measurements serve as a unique fingerprint of the environment, rooted in hardware (e.g., via Intel TDX, AMD SEV-SNP, or NVIDIA NVTrust). These may include:
+  - Platform identity (vendor, model, firmware version)
+  - Enclave or VM launch measurements
+  - Device-specific attestation evidence (e.g., GPU certificate chain)
 
-### Provisioning task
 
-Periodically and randomly, a random machine learning task will be assigned to the GPUs within this provider. These provisioning tasks are based on existing, well-known benchmarks on the performance of GPUs to certain deep learning tasks, including particular types of models [4], more general deep learning models [5] and other tasks that are well-known benchmarks on existing GPUs [6].
+#### 2. Verification
 
-After the conclusion of each type of pseudorandomly repeated task, the TEE will securely sign the message, and will share the secure message with the Akash network.
+The collected evidence is sent to a remote verifier — either a vendor-provided service (e.g., [Intel Trust Authority](https://www.intel.com/content/www/us/en/security/trust-authority.html), [AMD Attestation Service](https://www.amd.com/content/dam/amd/en/documents/developer/lss-snp-attestation.pdf), NVIDIA [NVTrust CA](https://docs.nvidia.com/attestation/#overview)) or a custom verifier (sometime called a “local verifier”). 
 
-The tasks are used to ensure the following properties:
+The verifier perfoms the following functions:
+  - Authenticates the hardware’s cryptographic identity
+  - Compares measurements against a set of trusted baseline values (aka “golden measurements”)
+  - Validates integrity and authenticity of the platform state
 
-### Identification task
+#### 3. Policy Enforcement
+Based on the result of verification, an attestation policy is evaluated to determine if the workload should proceed. The policy might check for the following things:
+  - Is the platform from an approved vendor/model?
+  - Are all firmware and drivers up-to-date?
+  - Was the workload launched in a verified TEE?
 
-The identification task sets up the base configuration for each GPU cluster, and assigns a unique signature associated with the TEE with that cluster. As the identification is performed at the operating system level, it can potentially be spoofed, and therefore, the provisioning/benchmarking tasks are required.
+The outcome is a binary verdict (e.g., Attestation OK or Rejected) which can be used to:
+- Gate access to secrets or encrypted data
+- Approve running a sensitive workload
+- Trigger alerts or block execution in untrusted environments
 
-### Provisioning task
+### Vendor SDKs
 
-The provisioning/benchmarking tasks verify the identification while simultaneously ensuring that the associated GPUs are dedicated to the Akash network and are not prioritizing other tasks. In case they are not provisioned for the Akash network, they will fail the provisioning task.
+#### NVTrust SDK
 
-A key point is that both the entire system (user, operating system) cannot differentiate between a provisioning/benchmarking task and a regular AI workload provided by the Akash network, and therefore cannot selectively serve a particular type of workload/task. This ensures that the GPUs are both correctly identified and are made available to Akash network-centric tasks at all times.
+Nvidia provides the [NVTRUST SDK](https://github.com/NVIDIA/nvtrust) that abstracts a lot of the complexity involved in attesting Nvidia GPUs (primarily H100s and NVSwitches) for trusted execution. This SDK provides abstractions for gathering evidence (aka measurements) as well as a verifier (NRAS) that plugs into Nvidia’s internal build pipeline (to obtain “golden measurements” through the RIM service). For reference see NRAS [documention](https://nras.attestation.nvidia.com/) and [API](https://docs.nvidia.com/attestation/api-docs-nras/latest/nras_api.html).
 
-## Implementation
+This is what attestation with the Nvidia SDK looks like at a high level
 
-With provider service installaiton comes `Feature Discovery Service` (FDS) which hands inventory information to the provider engine.
-The FDS functionality will be extended to snapshot information below which further will be signed by the provider and placed to the **DA**:
-- CPU
- - cpu id
- - architecture
- - model
- - vendor
-   - micro-architecture [levels](https://github.com/HenrikBengtsson/x86-64-level)
- - features
-- GPU
- - gpu id
- - vendor (already implemented)
- - model (already implemented)
- - memory size (already implemented)
- - interface (already implemented)
-- Memory
-  - vendor
-  - negotiated speed
-  - timings
-  - serial number
-- Storage
+![NVTrust Attestation](nvtrust-attestation.png)
 
-### Workflow
+### Intel Trusted Authority SDK
 
-For provider to be verified it must:
-- commit first snapshot of resources upon commissioning to the network
-- allow Auditor to inspect hardware
-- commit snapshots:
-  - whenever there is change to the hardware due to expansion, maintenance
-  - when challenged by the Auditor (workflow TBD)
+Since GPUs do not operte standalone - they typically are part of a server that includes a CPU (and memory, storage and other things) which is where the application is typically executed (with the AI model then getting loaded into GPU memory for inference or training or fine-tuning), the attestation must encompass the CPU, GPU and the interface between them. To make this easy for customers, Intel has an SDK of its own that plugs into the NVTrust SDK and enables performing attestation for the whole system with SDKs available in  [python](https://github.com/intel/trustauthority-client-for-python) and [golang](https://github.com/intel/trustauthority-client-for-go).
 
+![Intel Attestation](intel-ita-attestation.png)
 
-### Stores extension
-1. Implement extension to the `x/provider` store
-   ```protobuf
-   syntax = "proto3";
-   package akash.provider.v1beta4;
+## Scope of Work
 
-   import "gogoproto/gogo.proto";
-   import "cosmos_proto/cosmos.proto";
+The Scope of work of this AEP is to test and document the hardware and BIOS configuration necessary to perform attestation so that this can be used to guide Akash Providers and to support the larger [Confidential Computing](https://akash.network/roadmap/aep-65/) goal. 
 
-   message ResourcesSnapshot {
-       string owner    = 1 [
-           (cosmos_proto.scalar) = "cosmos.AddressString",
-           (gogoproto.jsontag)   = "owner",
-           (gogoproto.moretags)  = "yaml:\"owner\""
-       ];
-       google.protobuf.Duration timestamp = 2 [
-           (gogoproto.jsontag) = "timestamp",
-           (gogoproto.moretags) = "yaml:\"timestamp\""
-       ];
-       // location of the snapshot on the external DA
-       string filepath = 3;
-       // checksum of the timestamp, filepath and it's content
-       string hash = 4;
-   }
-   ```
-2. Implement extension to the `x/audit` store
-   ```protobuf
-   syntax = "proto3";
-   package akash.audit.v1;
+To that end, the following will need to be done
 
-   import "akash/provider/v1beta4/provider.proto";
+1. Obtain or set up a provider with a GPU node or cluster that has the TEE capable hardware as noted in the following section 
+2. Apply BIOS configuration to allow access to the device nodes
+3. Verify (manually) that attestation can be performed for the whole node
 
-   message AuditedResourcesSnapshot {
-      string auditor = 1 [
-        (gogoproto.jsontag)  = "auditor",
-        (gogoproto.moretags) = "yaml:\"auditor\""
-      ];
+#### TEE Capable CPUs
 
-      akash.provider.v1beta4.ResourcesSnapshot snapshot = 2;
-   }
-   ```
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
 
-## Team
+#### TEE Capable GPUs
 
-The team for this project is led by Prof. Sriram Vishwanath from The University of Texas, Austin. Sriram Vishwanath is a professor at The University of Texas, Austin and Shruti Raghavan is a PhD candidate in Computer Science at UT Austin. They are working together with the Harvard Medical School and MITRE on the design of new foundation/base models in healthcare, with causal learning incorporated into such a platform.
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
 
-Sriram Vishwanath received the B. Tech. degree in Electrical Engineering from the Indian Institute of Technology (IIT), Madras, India in 1998, the M.S. degree in Electrical Engineering from California Institute of Technology (Caltech, Pasadena USA) in 1999, and the Ph.D. degree in Electrical Engineering from Stanford University, Stanford, CA USA in 2003. Currently, he is Professor in the Chandra Department of Electrical and Computer Engineering at The University of Texas at Austin, and recently, a Technical Fellow for Distributed Systems and Machine Learning at MITRE Labs.
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
 
-## Timeline
+>>>>>>> Stashed changes
+#### TEE Enabled Host Kernel & BIOS configuration
 
-Open Discussions: Starting end of June 2024
-Governance Proposal: Through first half of July, 2024
-Design Phase: Through Q3 and Q4 2024
-Hacknet TEE Phase: Q1 2025
-Devnet TEE Phase: Q2 2025
-Conclusion of Hardware Provisioning testing and handover to Akash Team: End of Q2 2025
-Note: This is subject to change based on feedback
-
-## Deliverables
-
-Q3 2024 - High Level Design
-Q4 2024 - Design Specification
-Q1 2025 - Initial Hacknet Prototype
-Q2 2025 - Devnet and Conclusion of Testing
-
-## Budget
-
-The tentative budget for this project is presented in the spreadsheet attached here (https://docs.google.com/spreadsheets/d/1asmvyi5r7QgKRjsImZInAENXptr_cwoW/edit?usp=sharing&ouid=103645797398143147236&rtpof=true&sd=true).
-
-The high-level breakdown for the budget is:
-R\&D Costs (Student salaries + tuition + University Overhead): $146,547
-Akash Computing/Hardware Costs: $75,000
-Volatility and Liquidation Buffer (10%): $22,154.70
-
-Total budget requested: $243,701.70 or 68,842.28 AKT
-Wallet Address: akash1sa5quyrpmf3l2acfrwgsy9t34yxpkvwrnqdmm0
-
-## Disbursement:
-
-Disbursement will happen in two increments, coinciding with the few weeks before the beginning of each semester - Fall 2024 (on July 22nd 2024) and Spring 2025 (December 15 2024).
-
-## References
-
-[1] Trusty TEE: Android Open Source Project https://source.android.com/docs/security/features/trusty
-[2] TEE 101 White Paper https://www.securetechalliance.org/wp-content/uploads/TEE-101-White-Paper-FINAL2-April-2018.pdf
-[3] Shamsoshoara, Alireza, et al. "A survey on physical unclonable function (PUF)-based security solutions for Internet of Things." Computer Networks 183 (2020): 107593.
-[4] Wang, Yu Emma, Gu-Yeon Wei, and David Brooks. "Benchmarking TPU, GPU, and CPU platforms for deep learning." arXiv preprint arXiv:1907.10701 (2019).
-[5] Shi, Shaohuai, et al. "Benchmarking state-of-the-art deep learning software tools." 2016 7th International Conference on Cloud Computing and Big Data (CCBD). IEEE, 2016.
-[6] Araujo, Gabriell, et al. "NAS Parallel Benchmarks with CUDA and beyond." Software: Practice and Experience 53.1 (2023): 53-80.
+BIOS configuration changes need to be made to enable TDX/ SGX (for intel) and SEV (for AMD). These typically also require a certain minimum version of the Linux Kernel to be used.
 
-## Copyright
+## References 
 
-All content herein is licensed under [Apache 2.0](https://www.apache.org/licenses/LICENSE-2.0).
+1. [Intel](https://github.com/canonical/tdx/blob/1.2/README.md): Enable memory encryption, TDX and SGX for Intel 
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+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
+=======
+2. [AMD](https://github.com/AMDESE/AMDSEV/blob/master/README.md): Enable AMD SEV
+>>>>>>> Stashed changes
diff --git a/src/content/aeps/aep-29/attestation-high-level.png b/src/content/aeps/aep-29/attestation-high-level.png
new file mode 100644
index 000000000..2822bfb2c
Binary files /dev/null and b/src/content/aeps/aep-29/attestation-high-level.png differ
diff --git a/src/content/aeps/aep-29/intel-ita-attestation.png b/src/content/aeps/aep-29/intel-ita-attestation.png
new file mode 100644
index 000000000..5ef1fdf60
Binary files /dev/null and b/src/content/aeps/aep-29/intel-ita-attestation.png differ
diff --git a/src/content/aeps/aep-29/nvtrust-attestation.png b/src/content/aeps/aep-29/nvtrust-attestation.png
new file mode 100644
index 000000000..84aa07609
Binary files /dev/null and b/src/content/aeps/aep-29/nvtrust-attestation.png differ
diff --git a/src/content/aeps/aep-30/README.md b/src/content/aeps/aep-30/README.md
index a107d8c25..042bc9a46 100644
--- a/src/content/aeps/aep-30/README.md
+++ b/src/content/aeps/aep-30/README.md
@@ -1,13 +1,6472 @@
 ---
 aep: 30
-title: "Cosmos SDK v0.47 Migration"
+title: "Cosmos SDK v0.53 Migration"
 author: Cheng Wang (@lechenghiskhan) Artur Troian (@atroian) Scott Carrutthers (@chainzero)
 status: Final
 type: Standard
 category: Core
 created: 2024-08-29
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-estimated-completion: 2025-03-15
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+=======
+estimated-completion: 2025-03-31
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2025-03-31
+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
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+>>>>>>> Stashed changes
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
+estimated-completion: 2025-03-31
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2025-03-31
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 roadmap: major
 requires: 61
 discussions-to: https://github.com/orgs/akash-network/discussions/673
@@ -279,4 +6738,4 @@ All funds will be liquidated and managed in a manner that ensures minimal impact
 
 ## Copyright
 
-All content herein is licensed under [Apache 2.0](https://www.apache.org/licenses/LICENSE-2.0).
\ No newline at end of file
+All content herein is licensed under [Apache 2.0](https://www.apache.org/licenses/LICENSE-2.0).
diff --git a/src/content/aeps/aep-33/README.md b/src/content/aeps/aep-33/README.md
index b973c459a..8ef35c012 100644
--- a/src/content/aeps/aep-33/README.md
+++ b/src/content/aeps/aep-33/README.md
@@ -3,13 +3,4709 @@ aep: 33
 title: "Escrow Balance Alerts in Akash Console"
 description: "Alerting system for low escrow balance"
 author: Anil Murty (@anilmurty) Maxime Beauchamp (@baktun14)
-status: Draft
+status: Final
 type: Standard
 category: Interface
 created: 2024-12-01
-updated: 2025-01-10
-estimated-completion: 2025-02-28
-roadmap: minor
+updated: 2025-03-12
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+roadmap: major
 ---
 
 ## Motivation
@@ -20,3 +4716,5 @@ One of the primary issues users face with Akash is the unexpected termination of
 
 Users of Akash Console will have the option of configuring a low escrow balance alert for any deployment within their account and optionally tieing the alert to a notification channel. The initial notification channel supported will be email with more notification channels added over time, based on customer/ user feedback. The alert configuration will allow the user to specify a name that will show up in tne notification email subject as well as notes in the body that will let them quickly identify which account and deployment the alert is associated with. In addition the user will have the option to specify a threshold (<, =, >) that will determine when the alert is triggered. Lastly the user will have a global view of all alerts configured in the account and will be able to perform certain actions from there like viewing the alert configuration, disabling or deleting it and viewing all the past events triggered from it.
 
+Github Milestone: https://github.com/akash-network/console/milestone/15
+
diff --git a/src/content/aeps/aep-34/README.md b/src/content/aeps/aep-34/README.md
index 883785e71..7ca21de07 100644
--- a/src/content/aeps/aep-34/README.md
+++ b/src/content/aeps/aep-34/README.md
@@ -7,7 +7,4319 @@ type: Standard
 category: Interface
 created: 2024-12-01
 updated: 2025-01-10
-estimated-completion: 2025-03-15
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 roadmap: minor
 ---
 
diff --git a/src/content/aeps/aep-35/README.md b/src/content/aeps/aep-35/README.md
index a5515cb46..5f7b6e029 100644
--- a/src/content/aeps/aep-35/README.md
+++ b/src/content/aeps/aep-35/README.md
@@ -6,8 +6,4320 @@ status: Draft
 type: Standard
 category: Interface
 created: 2024-12-01
-updated: 2024-12-06
-estimated-completion: 2025-03-30
+updated: 2024-03-19
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
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+=======
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 roadmap: minor
 ---
 
diff --git a/src/content/aeps/aep-36/README.md b/src/content/aeps/aep-36/README.md
index 2673db3f0..16e3f9b07 100644
--- a/src/content/aeps/aep-36/README.md
+++ b/src/content/aeps/aep-36/README.md
@@ -6,8 +6,4368 @@ status: Draft
 type: Standard
 category: Interface
 created: 2024-12-01
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 updated: 2024-12-01
-estimated-completion: 2025-06-30
+estimated-completion: 2025-10-15
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+=======
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2026-01-15
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 roadmap: minor
 ---
 
diff --git a/src/content/aeps/aep-37/README.md b/src/content/aeps/aep-37/README.md
index 3e5a04280..9bd52bd79 100644
--- a/src/content/aeps/aep-37/README.md
+++ b/src/content/aeps/aep-37/README.md
@@ -6,8 +6,4368 @@ status: Draft
 type: Standard
 category: Core
 created: 2024-12-01
-updated: 2024-12-09
-estimated-completion: 2025-04-30
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+=======
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 roadmap: minor
 ---
 
diff --git a/src/content/aeps/aep-38/README.md b/src/content/aeps/aep-38/README.md
index f1fcbd804..c604c3bd4 100644
--- a/src/content/aeps/aep-38/README.md
+++ b/src/content/aeps/aep-38/README.md
@@ -6,8 +6,192 @@ status: Draft
 type: Standard
 category: Interface
 created: 2024-12-01
-updated: 2024-12-07
-estimated-completion: 2025-07-30
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+=======
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+>>>>>>> Stashed changes
+=======
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 roadmap: minor
 ---
 
diff --git a/src/content/aeps/aep-39/README.md b/src/content/aeps/aep-39/README.md
index 8b0f6c8b6..aab5e3b0e 100644
--- a/src/content/aeps/aep-39/README.md
+++ b/src/content/aeps/aep-39/README.md
@@ -6,8 +6,4368 @@ status: Draft
 type: Standard
 category: Interface
 created: 2024-12-01
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 updated: 2025-01-11
-estimated-completion: 2025-06-30
+estimated-completion: 2025-07-30
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-12-31
+>>>>>>> Stashed changes
+=======
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 roadmap: minor
 ---
 
diff --git a/src/content/aeps/aep-4/README.md b/src/content/aeps/aep-4/README.md
index deaa6af95..4fcebe007 100644
--- a/src/content/aeps/aep-4/README.md
+++ b/src/content/aeps/aep-4/README.md
@@ -1,7 +1,7 @@
 ---
 aep: 4
 title: "Testnet: Alpha"
-author: Greg Osuri (@gosuri), Adam Bozanich (@boz)
+author: Greg Osuri (@gosuri) Adam Bozanich (@boz)
 status: Final
 type: Meta
 requires: 2, 3
diff --git a/src/content/aeps/aep-40/README.md b/src/content/aeps/aep-40/README.md
index 42dda3e42..d34ee06bc 100644
--- a/src/content/aeps/aep-40/README.md
+++ b/src/content/aeps/aep-40/README.md
@@ -7,7 +7,191 @@ type: Standard
 category: Interface
 created: 2024-12-01
 updated: 2025-01-10
-estimated-completion: 2025-05-15
+<<<<<<< Updated upstream
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+=======
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 roadmap: minor
 ---
 
diff --git a/src/content/aeps/aep-41/README.md b/src/content/aeps/aep-41/README.md
index e19804333..2f501df45 100644
--- a/src/content/aeps/aep-41/README.md
+++ b/src/content/aeps/aep-41/README.md
@@ -6,8 +6,5099 @@ status: Draft
 type: Standard
 category: Interface
 created: 2024-12-01
-updated: 2024-12-01
-estimated-completion: 2025-04-30
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+estimated-completion: 2025-06-30
+=======
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 roadmap: minor
 ---
 
diff --git a/src/content/aeps/aep-42/README.md b/src/content/aeps/aep-42/README.md
index 820dce853..72e86ee2f 100644
--- a/src/content/aeps/aep-42/README.md
+++ b/src/content/aeps/aep-42/README.md
@@ -6,8 +6,192 @@ status: Draft
 type: Standard
 category: Interface
 created: 2024-12-01
-updated: 2024-12-01
-estimated-completion: 2025-12-30
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+=======
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 roadmap: minor
 ---
 
diff --git a/src/content/aeps/aep-43/README.md b/src/content/aeps/aep-43/README.md
index 89bc697c2..bfe78cbdf 100644
--- a/src/content/aeps/aep-43/README.md
+++ b/src/content/aeps/aep-43/README.md
@@ -6,8 +6,3903 @@ status: Draft
 type: Standard
 category: Interface
 created: 2024-12-01
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 updated: 2024-01-11
-estimated-completion: 2025-06-30
+estimated-completion: 2025-09-15
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2025-11-15
+>>>>>>> Stashed changes
+=======
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+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
+estimated-completion: 2026-07-15
+>>>>>>> Stashed changes
 roadmap: minor
 ---
 
diff --git a/src/content/aeps/aep-44/README.md b/src/content/aeps/aep-44/README.md
index aea1fa43a..c5182d724 100644
--- a/src/content/aeps/aep-44/README.md
+++ b/src/content/aeps/aep-44/README.md
@@ -7,7 +7,7 @@ type: Standard
 category: Core
 created: 2024-12-01
 updated: 2025-01-11
-estimated-completion: 2026-08-30
+estimated-completion: 2026-10-31
 roadmap: minor
 ---
 
diff --git a/src/content/aeps/aep-45/README.md b/src/content/aeps/aep-45/README.md
index 200e50555..027ec83a5 100644
--- a/src/content/aeps/aep-45/README.md
+++ b/src/content/aeps/aep-45/README.md
@@ -7,7 +7,7 @@ type: Standard
 category: Interface
 created: 2024-12-01
 updated: 2024-12-01
-estimated-completion: 2025-11-30
+estimated-completion: 2026-08-31
 roadmap: minor
 ---
 
diff --git a/src/content/aeps/aep-47/README.md b/src/content/aeps/aep-47/README.md
index f30dfc6c7..18da5c278 100644
--- a/src/content/aeps/aep-47/README.md
+++ b/src/content/aeps/aep-47/README.md
@@ -7,7 +7,7 @@ type: Standard
 category: Core
 created: 2024-12-01
 updated: 2024-12-10
-estimated-completion: 2025-12-31
+estimated-completion: 2026-12-31
 roadmap: minor
 ---
 
diff --git a/src/content/aeps/aep-48/README.md b/src/content/aeps/aep-48/README.md
index 1ec721c1a..0eebb1abf 100644
--- a/src/content/aeps/aep-48/README.md
+++ b/src/content/aeps/aep-48/README.md
@@ -7,7 +7,7 @@ type: Standard
 category: Core
 created: 2024-12-01
 updated: 2025-01-11
-estimated-completion: 2026-05-30
+estimated-completion: 2026-07-30
 roadmap: major
 ---
 
diff --git a/src/content/aeps/aep-49/README.md b/src/content/aeps/aep-49/README.md
index b83a097c1..49a2702c4 100644
--- a/src/content/aeps/aep-49/README.md
+++ b/src/content/aeps/aep-49/README.md
@@ -7,7 +7,7 @@ type: Standard
 category: Core
 created: 2024-12-01
 updated: 2025-01-11
-estimated-completion: 2026-02-20
+estimated-completion: 2026-03-31
 roadmap: major
 ---
 
diff --git a/src/content/aeps/aep-5/README.md b/src/content/aeps/aep-5/README.md
index bdd100b81..de07f5aaf 100644
--- a/src/content/aeps/aep-5/README.md
+++ b/src/content/aeps/aep-5/README.md
@@ -1,7 +1,7 @@
 ---
 aep: 5
 title: "AKT: Akash Network Token & Mining Economics"
-author: Greg Osuri (@gosuri), Adam Bozanich (@boz)
+author: Greg Osuri (@gosuri) Adam Bozanich (@boz)
 status: Final
 type: Standard
 category: Economics
diff --git a/src/content/aeps/aep-50/README.md b/src/content/aeps/aep-50/README.md
index 058f84d12..25c27a8c5 100644
--- a/src/content/aeps/aep-50/README.md
+++ b/src/content/aeps/aep-50/README.md
@@ -7,7 +7,7 @@ type: Standard
 category: Core
 created: 2024-12-01
 updated: 2025-01-10
-estimated-completion: 2025-11-30
+estimated-completion: 2026-06-30
 roadmap: minor
 ---
 
diff --git a/src/content/aeps/aep-51/README.md b/src/content/aeps/aep-51/README.md
index 216fe519c..f5fff9e4c 100644
--- a/src/content/aeps/aep-51/README.md
+++ b/src/content/aeps/aep-51/README.md
@@ -7,7 +7,7 @@ type: Standard
 category: Core
 created: 2024-12-01
 updated: 2025-01-10
-estimated-completion: 2026-01-30
+estimated-completion: 2026-07-31
 roadmap: minor
 ---
 
diff --git a/src/content/aeps/aep-52/README.md b/src/content/aeps/aep-52/README.md
index a5d1764ab..792079b66 100644
--- a/src/content/aeps/aep-52/README.md
+++ b/src/content/aeps/aep-52/README.md
@@ -7,7 +7,191 @@ type: Core
 category: Interface
 created: 2024-12-01
 updated: 2024-12-01
-estimated-completion: 2025-06-30
+<<<<<<< Updated upstream
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+=======
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+>>>>>>> Stashed changes
+=======
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+=======
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+=======
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+>>>>>>> Stashed changes
 roadmap: minor
 ---
 
diff --git a/src/content/aeps/aep-53/README.md b/src/content/aeps/aep-53/README.md
index 8c0f89e78..2ba20876b 100644
--- a/src/content/aeps/aep-53/README.md
+++ b/src/content/aeps/aep-53/README.md
@@ -6,8 +6,3903 @@ status: Draft
 type: Standard
 category: Interface
 created: 2024-12-01
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 updated: 2025-01-10
-estimated-completion: 2025-05-30
+estimated-completion: 2025-08-30
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-30
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+=======
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+=======
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 roadmap: major
 ---
 
diff --git a/src/content/aeps/aep-54/README.md b/src/content/aeps/aep-54/README.md
index 25341f3c1..dbd86821a 100644
--- a/src/content/aeps/aep-54/README.md
+++ b/src/content/aeps/aep-54/README.md
@@ -7,7 +7,191 @@ type: Standard
 category: Core
 created: 2024-01-05
 updated: 2025-01-10
-estimated-completion: 2025-05-15
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+<<<<<<< Updated upstream
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+<<<<<<< Updated upstream
+estimated-completion: 2025-12-15
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
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+=======
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+=======
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+=======
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+=======
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+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2026-12-15
+>>>>>>> Stashed changes
 roadmap: minor
 ---
 
diff --git a/src/content/aeps/aep-55/README.md b/src/content/aeps/aep-55/README.md
index 954b90462..55ed36b62 100644
--- a/src/content/aeps/aep-55/README.md
+++ b/src/content/aeps/aep-55/README.md
@@ -6,9 +6,2277 @@ status: Draft
 type: Standard
 category: Economics
 created: 2024-12-07
-updated: 2024-12-07
-estimated-completion: 2025-06-30
+updated: 2025-07-07
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+estimated-completion: 2025-10-30
 roadmap: minor
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
 ---
 
 ## Motivation
diff --git a/src/content/aeps/aep-56/README.md b/src/content/aeps/aep-56/README.md
index 1f30ad879..fa4a72381 100644
--- a/src/content/aeps/aep-56/README.md
+++ b/src/content/aeps/aep-56/README.md
@@ -1,30 +1,7783 @@
 ---
 aep: 56
-title: "Unified Akash Integration API"
-author: Anil Murty (@anilmurty) Artur Troian (@troian) Iaroslav Gryshaiev (@ygrishajev) Maxime Beauchamp (@baktun14)
+title: "Chain SDK"
+author: Anil Murty (@anilmurty) Artur Troian (@troian) Serhii Stotsky (@baktun14) Maxime Beauchamp (@baktun14)
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 status: Draft
 type: Standard
 category: Interface
 created: 2025-01-10
-updated: 2025-01-10
-estimated-completion: 2025-03-15
+<<<<<<< Updated upstream
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+=======
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+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
+=======
+status: Final
+type: Standard
+category: Interface
+created: 2025-01-10
+updated: 2025-07-30
+completed: 2025-10-30
+>>>>>>> Stashed changes
 roadmap: major
 ---
 
-
 ## Motivation
 
-Integrations are a key part of Akash's growth strategy. In order for integrations to happen quicker Akash needs first class API support, coupled with easy to follow documentation and support for multiple programming languages.
+Integrations are a key part of Akash's ecosystem growth strategy. In order for integrations to happen quicker Akash needs a feature rich and easy to use library for both blockchain nodes and provider nodes.
+
+## Background
+
+Right now interacting with the blockchain and the provider is arduous for someone who is not deeply involved with the core team. The reasons for this are primarily because there are a mix of different implementations for various things as noted here:
+
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
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+<<<<<<< Updated upstream
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+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
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+<<<<<<< Updated upstream
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+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
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+<<<<<<< Updated upstream
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+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
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+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+- Blockchain nodes are built using CosmosSDK. 
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+=======
+- Blockchain nodes are built using CosmosSDK.
+>>>>>>> Stashed changes
+- Queries are done via a pure grpc service on top of protobuf.
+- Transactions are done via RPC servers but the wire encoding also uses protobuf
+- Provider nodes currently have a mix of GRPC server + protobuf and REST handlers for some of the mutations which are going to be rewritten to GRPC methods as well (see akash-network/support#191)
+
+## Scope of Work
+
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+Investigate and implement chain SDK which supports: 
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+=======
+Investigate and implement chain SDK which supports:
+>>>>>>> Stashed changes
+* blockchain nodes API
+* provider nodes API
+* cosmosSDK built-in function (e.g., getting last block)
+
+Additionally, this SDK should have:
+* certificates manager and corresponding utils (https://github.com/akash-network/akashjs/blob/main/src/certificates/certificate-manager/CertificateManager.ts)
+* certificate validation logic for provider nodes https://github.com/akash-network/console/blob/main/apps/provider-proxy/src/services/CertificateValidator.ts
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
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+<<<<<<< Updated upstream
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+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+* SDL related logic 
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+=======
+* SDL related logic
+>>>>>>> Stashed changes
+  - move from https://github.com/akash-network/akashjs/blob/main/src/sdl/SDL/SDL.ts
+  - move from https://github.com/akash-network/console/tree/main/apps/deploy-web/src/utils/sdl
+  - we implemented SDL import from yaml and generator from object to yaml. The generator will have to be re-designed because it currently received an object of the type of the SDL builder form, which is not technically 1:1 with the SDL spec.
+
+All changes needs to be done in https://github.com/akash-network/akash-api/tree/sdk-47 (sdk-47 branch). Library should have the best possible typescript support in order to make it super-easy to use with IDE. Also it should be possible to use in browser, so it needs to be bundle size wise.
+
+### Additional notes
+
+#### api/grpc
+```ts
+import { ChainSDK } from "@akashnetwork/chain-sdk/chain-sdk"
+
+// Using the sdk instance
+const chainSdk = new ChainSDK({
+  rest: "https://api.akashnet.net",
+  rpc: "https://rpc.akashnet.net"
+});
+
+// Querying data from api or grpc with typed parameters
+// https://api.akashnet.net/akash/deployment/v1beta3/deployments/info?id.owner=akash1234&id.dseq=1234;
+const response = await axios.get(chainSdk.rest.deployments.info({ owner: "akash1234", dseq: "1234" }));
+const deployment = response.data.deployment; // Typed response
+
+// Potential grpc usage
+const response = await chainSdk.grpc.deployments.info({ owner: "akash1234", dseq: "1234" });
+```
+
+#### protobuf
+
+```ts
+// Importing the protobuf types
+import { MsgCreateBid } from "@akashnetwork/chain-sdk/akash/market/v1beta4";
+```
+
+#### certificates
+
+```ts
+// Certificate utils
+import { certificateManager } from "@akashnetwork/chain-sdk/certificate";
 
-## Summary
+const { cert: crtpem, publicKey: pubpem, privateKey: encryptedKey } = certificateManager.generatePEM(address);
+```
 
-While Akash has a Javascript API (AKashJS), it really is more of an SDK. Further, based on going through integrations with over a dozen partners, it is clear that folks cannot use it without handholding from the core team. The issues that users of AkashJS run into include, challenges with using the documented examples as well as not having enough examples. Akash needs a better JS API that abstracts away a lot of the underlying complexity of the blockchain and Akash specific things and is accompanies by easy to follow documentation. The story is similar for the GoLang API. Further, most API driven products offer suport for a wide range of programming languages.
+#### sdl
 
-The goal is this AEP is to build a first class API that can be used by partners and customers in a self-serve manner. If done correctly, this would be comparable if not better that the API offered by API-first companies like stripe (https://docs.stripe.com/api).
+```ts
+import { SDL, v2Sdl, NetworkId } from "@akashnetwork/chain-sdk/sdl";
 
-Specificaly the scope of this AEP will include
-- Designing and implementing new interfaces that abstract a lot of the blockchain and Akash specific things as far as possible
-- Implementing better error handling and reporting (HTTP response codes)
-- Implementing version management
-- Evaulating options for documentation (JSDocs, type-doc, Swagger, Docusaurus, Slateor others) and choosing one.
-- Deciding on how to publicly display the API reference (where to put it, link it from etc)
+export function getSdl(yamlJson: string | v2Sdl, networkType: NetworkType, networkId: NetworkId) {
+  return isValidString(yamlJson) ? SDL.fromString(yamlJson, networkType, networkId) : new SDL(yamlJson, networkType, networkId);
+}
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
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+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
+```
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+>>>>>>> Stashed changes
+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+>>>>>>> Stashed changes
+=======
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+=======
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+=======
+```
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+=======
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+=======
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+>>>>>>> Stashed changes
+=======
+```
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+=======
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+=======
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+=======
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+=======
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+>>>>>>> Stashed changes
+=======
+```
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+=======
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+=======
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+>>>>>>> Stashed changes
+=======
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+=======
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+=======
+```
+>>>>>>> Stashed changes
+=======
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+=======
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+=======
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+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
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+=======
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+=======
+```
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+>>>>>>> Stashed changes
+=======
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+=======
+```
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+=======
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+=======
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+=======
+```
+>>>>>>> Stashed changes
+=======
+```
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+=======
+```
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+=======
+```
+>>>>>>> Stashed changes
+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
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+=======
+```
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+=======
+```
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+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
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+=======
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+=======
+```
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+=======
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+=======
+```
+>>>>>>> Stashed changes
+=======
+```
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+=======
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+=======
+```
+>>>>>>> Stashed changes
+=======
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+=======
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+=======
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+=======
+```
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+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
+```
+>>>>>>> Stashed changes
+=======
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+>>>>>>> Stashed changes
diff --git a/src/content/aeps/aep-57/README.md b/src/content/aeps/aep-57/README.md
index 113005b36..6e014f73f 100644
--- a/src/content/aeps/aep-57/README.md
+++ b/src/content/aeps/aep-57/README.md
@@ -1,7 +1,7 @@
 ---
 aep: 57
 title: "Automatic Escrow Top Up"
-author: Iaroslav Gryshaiev (@ygryshajev) Maxime Beauchamp (@baktun14) Anil Murty (@anilmurty)
+author: Iaroslav Gryshaiev (@ygrishajev) Maxime Beauchamp (@baktun14) Anil Murty (@anilmurty)
 status: Draft
 type: Standard
 category: Interface
@@ -22,4 +22,4 @@ Implement a new UI setting in the existing settings page that allows users to en
 https://github.com/akash-network/console/issues/412
 
 Implement a worker CLI handler that automatically adds funds (top-ups) to Akash Network deployments when they are low on balance. This ensures deployments continue to run without requiring users to manually monitor and replenish funds, improving the user experience.
-https://github.com/akash-network/console/issues/395 
+https://github.com/akash-network/console/issues/395
diff --git a/src/content/aeps/aep-58/README.md b/src/content/aeps/aep-58/README.md
index 5be269554..af0ef8163 100644
--- a/src/content/aeps/aep-58/README.md
+++ b/src/content/aeps/aep-58/README.md
@@ -6,8 +6,4368 @@ status: Draft
 type: Standard
 category: Interface
 created: 2024-01-05
+<<<<<<< Updated upstream
+<<<<<<< Updated upstream
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 updated: 2024-01-05
-estimated-completion: 2025-05-15
+estimated-completion: 2025-08-15
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
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+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
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+>>>>>>> Stashed changes
+=======
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+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
+updated: 2025-07-07
+estimated-completion: 2025-08-30
+>>>>>>> Stashed changes
+=======
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 roadmap: minor
 ---
 
diff --git a/src/content/aeps/aep-59/README.md b/src/content/aeps/aep-59/README.md
index a717b8983..1d4ccc767 100644
--- a/src/content/aeps/aep-59/README.md
+++ b/src/content/aeps/aep-59/README.md
@@ -6,9 +6,5972 @@ status: Draft
 type: Standard
 category: Interface
 created: 2024-01-05
-updated: 2025-01-10
-estimated-completion: 2025-03-15
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+=======
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+>>>>>>> Stashed changes
+=======
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+=======
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+=======
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+=======
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+=======
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+>>>>>>> Stashed changes
+=======
+estimated-completion: 2025-07-15
+>>>>>>> Stashed changes
+=======
+estimated-completion: 2025-07-15
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+>>>>>>> Stashed changes
+=======
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diff --git a/src/content/aeps/aep-60/README.md b/src/content/aeps/aep-60/README.md
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 ---
 aep: 60
-title: "Akash at Home"
-author: Greg Osuri (@gosuri)
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+title: "Akash at Home - MVP"
+=======
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+author: Anil Murty (@anilmurty) Damir Simpovic (@shimpa1) Jigar Patel (@jigar-arc10) Deval Patel (@devalpatel67) Greg Osuri (@gosuri)
 status: Draft
 type: Meta
 created: 2024-12-01
-updated: 2024-12-06
-estimated-completion: 2026-03-30
+updated: 2025-07-24
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 roadmap: major
 ---
 
 ## Motivation
 
-As AI becomes more pervasive in our daily lives, the need for secure, private home-based AI infrastructure is growing. Traditional cloud-based AI services often require sending sensitive data to remote servers, raising privacy concerns. Akash at Home addresses this by enabling users to leverage their home computing resources to host AI workloads securely within their own network.
+Enabling the average "home" user to participate in Akash as a provider is critical to both - scaling the supply side of the network as well as positioning the network to lead in the shift away from large data center compute in response to the oncoming energy crisis
 
-## Summary
-
-Akash at Home is an initiative to transform residential computing resources into powerful AI hosting environments. The project aims to:
-- Utilize unused compute capacity in home environments
-- Enable private, secure AI workload hosting
-- Democratize access to AI infrastructure
-- Create a decentralized network of home-based compute resources
-
-## Model A: Production Grade Edge Datacenter at Home
-
-A production-grade edge data center at home consists of high-performance computing hardware optimized for AI inference workloads. This setup enables running sophisticated AI models locally, such as DeepSeek R1 (671B parameters), achieving speeds of 3,872 tokens per second. Key components include:
-
-- Enterprise-grade GPU infrastructure
-- High-bandwidth networking
-- Redundant power systems
-- Advanced cooling solutions
-
-In this scenario, we propose a topology with feasibility in Austin, Texas, where you're effectively acquiring the data center at no cost using Akash over a 5-year window.
-
-### Hardware Requirements
-
-- **High-Density GPU Servers:** The facility will host 5 × 8-GPU NVIDIA HGX H200 servers (total 40 GPUs). Each server is configured similarly to an AWS p5.48xlarge instance, with 8 H200 GPUs connected via NVLink/NVSwitch for high-bandwidth peer-to-peer communication (up to ~900 GB/s interconnect)​[^SECUREMACHINERY.COM]. Each server includes dual high-end CPUs (e.g. 3rd Gen AMD EPYC), ~2 TB of RAM, and ~30 TB of NVMe SSD storage, matching the p5.48xlarge specs​[^AWS.AMAZON.COM].
-This ensures each server can deliver performance comparable to AWS’s top GPU instances. This ensures each server can deliver performance comparable to AWS’s top GPU instances.
-- **NVLink Switch Fabric**: An NVSwitch (NVLink Switch) is integrated into each HGX H200 baseboard, allowing all 8 GPUs in a server to directly communicate at full bandwidth. This provides ~3.6 TB/s bisection bandwidth within each server​[^AWS.AMAZON.COM], critical for multi-GPU training efficiency. The NVLink/NVSwitch fabric is a core component to match AWS’s architecture.
-- **Rack Infrastructure:** All equipment will be mounted in a standard 42U data center rack. The 5 GPU servers (each ~4U–6U form factor) occupy roughly 20–30U, leaving space for networking gear and cooling components. Power Distribution Units (PDUs) (likely two for redundancy) are installed in-rack to supply power to each server’s dual PSUs. The PDUs must handle high load (total ~28 kW, see power section) and provide appropriate outlets (e.g. IEC 309 or HPC connectors) on 208–240V circuits. Each server’s PSU will connect to separate A/B power feeds for redundancy.
-- **Networking Hardware:** A high-bandwidth Top-of-Rack switch is required to interconnect servers and uplinks. A 10 GbE (or 25 GbE) managed switch with at least 8–16 ports will connect the GPU nodes and the uplink to the ISPs. This switch should support the full 10 Gbps Internet feed and internal traffic between servers (which may need higher throughput if servers communicate). Additionally, a capable router/firewall is needed to manage dual ISP connections and failover. For example, an enterprise router with dual 10G WAN ports can handle BGP or failover configurations for the two ISPs and Starlink backup.
-- **Ancillary Components:** Miscellaneous rack components include cable management, rack-mounted KVM or remote management devices (though IPMI/BMC on servers allows remote control, minimizing on-site interaction), and environmental sensors (temperature, humidity, smoke) for monitoring. Cooling apparatus may also be integrated (e.g. a rack-mounted liquid cooling distribution unit or rear-door heat exchanger – discussed in Cooling section). All components are chosen to ensure high uptime and remote manageability, aligning with the goal of minimal on-site staff.
-
-### Power and Cooling Considerations
-
-#### Power Demand and Electrical Upgrades
-
-Hosting 40 high-end GPUs in a residential building requires substantial power capacity. Each H200 GPU has a TDP around 700 W​[^TRGDATACENTERS.COM].
-An 8-GPU HGX H200 server draws about 5.6 kW under load​[^TRGDATACENTERS.COM].
-So five servers demand roughly 28 kW of power for the IT load alone.
-This is far beyond typical residential electrical capacity, so significant electrical upgrades are needed:
-
-- **Service Upgrade:** The building will require a new dedicated electrical service (likely 208/240V three-phase) to support ~30–40 kW continuous load.
-This may involve working with the utility to install a higher-capacity transformer and service drop.
-For safety and headroom, a 50–60 kW electrical capacity is advisable to account for cooling systems and margin.
-- **Distribution Panel:** A new electrical sub-panel with appropriate breakers (e.g. multiple 30A or 60A circuits) will feed the data center rack PDUs.
-At 28 kW IT load, multiple 208V/30A circuits (each ~5 kW usable at 80% load) or 208V/50A circuits will be needed across the PDUs.
-The panel and wiring must be rated for continuous high current.
-- **Power Redundancy:** Ideally dual feed lines (from separate breakers or even separate utility phases) can supply the A/B PDUs.
-If the building only has one utility feed, the secondary feed could come from a UPS/generator (discussed below).
-All equipment will be on UPS power to ride through short outages and ensure clean shutdown if needed.
-
-#### Solar Power: Primary Supply vs. Cost Mitigation
-
-The building offers 4,000 sq ft of rooftop area for solar panels. This area can host a sizable photovoltaic (PV) array, but using solar as the sole primary power source is challenging:
-
-- **Solar Capacity:** 4,000 sq ft of modern panels (≈20 W per sq ft) can generate on the order of 75–80 kW peak DC​[^US.SUNPOWER.COM].
-In peak sun, this could more than cover the ~30 kW IT load. However, that peak is only during mid-day; energy production drops in mornings, evenings, and is zero at night.
-Over a full day, a 80 kW array in Austin might produce ~400–500 kWh, whereas the data center would consume ~800 kWh per day running 24/7.
-
-- **Battery Requirement for Primary Power**: To truly run off-grid on solar, a large battery bank is needed to store excess solar energy for nighttime.
-For example, supplying ~28 kW overnight (12 hours) requires >300 kWh of storage. This is equivalent to dozens of Tesla Powerwall units or industrial batteries, adding hundreds of thousands of dollars in cost.
-Even then, multiple consecutive cloudy days could threaten uptime without grid/generator support. So, a pure solar-plus-battery solution has very high CapEx and complexity.
-
-- **Solar as Cost Mitigation**: A more feasible approach is to use the solar installation to offset electricity costs and provide backup capability, rather than as the only source.
-During sunny hours, the data center can draw on solar power (reducing grid consumption), and even feed surplus back to the grid if production exceeds load (via net metering or feed-in tariffs).
-This lowers the electric bill significantly. At night or during high load beyond solar output, the facility would use grid power normally.
-In this role, the solar array acts as a cost mitigation tool and a partial backup (able to supply some power during daytime outages).
-
-- **Cost Comparison**: A 50–80 kW solar PV system is a major upfront investment (rough estimate $150k–$200k installed for 4000 sq ft).
-As a primary power source, you’d need to roughly double this investment to include massive batteries (e.g. adding perhaps $300k+ for storage and grid-islanding inverters), totaling near half a million dollars in CapEx.
-In contrast, using solar without extensive storage keeps the cost to the PV array itself and maybe a modest battery/UPS, leveraging the grid for reliability.
-The grid electricity cost in Austin ($0.08–$0.12 per kWh) is relatively low, so completely offsetting it with solar has a long payback.
-
-**Recommendation**: Use solar as a supplemental power source to shave peak usage and reduce energy costs, rather than sole supply.
-This yields savings (potentially tens of thousands per year) while avoiding the impractical cost of running 24/7 on solar alone.
-
-### Cooling Solutions for High-Density GPUs
-
-Dissipating ~28 kW of heat in a small residential space is a critical challenge. Traditional comfort HVAC is insufficient, so purpose-built cooling is required.
-Key considerations are efficiency, space footprint, and ease of maintenance:
-
-- **Air Cooling (CRAC/CRAH Units)**: One option is installing a dedicated computer room A/C (CRAC) or in-row cooling unit.
-For ~30 kW heat, this might involve multiple 5-ton (60,000 BTU) air conditioning units or a single precision cooling unit.
-While effective, standard air conditioners would occupy significant indoor space or require large condenser units outside.
-They also need frequent maintenance (filters, coolant checks) and may struggle on extremely hot days.
-In a rooftop deployment, direct-expansion HVAC units could be placed outside with ducting to the server room.
-
-- **Liquid Cooling (Direct-to-Chip or Rear-Door)**: Given the high heat density, liquid cooling is often more efficient.
-One approach is direct-to-chip water blocks on the GPUs/CPUs, with a coolant distribution unit pumping liquid to a roof-mounted dry cooler or chiller.
-Another compact approach is a rear-door heat exchanger: a radiator panel is installed as the rack’s rear door, absorbing the hot air from servers and cooling it via circulating water.
-Rear-door units can handle 30+ kW per rack and require only a water loop to an external cooler.
-This method has a minimal footprint (no extra floor space) and is relatively low maintenance (closed-loop water circuit with pumps).
-It’s also “close-coupled” to the heat source, improving efficiency.
-
-- **Immersion Cooling**: Immersion in dielectric fluids is a cutting-edge solution where servers are submerged in cooling fluid. It can easily dissipate high heat loads and simplifies heat rejection (via external radiators). However, it requires specialized tank enclosures and complicates maintenance (servers must be lifted out for service). In a small operation with only 5 servers, immersion may add unnecessary complexity and make quick hardware swaps harder.
-
-**Recommended Cooling Solution**: A liquid cooling system is the most effective for this scenario. For example, equipping the HGX servers with water-cooled plates or using a rear-door liquid cooling unit would efficiently remove heat.
-The heat could be expelled via a roof-mounted dry cooler or small chiller unit, taking advantage of outside air to dump heat.
-This setup keeps the cooling infrastructure compact (mostly confined to the rack and a box on the roof) and maintenance is straightforward (primarily monitoring coolant and pump health).
-It also keeps the room temperature moderate, which is important in a residential building to avoid hot spots.
-Overall, liquid cooling provides high performance per footprint and aligns with sustainability (higher efficiency means lower cooling power draw, improving the PUE).
-TRG Datacenters notes the availability of “waterless cooling” and advanced techniques for H100/H200 deployments​[^TRGDATACENTERS.COM] – a sign that traditional air cooling alone is not ideal for these 5.6 kW servers.
-
-### Backup Power and Power Conditioning
 
-For reliable operations, especially if leasing compute to customers, the data center must handle power outages or grid anomalies seamlessly:
-
-- **Battery UPS**: A battery Uninterruptible Power Supply is critical. This can be a large centralized UPS cabinet or distributed lithium-ion battery units.
-The UPS provides instant failover power and voltage conditioning. It would carry the ~30 kW load for a short period (minutes to perhaps an hour) to ride out brief outages or to cover the gap until a generator starts.
-Modern lithium-ion UPS systems or even a set of Tesla Powerwall batteries could serve this role. 
-For example, a 100 kW (several hundred kWh) battery system could keep the facility running for a few hours if needed, and also store solar energy for use in the evening peak.
-
-- **Diesel (or Natural Gas) Generator**: For longer power outages, a generator ensures continued operation.
-A diesel generator around 50–60 kW capacity (to handle 30 kW IT load + cooling equipment and some buffer) would be installed (likely on the roof or a pad outside).
-Upon a grid outage, it would auto-start (via ATS – automatic transfer switch) and take over from the UPS within 30–60 seconds.
-This provides virtually indefinite backup as long as fuel is available.
-Diesel is common for data centers, but a natural gas generator could be considered if a gas line is available, to avoid fuel storage.
-In either case, the generator and fuel system add cost and maintenance (fuel checks, periodic test runs), but they are necessary for high uptime.
-
-- **Redundancy**: The combination of grid power + solar + UPS + generator creates multiple power layers. The primary source is grid (augmented by solar when available).
-If grid fails, the UPS instantly holds up the load. For short outages (< 5 minutes), the battery might suffice alone.
-If the outage persists, the generator starts and powers the facility until grid returns. Solar, if sun is up, can extend battery life or reduce generator fuel usage by sharing the load.
-This multi-tier setup provides resilience. All critical power feeds (UPS output, generator output) tie into a transfer switch gear that feeds the main panel and PDUs, so the switchover is automatic and transparent to the servers.
-
-- **Power Conditioning**: The sensitive (and expensive) GPU servers benefit from clean, stable power. The UPS and power distribution system will regulate voltage and filter surges.
-Additionally, surge protectors and proper grounding are implemented in the electrical design. These measures protect the hardware from power spikes or sags common in city grids.
-
-### Networking & Connectivity
-
-Reliable, high-bandwidth internet is essential for leasing servers on Akash. The plan includes a 10 Gbps bandwidth setup with multiple providers for redundancy:
-
-- **Primary ISP (Fiber)**: A business-grade fiber optic connection providing ~10 Gbps symmetrical bandwidth will be the main uplink.
-Fiber offers low latency and high throughput, important for moving large datasets to/from the GPUs. In Austin, options include providers like AT&T Business Fiber or local ISPs.
-A dedicated 10 Gbps enterprise line typically comes with an SLA (Service Level Agreement) for uptime, but at a high cost (often thousands of dollars per month, exact quotes vary​[^GIGAPACKETS.COM]
-). If full 10 Gbps dedicated service is too costly initially, a slightly lower tier (e.g. 5 Gbps) business line could be used, but given the data-intensive nature of GPU workloads, planning for 10 Gbps is prudent.
-
-- **Secondary ISP (Alternative Path)**: For redundancy, a second independent internet service will be provisioned. This could be a different fiber provider or a cable/fixed wireless provider.
-One cost-effective option in Austin is Google Fiber’s 8 Gbps residential service, priced around $150/month​[^FIBER.GOOGLE.COM].
-While technically a residential plan, 8 Gbps “Edge” service offers enormous bandwidth at low cost – however, it lacks the guaranteed uptime of a business line.
-Another option is a 1–2 Gbps cable or fiber line from a different carrier (for example, if AT&T is primary, perhaps Spectrum or Zayo fiber as secondary).
-The goal is path diversity, so ideally the secondary uses a different infrastructure. This dual ISP setup allows failover if the primary line experiences an outage or performance issues.
-
-- **Starlink Satellite Backup**: As a tertiary backup, Starlink Business satellite internet will be installed. Starlink can provide on the order of 100–200 Mbps downlink in the Austin area.
-While far below 10 Gbps, it is entirely independent of local terrestrial infrastructure.
-In an extreme scenario where both fiber links are down (e.g. widespread outage or fiber cut), Starlink ensures the data center is still reachable for basic management traffic and possibly to serve low-bandwidth client needs.
-The latency (20–40 ms) and bandwidth of Starlink aren’t ideal for heavy data transfer, but it’s sufficient as an emergency link.
-The cost for Starlink Business is a few hundred dollars per month, which is a reasonable insurance policy for continuity.
-
-- **Networking Equipment & Configuration**: A robust networking setup will tie these links together. A dual-WAN router or firewall (with support for load balancing/failover and BGP if using provider-independent addressing) will manage traffic.
-In normal operation, the 10 Gbps primary carries the load; the secondary link can either remain idle hot-spare or be used in active-active mode (e.g. serve less critical traffic or load-balance outgoing requests).
-The router will automatically fail over traffic to the secondary (or Starlink) if the primary drops.
-Internally, the Top-of-Rack switch connects the servers at 10/25 Gbps and uplinks to the router at 10 Gbps.
-This ensures each GPU server can fully utilize the internet pipe when needed.
-All networking gear will have redundant power (connected to the UPS) to stay online during power events.
-
-- **Cost and Reliability Comparison**: The fiber business line offers the best reliability (uptimes >99.9% typically) but at high monthly cost.
-The residential-style multi-gig fiber is much cheaper (e.g. $150/mo for 8 Gbps)​[^FIBER.GOOGLE.COM] but comes with no guaranteed uptime – repairs could take days if it fails.
-By employing both, we get a balance: the cheap pipe can carry traffic most of the time, but if it fails, the expensive pipe ensures SLAs are met.
-In effect, one could even invert the usage (use the cheap Google Fiber as primary under normal conditions to save money, and have the business fiber as the backup for SLA).
-Regardless, with two wired providers and Starlink, the facility is well protected against outages, meeting enterprise connectivity standards.
-
-### Financial Projections and Profitability
-
-This section outlines the expected capital expenditures, operating costs, and revenue/profit over a 5-year period for the edge data center. All values are estimates based on current market data and historical trends.
-
-#### Capital Expenditures (CapEx)
-
-One-time setup costs (Year 0 investments) include:
-
-- **GPU Servers**: 5 high-end 8×H200 servers. NVIDIA H200 GPUs are estimated at ~$30k each, and complete 8-GPU systems range $275k–$500k depending on configuration​[^TRGDATACENTERS.COM].
-We assume ~$300k per server for a mid-range configuration. Total: ~$1.5 million for all servers. This covers GPUs, CPUs, memory, NVSwitch, etc.
-
-- **Rack & Power Infrastructure**: Rack enclosure, dual PDUs, cabling, and building electrical upgrade. The electrical work (new panel, transformer, wiring) might cost $20k–$50k, and rack hardware another ~$5k–$10k. Estimated: $30k.
-
-- **Cooling System**: If using liquid cooling, costs include coolant distribution units, piping, and a dry cooler/chiller. A high-capacity HVAC or liquid loop for ~30 kW could be $40k–$80k. We budget ~$50k for the cooling solution (e.g. rear-door heat exchanger and external radiator).
-
-- **Networking Gear**: Enterprise 10 GbE switch, dual-WAN router, and misc. networking equipment. Estimated: $15k for a quality switch and router with 10G capability.
-
-- **Solar Installation**: ~70–80 kW of solar panels (max that fits on 4,000 sq ft) at roughly $2/W. Estimated: $150k for the solar array (inverters, panels, mounting). This is an optional cost – included if we aim to deploy solar upfront. (If treating solar as a separate project, this could be deferred or scaled in phases to manage cash flow.)
-
-- **Battery UPS & Generator**: A battery UPS sized for the load (could be integrated in a large UPS unit or several battery packs) and a 50–60 kW diesel generator with ATS. Rough costs: $50k for a substantial UPS system, and $40k–$60k for the generator + install. Assume $100k total for backup power infrastructure.
-
-- **Total CapEx**: Approximately $1.8 – $1.9 million. For instance, adding the mid estimates above: $1.5M (servers) + $30k (power) + $50k (cooling) + $15k (network) + $150k (solar) + $100k (UPS+gen) ≈ $1.845M. Without solar (if one chose to initially rely on grid power), CapEx would be about $1.695M. These figures set the stage for amortization and ROI calculations.
-
-#### Operating Expenses (OpEx)
+## Summary
 
-Ongoing yearly costs include:
+The goal of this project is to enable lighter weight edge compute devices including those running in average consumer homes to be able to participate in Akash’s provider infrastructure. The motivation for this stems from the following:
 
-- **Power Consumption**: The GPUs and cooling will draw ~30–35 kW continuously. Yearly energy usage is 260,000 kWh (30 kW × 8760 hours, assuming some efficiency gains from liquid cooling). At an Austin commercial electricity rate ($0.10 per kWh), that’s about $26k/year in electricity costs. With the solar array offsetting perhaps ~50% of that (on sunny days the solar can supply a large portion of daytime power), the net grid electricity cost could drop to ~$12k–$15k/year. (This assumes the ~80 kW solar produces ~140 MWh/year that either directly powers load or is net-metered – saving ~$14k/year in power). We’ll use ~$15k/year net power cost assuming solar is active; ~$30k/year if not.
+1. Many people want to participate in Akash by purchasing a GPU or two today but they aren’t technically proficient enough to run their own kubernetes cluster
 
-- **Internet Connectivity**: Dual ISP fees and Starlink subscription. The primary business 10G line might be ~$1,000–$2,000/month, and backup lines (Google Fiber 8G and Starlink) another few hundred each. Budget roughly $2,500/month total for connectivity. Annual: ~$30k/year on internet service. (Using a residential primary could cut this significantly, but we’ll stay conservative to ensure quality of service.)
+2. Even for people that are proficient, the infrastructure requirements to run a full multi-node cluster make it cost prohibitive to do so
 
-- **Hardware Maintenance**: With minimal on-site staff, maintenance involves remote management and occasional contractor visits. We budget a small amount for maintenance contracts/spares – e.g. replacing failed components (disks, fans) and annual preventative maintenance on generator, cooling, etc. Estimated: $10k/year. (This could be higher if we include, say, a support contract for the servers or insurance. But since on-site staff is minimal, we assume only incidental costs.)
+3. Nvidia (and presumably other vendors like Apple and AMD) have indicated plans to launch consumer desktop devices that are powerful enough to allow for “inference offload”. The imminent [Nvidia DGX Spark](https://www.nvidia.com/en-us/products/workstations/dgx-spark/) is the best example of that - it is being marketed as “A Supercomputer on your Desktop” 
 
-- **Miscellaneous**: Insurance for equipment, property tax on equipment (if applicable), and other overhead. This might add a few thousand. We’ll include $5k/year as a buffer.
+This specific aep will be scoped to building an MVP of the service with a subsequent aep working in scaling it to a more production ready state
 
-Combining these, the annual OpEx is roughly $60k/year (with solar) or ~$75k/year (without solar), dominated by power and internet bandwidth costs.
+## High Level User Experience
 
-#### Revenue Model and Utilization
+The user experience of this product should be one where an average user who has a computation device (laptop, desktop or small server with a platform architecture we support) should be able to install a client (software) that then configures all the things necessary to allow that device to become part of the provider network. The user should then be able to visit a web application (and potentially a mobile application) where they can view all the devices they have on the network as well as rewards (earnings) they have accrued over time, add/ remove/ upgrade devices etc
 
-The revenue comes from leasing the GPU servers on the Akash network (or similar). Assumptions:
+High Level Architecture
+The Akash Core team at Overclock Labs has performed several initial tests and is converging towards an architecture this can be achieved by essentially splitting the provider into a “centralized control nodes” and “decentralized worker nodes” type architecture. For the MVP of this, the control nodes for a provider will be managed by the Akash Core Team while individual users (who can be anyone in the world) can join their worker nodes to the kubernetes cluster.
 
-- **Lease Rate**: The H200 GPUs are leased at $2.30 per hour per GPU (initial market rate, comparable to high-end H100 pricing). This equals $55.20 per GPU per day if fully utilized.
+The networking challenge posed by worker nodes sitting behind a NAT gateway is solved by:
 
-- **Utilization**: Assume an average 80% utilization in Year 1 – meaning each GPU is earning revenue ~19.2 hours out of 24. (Some downtime for when not leased or for maintenance). 80% is a reasonable starting point given ramp-up of clients and some idle periods.
+1. Setting up one worker node (let’s call that the INGRESS WORKER NODE) to be part of the centralized controller cluster and this worker node serves as the ingress point for all the worker nodes that are part of the cluster.
 
-- **Year 1 Revenue**: There are 40 GPUs total. At $2.3/hr with 80% usage, each GPU yields ~$16,120 per year. Annual Year-1 revenue ≈ $645,000 (40 × $16,120). Calculation: 40 × $2.3 × 0.8 × 24 × 365 ≈ $644,700.
-This half-million-plus revenue in the first year assumes there is sufficient demand to keep the GPUs busy (which for cutting-edge H200s is likely, given heavy AI workload demand).
+2. Use of Wire Guard allows for bidirectional communication with the worker nodes 
 
-However, market lease rates for GPUs tend to decline over time. New GPU generations and increased supply drive prices down. 
-For example, rentals of NVIDIA H100 GPUs dropped from around $8/hour at launch to under $2/hour within a year as supply caught up​[^LATENT.SPACE].
-We must factor in that our $2.30/hr rate may not hold steady for 5 years:
+Tailscale offers a production ready easy-to-use implementation of wireguard and is likely the product that will be used for this.
 
-We project the effective lease rate per H200 GPU will depreciate each year. Based on historical trends, a drop on the order of 10–15% per year is plausible if new competitors (like NVIDIA Blackwell series) emerge.
-We will model a conservative scenario: Year 2 ~$2.00/hr, Year 3 ~$1.70/hr, Year 4 ~$1.50/hr, Year 5 ~$1.30/hr on average.
-Utilization might increase as the service gains customers (perhaps up to 90%), but to keep estimates simple we’ll hold 80% utilization and focus on rate decline. 
-This decline in price is analogous to how the asset value depreciates – GPUs lose value as newer models appear. (In fact, high-end GPUs are among the fastest depreciating tech assets​[^BIGDATASUPPLY.COM].)
-Historically, a GPU can lose ~50% of value in the first year, and ~75% by year three​[^BIGDATASUPPLY.COM].
-Rental pricing mirrors this as older GPUs command lower rates. Our revenue model accounts for this by lowering the hourly rate over time.  5-Year Revenue Projection (with 80% utilization):
+This is what a single such cluster would look like conceptually:
 
-| Year | Avg Lease Rate (USD/GPU/hr) | Annual Revenue (approx) |
-| ---- | -------------------------- | ---------------------- |
-| 1    | $2.30                      | $645,000               |
-| 2    | $2.00 (-13%)               | ~$561,000              |
-| 3    | $1.70 (-15%)               | ~$477,000              |
-| 4    | $1.50 (-12%)               | ~$420,000              |
-| 5    | $1.30 (-13%)               | ~$364,000              |
+![aah-regional-network](aah-regional-network.png)
 
-*(The rate percentages indicate the drop from the previous year. Utilization kept at 80% for consistency.)*
+And now imagine there being one such network per region. We would initially start with 2-3 per major continent and scale up from there.
 
-Over five years, the cumulative revenue would be roughly ~$2.46 million. This assumes that demand remains high enough to keep 80% of capacity leased even as prices drop. In practice, we might increase utilization in later years (e.g. to 85–90%) as the service matures, which could somewhat offset the lower hourly rates.
+![aah-global-network](aah-global-network.png)
 
-#### 5-Year Profitability Outlook
+## Proof-of-Concept (POC) Testing
+To confirm that this is a viable solution and can be scaled to a reasonable size we need to perform the following minimum testing:
 
-To evaluate profitability, we compare the revenue against expenses and include the residual value of hardware after 5 years:
+- SINGLE REMOTE WORKER NODE TEST: Set up the control infrastructure with 3 control nodes + one ingress node + 1 worker node and test deploying a large number of pods on to the remote worker node. Confirm no networking issues, being able to SSH into the pods, being able to deploy a service that exposes an API endpoint and confirm that the API can be accessed from a public IP.
 
-- **Yearly Operating Profit**: Subtracting the ~$60k OpEx per year from the revenues above, we get the annual net income from operations.
-For example, Year 1 OpEx ~$60k, so profit ~$585k. By Year 5, revenue ~$364k minus OpEx ~$60k = $304k profit.
+- MULTIPLE REMOTE WORKER NODE TEST: Set up the control infrastructure with 3 control nodes + one ingress worker node + large number (say 100) remote worker nodes and confirm no networking issues, test deployments, being able to deploy a service that exposes an API endpoint and confirm that the API can be accessed from a public IP, and stability of the cluster including etcd state over time.
 
-- **CapEx Recovery**: The initial CapEx ($1.85M with solar) is a sunk cost to recover over time. We can amortize it linearly ($370k per year over 5 years) as a target.
-In Year 1, the $585k operating profit easily covers the $370k amortization (leaving $215k surplus).
-By Year 5, the $304k profit is slightly below a $370k straight-line amortization, reflecting how revenue declines over time.
+- MULTIPLE INGRESS AND REMOTE WORKERS TEST: Set up the control infrastructure with 3 control nodes + 3 ingress worker nodes + large number (say 100) remote worker nodes and confirm no networking issues, test deployments and stability of the cluster including etcd state over time. Also confirm that load gets balanced across the three ingress worker nodes and that kubernetes continues to schedule pods evenly across all remote worker nodes.
 
-- **Cumulative Cashflow**: Summing the annual profits: Year1 $585k, Year2 ~$501k, Year3 ~$417k, Year4 ~$360k, Year5 ~$304k yields about $2.17 million total pre-tax profit over 5 years.
-This is in the same ballpark as the ~$1.85M initial investment, indicating a modest net gain by the end of year 5.
+## Productization
 
-- **Resale Value**: After 5 years, the H200 servers will be older tech, but not worthless. If history is a guide, high-end GPUs might retain perhaps 10–20% of their value after 5 years (many will have moved to next-next-generation by then).
-For instance, 5-year-old NVIDIA V100 GPUs sell for only ~5–10% of original price on secondary markets. We’ll assume ~15% residual value for our equipment.
-On a $1.5M server investment, that’s about $225k salvage value by selling the used servers or GPUs in year 5. This adds to the project’s return.
+To productize this solution, there are a number of decisions that need to be made. Here is a non-exhaustive list of areas we need to flesh out further
 
-- **ROI and Payback**: Considering the ~$2.17M cumulative profit plus ~$225k resale, the 5-year return is ~$2.395M on a $1.845M investment.
-That’s an overall ROI of ~30% over 5 years, or roughly a 6% annualized return. Payback period (time to recoup the initial outlay from net cash flow) would be around 3.5–4 years in this scenario (cumulative profit crosses the initial cost in the latter half of year 4).
-After 5 years, the operation has paid for itself and earned a modest profit on top.
+- REGIONAL CLUSTERING: Since there is a limit to how many worker nodes we can reasonably have per cluster and more importantly all the network traffic to/ from the pods must go through the control infrastructure, we want to ensure that network congestion at the control infrastructure network and latency to the remote worker nodes is in check. To achieve this we will likely need to pursue a regional strategy, where there is one control node cluster per region and any new workers wanting to join the network are directed to the regional cluster that is in the same region as the worker nodes. There are several open questions that need to be addressed:
+  - How is the geolocation boundary defined (geo-IP? City? State?) and enforced?
+  - Does there need to be an API server that new nodes “check into” that then redirects them to join a specific regional control cluster?
+  - Does the core team maintain all the regional control clusters initially until we can verify viability?
+  - Is there a minimum number of remote worker nodes that is needed in a region before we commit to hosting and managing a regional cluster for that specific region?
+  - Will nodes be able to join permissionlessly? If yes, we need to model our security framework. If not, how can we provide the highest decentralization without sacrificing security?
 
-- **Effect of Solar on Financials**: We included solar in CapEx and reduced annual power cost. If we exclude solar, initial CapEx drops by ~$150k (to ~$1.695M) but annual power costs rise by ~$14k (to ~$75k/year).
-Over 5 years, not having solar would save $150k upfront but cost ~$70k more in OpEx, netting a $80k benefit by year 5.
-This slightly improves short-term ROI (and earlier breakeven). However, solar’s 25+ year lifespan means after its ~10-year payoff period it would yield pure savings.
-In a 5-year window, solar is close to break-even (especially with no subsidies assumed).
-For a pure profitability standpoint, one might delay or scale the solar investment, but from a feasibility and sustainability view, using the rooftop for solar is still attractive for long-term gains and resiliency.
+- HOMOGENOUS vs HETEROGENOUS CLUSTERS: Do all worker nodes of the same cluster have to be identical in terms of resources? Should we allow mixing? Should there be mixing of CPU and GPU nodes?
 
-- **Price/Utilization Sensitivity**: The above outlook is sensitive to how well the GPUs are monetized. If demand is higher (90%+ utilization), revenues would increase ~12.5%, boosting profits.
-Conversely, if competition forces prices down faster (say to $1/hr by year 5), total revenue would be lower.
-The good news is that even under quite conservative pricing, the operation remains profitable within 5 years, largely because the upfront purchase avoids cloud markups. 
-(Note: cloud GPU instances can cost 2–3× the equivalent hardware cost over a few years​[^TRGDATACENTERS.COM], so owning hardware can pay off if utilization is high.)
+- APPLICATION TYPES: Should some applications be prevented (or at least avoided) from being deployed on these clients? For example, applications that require an IP lease or large persistent storage may not be best suited for these devices.
 
-### Feasibility Assessment
+- USER CLIENTS: One of the goals of this project is to enable the average home user to be able to participate in Akash as a “tiny provider”. To this end the setup and configuration needs to be as seamless as possible. To achieve this, we need to build an easy to install UI based client that is supported for the main OS platforms with chips architectures that we support. For linux users this could be a command line interface (CLI) based installer.
 
-In summary, setting up an edge GPU data center in a residential building is feasible but requires careful planning:
+- END USER DEVICE MANAGER & DASHBOARD: There needs to be a way for end users to be able to view/ add/ remove devices, potentially view a map of all devices on the network (similar to Helium miners) and be able to view earnings and transfer out funds through a wallet. We will initially offer a web portal for this and potentially consider building a mobile app.
 
-- Significant infrastructure upgrades (power and cooling) are needed to support the high-density servers in a non-datacenter environment.
-- The project is capital-intensive (~$1.8M upfront), but operational costs are relatively low once running (mainly power and internet).
-- **Profitability**: The 5-year projection shows a reasonable profit margin, though not astronomical.
-There is room for higher returns if the facility achieves higher utilization or if hardware costs can be sourced lower.
-Conversely, rapid GPU price drops and under-utilization are risks (the GPU rental market can fluctuate – e.g. an oversupply situation drove H100 rental rates down to ~$2/hr​[^LATENT.SPACE]).
-We mitigated this by using a declining price model in our estimates.
-- The edge location (in Austin) can actually be a selling point: users in the region get lower latency and data sovereignty compared to using distant cloud data centers. This could help maintain higher utilization.
-- **Maintenance and Operations**: With remote management, the ongoing effort is low. The main operational tasks will be monitoring systems, applying software updates, and arranging repairs for any failed hardware.
-The design with redundant power and connectivity ensures a high service uptime, which is crucial for attracting customers.
+- ADMIN PORTAL: The administrators of the regional clusters need to be able to view and manage devices. This will likely be achieved with the Akash Provider Console but may require additional features.
 
-Overall, the analysis indicates that an edge data center with 5×HGX H200 servers can be run in a retrofitted residential building space and achieve profitable operations within 5 years. While it won’t rival a hyperscale cloud in scale, it leverages owned infrastructure and renewable energy to deliver competitive GPU compute at a regional edge, aligning with the growing trend of decentralized, on-premise AI computing​[^TRGDATACENTERS.COM].
+- DEPLOY CONSOLE CHANGES: The deploy console client will need to be modified to make users aware of whether a specific compute provider is part of the edge network as the performance may be lower and there is a chance of them going offline that is higher than that of the regular (datacenter) providers.
 
-## References
+- REWARDS & EARNINGS DISTRIBUTION: Since all deployment earnings will end up in the wallet owned by the provider admin (initially OCL core team but potentially others over time) - we need to figure out what is a reasonable and fair reward distribution that:
+  - Covers the cost of hosting and managing the control infrastructure
+  - Incentivizes people to join the network
+  - Ensures that nodes that don’t get workloads (either because k8s scheduler didn’t pick their node or because of some other reasons) don’t get penalized. Aka fair allocation for participation.
 
-[^TRGDATACENTERS.COM]: [NVIDIA H200 specifications and power requirements](https://www.trgdatacenters.com/resource/nvidia-h200)
-[^AWS.AMAZON.COM]: [AWS p5 instance (8×H100) configuration for reference​](https://aws.amazon.com/blogs/aws/new-amazon-ec2-p5-instances-powered-by-nvidia-h100-tensor-core-gpus-for-accelerating-generative-ai-and-hpc-applications/)
-[^SECUREMACHINERY.COM]: [Sizing an LLM for GPU memory](https://securemachinery.com/category/aws/)
-[^US.SUNPOWER.COM]: [Solar panel power density (≈20 W/sq ft)​](https://us.sunpower.com/blog/how-much-solar-power-produced-square-foot)
-[^FIBER.GOOGLE.COM]: [Google Fiber 8 Gbps service pricing in Austin​](https://fiber.google.com/austin/)
-[^LATENT.SPACE]: [GPU lease market trends (H100 price drop)​](https://www.latent.space/p/gpu-bubble)
-[^BIGDATASUPPLY.COM]: [Typical GPU depreciation over time​](https://bigdatasupply.com/sell-your-i-t-equipment/sell-gpu/)
-[^GIGAPACKETS.COM]: [Gigapackets 10 Gbps business line pricing in Austin​](https://www.gigapackets.com/10Gigabit/texas/austin.php)
\ No newline at end of file
+- BOOTSTRAPPING AND SCALING: We will likely initially start with a small set of regional nodes and scale from there. There are several open questions on this:
+  - What regions should we start with? Most providers on the network are in North America and EU so one school of thought is to double down on those regions (since that is where customer demand has been). Another school of thought is to go for more dots on the map and therefore prioritize regions of the world where there are no providers. The final state will likely be a combination of of the two
+  - What happens if a user wants to join the network but there isn’t a regional control cluster available in their region? There are two potential ways we can handle this: One is to collect all such users into wait lists and have a pre-set threshold (minimum number of users) that will trigger us setting up a regional control node for that specific region. Another way (more flexible but also more complex) is to allow users to potentially become the control cluster admin if they happen to be the first user in a region (thereby bootstrapping that region for the network).
\ No newline at end of file
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diff --git a/src/content/aeps/aep-61/README.md b/src/content/aeps/aep-61/README.md
index 25a1f4550..57ffed0d2 100644
--- a/src/content/aeps/aep-61/README.md
+++ b/src/content/aeps/aep-61/README.md
@@ -7,7 +7,7 @@ type: Standard
 category: Core
 created: 2025-01-30
 updated: 2025-02-18
-estimated-completion: 2025-02-28
+completed: 2025-03-12
 roadmap: major
 ---
 
@@ -78,7 +78,7 @@ This approach has the following pros and cons:
 
 ### `x/authz`
 
-Store will update with following prefixes:
+Store will be updated with the following prefixes:
 - `{0x01}` - grantor prefix (remains unchanged)
 - `{0x03}` - grantee prefix. Format of the key is `0x03<granteeAddressLen (1 Byte)><granteeAddress_Bytes><granterAddressLen (1 Byte)><granterAddress_Bytes>: grants count`
 
@@ -86,4 +86,4 @@ Store will update with following prefixes:
 
 ## Copyright
 
-All content herein is licensed under [Apache 2.0](https://www.apache.org/licenses/LICENSE-2.0).
\ No newline at end of file
+All content herein is licensed under [Apache 2.0](https://www.apache.org/licenses/LICENSE-2.0).
diff --git a/src/content/aeps/aep-62/README.md b/src/content/aeps/aep-62/README.md
new file mode 100644
index 000000000..e0918cb12
--- /dev/null
+++ b/src/content/aeps/aep-62/README.md
@@ -0,0 +1,21 @@
+---
+aep: 62
+title: "Add/ Remove Nodes Via Provider Console"
+author: Anil Murty (@anilmurty) igar Patel (@jigar-arc10) Deval Patel (devalpatel67)
+status: Draft
+type: Standard
+category: Interface
+created: 2024-03-15
+updated: 2025-03-15
+estimated-completion: 2025-04-15
+roadmap: minor
+---
+
+
+## Motivation
+
+Akash providers frequently start out with a small cluster and then expand over time.
+
+## Summary
+
+With Akash Provider Console now generally available and new and existing providers onboarding on to it, we need to add support for a key feature which is the ability to easily add new nodes or remove one or more existing nodes from the cluster.
diff --git a/src/content/aeps/aep-63/README.md b/src/content/aeps/aep-63/README.md
new file mode 100644
index 000000000..07933793c
--- /dev/null
+++ b/src/content/aeps/aep-63/README.md
@@ -0,0 +1,132 @@
+---
+aep: 63
+title: "Console API for Managed Wallet Users - v1"
+author: Anil Murty (@anilmurty) Maxime Beauchamp (@baktun14)
+status: Draft
+type: Standard
+category: Interface
+created: 2024-03-14
+updated: 2025-03-14
+estimated-completion: 2025-04-30
+roadmap: major
+---
+
+
+## Motivation
+
+The number of Managed Wallet (Credit Card) users in Akash Console has grown significantly since launch. As these users and customers look to scale their applications they need a programmatic way to deploy and manage the lifecycle of their workloads on Akash so that they can scale up/ down in response to demand for their applications.
+
+## Summary
+
+Akash provides a programmatic way for users to deploy workloads via the [AkashJS SDK](https://github.com/akash-network/akashjs) but AkashJS is requires that the user of the API be familiar with not just crypto (API requires specifying wallets, mnemonics) but even the Cosmos SDK (requires importing cosmos specific libraries). This makes it hard if not impossible for non-crypto users to consume this API. Based on conversations with such non-crypto users it has become clear that they need a clean API with simple endpoints to call, for deployment and lease lifecycle management. 
+
+The goal of this roadmap milestone is to implement clean API endpoints for all parts of managing the lifecycle of applications and workloads programmatically for users who pay with a credit card.
+
+## High Level Specification
+
+The specification is split into the following functional areas:
+- API Endpoints
+- UI for managing API keys
+- Documentation of the APIs
+
+Progress is tracked in the [Managed Wallets API Milestone](https://github.com/akash-network/console/milestone/10)
+
+### API Endpoints
+The following API endpoints have been identified at the time of writing this spec. As we work on onboaring customers to use the API we will either update this spec or create new roadmap items to add additional API endpoints. 
+
+Note that while there are a lot of API endpoints listed here - the managed wallets user will only need to exercise a subset of them. The rest are listed here in the interest of full specification.
+
+#### API Authentication & Management
+
+While these endpoints will be made available to the user, we anticipate that most users will use the UI to manage their keys
+
+`POST /v1/users/api-keys` (create)
+`GET /v1/users/api-keys` (read/ list all keys)
+`GET /v1/users/api-keys/{id}` (read/ list specific API key details)
+`PATCH /v1/users/api-keys/{id}` (update)
+`DELETE /v1/users/api-keys/{id}` (delete)
+
+In addition there needs to be validation of the API keys at the middleware level so that it applies to any user specific endpoint
+
+Implementation/ status tracked in [Console issue #768](https://github.com/akash-network/console/issues/768)
+
+#### Certificate Management
+
+While there will be a documented API for this - it will likely be handled automagically under the hood for the managed wallet user. If it is handled for the user we may not implement the list and revoke endpoints
+
+`POST /v1/certificates` (create cert)
+`GET /v1/certificates` (list all certs)
+`DELETE /v1/certificates/{id}` (revoke cert)
+
+#### Deployment Creation
+
+`POST /v1/deployments` (create deployment based on `SDL/ YAML` and escrow `deposit`)
+
+Implementation tracked in [issue #767](https://github.com/akash-network/console/issues/767)
+
+#### Bid Selection
+
+`GET v1/bids/{dseq}` (get bids for a `dseq`)
+
+Implementation tracked in [issue #767](https://github.com/akash-network/console/issues/767)
+
+#### Lease Creation
+
+`POST /v1/leases` (create lease based on a payload that is an array of sdl, dseq, gseq, provider combinations)
+
+Note that Akash supports creating multiple leases from a single SDL - where each lease can be for a different service (with a different container image) and deployed to a different provider
+
+Implementation tracked in [issue #767](https://github.com/akash-network/console/issues/767)
+
+#### Listing Deployments
+
+`GET /v1/deployments` (list all deployments)
+`GET /v1/deployments/{dseq}` (list deployment detail for a specific deployment)
+
+Implementation tracked in [issue 1042](https://github.com/akash-network/console/issues/1042)
+and [issue #767](https://github.com/akash-network/console/issues/767)
+
+#### Deployment Closure
+
+`DELETE /v1/deployments/{dseq}` (close a specific deployment)
+
+Implementation tracked in [issue #767](https://github.com/akash-network/console/issues/767)
+
+#### Funding Deployments
+
+For viewing or adding funds to the escrow of a specific deployment
+
+`GET /v1/deployments/{dseq}` (retrieve escrow balance details)
+`POST /v1/deployments/deposit/{dseq}` (accepts `deposit` amount in the body)
+
+implementation tracked in [issue #989](https://github.com/akash-network/console/issues/989) and [issue #990](https://github.com/akash-network/console/issues/990)
+
+#### Funding Account
+
+This is for the customer to purchase more credits and fund their account - we will decide if we offer this or not based on customer requests but it will likely directly go to the Stripe Checkout API https://docs.stripe.com/api/checkout/sessions/object
+
+#### Retrieving Logs
+
+`GET/v1/logs/{dseq}`
+
+#### Retrieving Events
+
+`GET/v1/events/{dseq}`
+
+### UI for Managing API Keys
+
+The user will be able to get to an API key management page from their user profile drop down
+
+![api-keys dropdown menu](api-keys-menu.png)
+
+The API key management page will let the user view all keys, create a new one or delete and existing one
+
+![api-keys management page](api-key-management.png)
+
+### Documentation
+
+Documentation will be added in three places
+
+- In the [Swagger docs](https://console-api.akash.network/v1/swagger) for Console API (which is linked from the Console side nav bar)
+- In [docs.akash.network](https://akash.network/docs/)
+- In the Github [Wiki page for Console](https://github.com/akash-network/console/wiki) (and linked from the Github [Readme for Console](https://github.com/akash-network/console/blob/main/README.md))
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+---
+aep: 64
+title: "JWT Authentication for Provider API"
+author: Artur Troian (@troian)
+status: Last Call
+type: Standard
+category: Core
+created: 2025-04-03
+updated: 2025-04-04
+estimated-completion: 2025-04-30
+roadmap: major
+---
+
+## Abstract
+
+This AEP proposes implementing JWT (JSON Web Token) authentication for the Akash Provider API. This enhancement aims to improve the reliability of client API communication with leases during blockchain maintenance periods and provide more granular access control capabilities.
+
+## Motivation
+
+The current mTLS authentication mechanism, while secure, presents several limitations:
+
+1. **Blockchain Dependency**: When the blockchain acts as the root of trust, API clients cannot maintain communication with leases during blockchain maintenance windows.
+2. **Limited Access Control**: The current certificate-based system grants access to all leases and features, making it challenging to implement granular access controls.
+3. **Certificate Management Complexity**: Implementing and maintaining granular access via certificates is complex for clients.
+
+JWT authentication offers several advantages:
+- Widely adopted and well-understood authentication mechanism
+- Enables granular access control
+- Allows for more flexible token management
+- Reduces dependency on blockchain availability
+
+## Technical Details
+
+### Key Concepts
+
+1. **Asymmetric Key Usage**:
+   - Akash uses ECDSA with secp256k1 curve for wallet operations
+   - This AEP focuses on the signing capabilities for JWT generation
+
+2. **Client-Issued JWT**:
+   - Unlike conventional JWT implementations where servers issue tokens, clients will issue JWTs
+   - This approach is necessary because:
+     - A single wallet may have multiple simultaneous leases across different providers
+     - Only the lease owner can create granular access JWTs
+     - The wallet's public key is available on the blockchain for provider validation
+
+3. **Certificate Management**:
+   - Supports standalone CA certificates
+   - Compatible with Let's Encrypt certificates
+   - Eliminates the need for custom TLS handshake handlers on the client side
+
+### Implementation Guidelines
+
+1. **Token Lifetime**:
+   - JWTs should be short-lived due to revocation challenges
+   - Recommended maximum lifetime: 15 minutes
+   - Implementation-specific lifetime configurations are allowed
+
+2. **Provider Implementation**:
+   - Providers must query and cache lease owner public keys from the blockchain
+   - Cache must be persistent across service restarts and updates
+   - Cache invalidation strategies should be implemented
+
+## JWT Specification
+
+### Schema Definition
+
+```json
+{
+  "$schema": "http://json-schema.org/draft-07/schema#",
+  "$id": "https://raw.githubusercontent.com/akash-network/akash-api/refs/heads/main/specs/jwt-schema.json",
+  "title": "Akash JWT Schema",
+  "description": "JSON Schema for JWT used in the Akash Provider API.",
+  "type": "object",
+  "additionalProperties": false,
+  "required": ["iss", "version", "alg", "created", "nva", "access"],
+  "properties": {
+    "iss": {
+      "type": "string",
+      "pattern": "^akash1[a-z0-9]{38}$",
+      "description": "Akash address of the lease(s) owner, e.g., akash1abcd... (44 characters)"
+    },
+    "version": {
+      "type": "string",
+      "enum": ["v1"],
+      "description": "Version of the JWT specification (currently fixed at v1)"
+    },
+    "alg": {
+      "type": "string",
+      "const": "ES256K",
+      "description": "Algorithm used for signing (fixed to ES256K)"
+    },
+    "created": {
+      "type": "string",
+      "format": "date-time",
+      "description": "Token creation timestamp in RFC3339 format (e.g., 2025-04-04T12:00:00Z)"
+    },
+    "nva": {
+      "type": "string",
+      "format": "date-time",
+      "description": "Not valid after timestamp in RFC3339 format (e.g., 2025-04-05T12:00:00Z)"
+    },
+    "access": {
+      "type": "string",
+      "enum": ["full", "granular"],
+      "description": "Access level of the token: 'full' for unrestricted, 'granular' for specific permissions"
+    },
+    "permissions": {
+      "type": "array",
+      "description": "Required if access is 'granular'; defines specific permissions",
+      "minItems": 1,
+      "items": {
+        "type": "object",
+        "additionalProperties": false,
+        "required": ["provider", "scope"],
+        "properties": {
+          "provider": {
+            "type": "string",
+            "pattern": "^akash1[a-z0-9]{38}$",
+            "description": "Provider address, e.g., akash1xyz... (44 characters)"
+          },
+          "scope": {
+            "type": "array",
+            "minItems": 1,
+            "uniqueItems": true,
+            "items": {
+              "type": "string",
+              "enum": ["send-manifest", "shell", "logs", "restart"]
+            },
+            "description": "List of permitted actions (no duplicates)"
+          },
+          "dseq": {
+            "type": "integer",
+            "minimum": 1,
+            "description": "Optional deployment sequence number"
+          },
+          "gseq": {
+            "type": "integer",
+            "minimum": 1,
+            "description": "Optional group sequence number (requires dseq)"
+          },
+          "oseq": {
+            "type": "integer",
+            "minimum": 1,
+            "description": "Optional order sequence number (requires dseq)"
+          },
+          "services": {
+            "type": "array",
+            "minItems": 1,
+            "items": {
+              "type": "string",
+              "minLength": 1
+            },
+            "description": "Optional list of service names (requires dseq)"
+          }
+        },
+        "dependencies": {
+          "gseq": ["dseq"],
+          "oseq": ["dseq"],
+          "services": ["dseq"]
+        }
+      }
+    }
+  },
+  "allOf": [
+    {
+      "if": {
+        "properties": {
+          "access": { "const": "granular" }
+        },
+        "required": ["access"]
+      },
+      "then": {
+        "required": ["permissions"]
+      }
+    },
+    {
+      "if": {
+        "properties": {
+          "permissions": { "type": "array", "minItems": 1 }
+        },
+        "required": ["permissions"]
+      },
+      "then": {
+        "properties": {
+          "access": { "const": "granular" }
+        },
+        "required": ["access"]
+      }
+    }
+  ]
+}
+```
+
+### Field Descriptions
+
+1. **Required Fields**:
+   - `iss`: Akash address of the lease owner
+   - `version`: JWT specification version (must be "v1")
+   - `alg`: Signing algorithm (must be "ES256K")
+   - `created`: Token creation timestamp (RFC3339)
+   - `nva`: Token expiration timestamp (RFC3339)
+   - `access`: Access level ("full" or "granular")
+
+2. **Optional Fields**:
+   - `permissions`: Array of granular access permissions
+     - `provider`: Provider address (required)
+     - `scope`: List of permitted actions (required)
+     - `dseq`: Deployment sequence number (optional)
+     - `gseq`: Group sequence number (requires dseq)
+     - `oseq`: Order sequence number (requires dseq)
+     - `services`: List of service names (requires dseq)
+
+### Example JWT Payload
+
+```json
+{
+    "iss": "akash1...",
+    "version": "v1",
+    "alg": "ES256K",
+    "created": "2025-04-03T12:00:00Z",
+    "nva": "2025-04-03T12:15:00Z",
+    "access": "granular",
+    "permissions": [
+        {
+            "provider": "akash1...",
+            "scope": ["logs", "shell"],
+            "dseq": 123456,
+            "gseq": 1,
+            "oseq": 1,
+            "services": ["web", "api"]
+        }
+    ]
+}
+```
+
+## Implementation Resources
+
+### Recommended Libraries
+
+1. **Golang**:
+   - [did-jwt](https://www.npmjs.com/package/did-jwt)
+   - Features: ES256K support, JWT validation
+
+2. **TypeScript**:
+   - [jose](https://www.npmjs.com/package/jose)
+   - Features: Comprehensive JWT implementation, ES256K support
+
+### Security Considerations
+
+1. **Token Lifetime**:
+   - Keep tokens short-lived (max 15 minutes)
+   - Implement proper token validation
+   - Consider implementing token blacklisting for critical operations
+
+2. **Key Management**:
+   - Secure storage of private keys
+   - Regular key rotation
+   - Proper key backup procedures
+
+3. **Provider Implementation**:
+   - Implement proper public key caching
+   - Regular cache invalidation
+   - Secure storage of cached keys
+
+## Migration Guide
+
+1. **For Providers**:
+   - Implement JWT validation
+   - Set up public key caching
+   - Update API endpoints to support JWT authentication
+   - Maintain backward compatibility with mTLS
+
+2. **For Clients**:
+   - Implement JWT generation
+   - Update authentication logic
+   - Implement proper key management
+   - Update API client libraries
+
+## Future Considerations
+
+1. **Token Revocation**:
+   - Implement a token revocation mechanism
+   - Consider using a distributed revocation list
+   - Explore blockchain-based revocation
+
+2. **Enhanced Security**:
+   - Add support for additional signing algorithms
+   - Implement token encryption
+   - Add support for refresh tokens
+
+3. **Performance Optimization**:
+   - Optimize public key caching
+   - Implement efficient token validation
+   - Add support for token batching
+
+## Copyright
+
+All content herein is licensed under [Apache 2.0](https://www.apache.org/licenses/LICENSE-2.0).
diff --git a/src/content/aeps/aep-65/README.md b/src/content/aeps/aep-65/README.md
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+---
+aep: 65
+title: "Confidential Computing"
+author: Anil Murty (@anilmurty)
+status: Draft
+type: Standard
+category: Core
+created: 2025-05-14
+updated: 2025-05-14
+estimated-completion: 2025-12-31
+roadmap: major
+---
+
+## Motivation
+Public clouds (like AWS, Azure and GCP) support Confindential Computing because some customers request this before they agree to migrate workloads from their own DCs to public cloud infrastructure. While a vast majority of users don't ask the public clouds for this (and just blindly "trust" them) this is likely to become a challenge for Akash's growth particularly because infractstructure on Akash is owned by 10s if not 100s of independent providers.
+
+## Background
+Confidential Computing (CC) protects sensitive data while it's being used, by running computations inside a secure, isolated hardware environment—often a Trusted Execution Environment (TEE) or TEE “Enclave”—so that even cloud providers or system administrators can't access it. It is effectively the equivalent of what Encryption and TLS do for code/ data at rest and in transit, respectively.
+
+![trusted execution](trusted-execution.png)
+
+The need for trusted execution came about as the mainstream tech industry transitioned from running their own datacenters to running in public clouds that are essentially datacenters owned by some other company (like AWS, Azure and GCP) and was led by verticals that were extra sensitive to data privacy (like healthcare, financial and federal use cases).
+
+Two market dynamics drive the need for Akash to accelerate its confidential computing roadmap:
+  1. The transition from centralized public clouds to decentralized public clouds increases the need to secure data and code at run-time since the infrastructure is now owned by 10s if not 100s of different providers.
+   
+  2. The growth in AI workloads for not just custom AI model hosting (while preserving IP) but also for privacy sensitive use cases like healthcare.
+
+
+At a high level trusted execution is achieved by doing two things
+
+- **Attestation** - which is essentially verifying that the environment (aka “Trusted Enclave”) where the code will be run can be trusted - this is typically achieved using “hardware verification”
+
+- **Sealing/ Unsealing** - which is essentially the act of storing data in and retrieving data out of the TEE Enclave
+
+
+## Prerequisites
+The following are prerequisites to allow Akash providers to support trusted execution:
+
+### TEE Capable Hardware (CPU & GPU)
+Not all hardware is TEE capable. Here is the list of TEE capable CPUs and GPUs at the time of writing this spec:
+
+#### TEE Capable CPUs
+
+| Vendor | Feature                              | Required Models                                                                 |
+|--------|--------------------------------------|---------------------------------------------------------------------------------|
+| Intel  | TDX (Trust Domain Extensions)        | Intel Xeon 5th Gen CPUs like “Sapphire Rapids” (with TDX BIOS support)          |
+| Intel  | SGX (Software Guard Extensions)      | Intel Xeon E3, Xeon D, and select 10th–11th Gen Core CPUs (now deprecated by Intel) |
+| AMD    | SEV                                  | AMD EPYC “Rome” (7002 series)                                                   |
+| AMD    | SEV-ES / SNP                         | AMD EPYC “Milan” (7003) and “Genoa” (9004) series                               |
+
+#### TEE Capable GPUs
+
+| Vendor      | Feature     | Required Models                                                                 |
+|-------------|-------------|---------------------------------------------------------------------------------|
+| NVIDIA      | NVTrust     | NVIDIA H100 or H200 (Hopper architecture) with CC-on mode                       |
+| AMD/Intel   | _None yet_  | No current support for GPU-based TEEs (CPU-side only)                           |
+
+In summary, Providers must use the following hardware:
+- Intel CPUs with TDX (e.g., Xeon Sapphire Rapids)
+- AMD CPUs with SEV-SNP (e.g., EPYC Milan/Genoa)
+- NVIDIA H100 or H200 GPUs (for NVTrust support)
+
+#### TEE Enabled Host Kernel & BIOS configuration
+
+BIOS configuration changes need to be made to enable TDX/ SGX (for intel) and SEV (for AMD). These typically also require a certain minimum version of the Linux Kernel to be used.
+
+##### Intel
+
+Enable memory encryption, TDX and SGX for Intel: https://github.com/canonical/tdx/blob/1.2/README.md 
+
+##### AMD
+
+Enable AMD SEV: https://github.com/AMDESE/AMDSEV/blob/master/README.md 
+
+
+#### Access to Device Nodes for Attestation
+In order to perform attestation (i.e., fetch measurements and generate quotes), the container must access specific device nodes like:
+- /dev/tdx-attest ([Intel TDX](https://docs.kernel.org/virt/coco/tdx-guest.html))
+- /dev/sev-guest ([AMD SEV-SNP](https://docs.kernel.org/virt/coco/sev-guest.html))
+- /dev/nv_attestation (NVIDIA H100 CC-on mode)
+
+There are three main ways to allow containers access to these device nodes:
+
+##### Privileged Containers
+
+This involves allowing the container to run with --privileged flag or securityContext.privileged: true, which gives full access to all host devices.
+
+This would be the simplest from an implementation standpoint as it would provide access to /dev/* nodes without requiring major orchestration changes
+
+The Cons with doing this is that it poses a major security risk. Giving a tenant full host access including access to other containers’ processes, sockets or secrets which would violate tenant isolation requirements for Akash. FOR THIS REASON THIS IS A NOT EVEN AN OPTION.
+
+##### Virtual Machines (Full Fledged VMs)
+
+Full VMs would offer the strongest tenant isolation and flexibility in terms of OS, runtime and workload control and potentially unlock new use cases for Akash
+
+The downsides of this approach are:
+Requires figuring out how to orchestrate VMs with Kubernetes (possibly using KubeVirt) or figuring out an entirely different orchestratorKubeVirt
+Has a performance overhead 
+WIll also require implementing tenant-side VM image management which is harder than container packaging/ management
+
+For this reason THIS IS ALSO LIKELY NOT THE BEST OPTION (at least not if we’re looking to get CC/ TEE support to market sooner than later)
+
+
+##### MicroVMs
+
+In this case, each container runs inside its own lightweight VM and the TEE (TDX/ SGX or SEV) protects the VM’s memory and execution state. This can likely be implemented using Kata Containers (container runtime) that uses QEMU (emulator) and KVM (hypervisor) underneath.
+
+The benefits are:
+
+  1. No need for a separate orchestrator. Kata Containers support the OCI container format and the Kubernetes CRI - so they should in theory work alongside regular docker containers
+  2. Tenants can continue to use the containerized workflow
+  3. Maintains performance of the existing (container based) deployment for the most part
+  4. Provides better isolation than the current container implementation since each container runs in a dedicated kernel with network, memory and IO isolation
+
+This would (at least in theory) achieve all the objectives for the near term while keeping the implementation complexity lower than full blown VMs. For this reason - THIS IS THE RECOMMENDED SOLUTION.
+
+##  Ideal User Experience
+The ideal user experience should be one where Akash users (aka “tenants”) should barely notice any difference in the deployment experience, relative to what it is for regular (non confidential) deployments. When requesting bids, they should be able to select an option (in the UI, the CLI or API) and be able to get bids only from providers that are capable of executing the tenant container within a secure enclave.
+And once the deployment is done (container is running), the tenants should be able to make a set of simple, high level API calls from within the container to perform attestation, apply a policy and then seal an unseal subsequent requests for the duration of the container’s life.
+
+In order to achieve that, the following need to be done (this assumed that the prerequisites from the previous section are satisfied)
+
+1. Changes to provider attributes to allow providers to advertise that they are TEE/ CCE capable. 
+
+2. Changes to the SDL to allow tenants to specify that they need a TEE/ CCE capable provider
+
+3. An API or SDK that wraps the vendor specific SDKs and provides an easy to use interface for attestation
+
+4. An API or SDK that wraps vendor specific SDKs and provides an easy way to perform sealing and unsealing.
+
+## High Level Roadmap
+
+Based on the above, the roadmap for achieving Confidential Computing on Akash Network can be broken down into:
+
+- [AEP-29](https://akash.network/roadmap/aep-29/): Hardware Verification (Support for Attestation)
+- [AEP-12](https://akash.network/roadmap/aep-12/): TEE Support (Support for sealing/ Unsealing)
+- AEP-xx: Confidential Computing for Users (API/ SDK + SDL changes + provider attributes) - this could potentially be pulled into this document itself
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+---
+aep: 66
+title: "Custom Domain Certificates"
+author: Joao Luna (@cloud-j-luna)
+status: Draft
+type: Standard
+category: Core
+created: 2025-05-13
+updated: 2025-05-13
+estimated-completion: 2025-06-30
+roadmap: major
+---
+
+ ## Abstract
+
+ This proposal introduces a mechanism for Akash Network tenant workloads to obtain SSL/TLS certificates for their configured custom domains, enabling secure HTTPS access to deployments. 
+
+ ## Motivation
+
+ Currently, Akash Network deployments are accessible via the default ingress subdomain (e.g., *.ingress.akash.pub).
+ To enhance the security and accessbility of deployments, tenants should have the ability to use custom domains with SSL/TLS certificates without relying on third party solutions such as Cloudflare.
+
+ ## Technical Details
+
+ ### Certificate Management (cert-manager)
+ - `cert-manager` is a Kubernetes controller used to automate the management and issuance of TLS certificates.
+ - It supports Let's Encrypt and other certificate authorities.
+ - On Akash, `cert-manager` runs as part of the provider infrastructure and handles certificate issuance for ingress resources.
+ - It uses HTTP-01 challenges to validate domain ownership.
+ - Users do not directly interact with cert-manager, but it powers the automatic issuance of certs based on deployment configuration and DNS records.
+
+ ### Ingress Controllers
+ - Akash uses Kubernetes Ingress controllers (e.g., NGINX Ingress) to route external HTTP(S) traffic to tenant workloads.
+ - Ingress resources define rules for routing and TLS termination.
+ - The Akash provider manages ingress creation based on the deploy.yml service definitions (expose section).
+ - HTTPS routing is enabled by specifying ports 443 and a custom domain in the manifest.
+
+ ### Deployment Manifest
+ - The manifest file allows defining services, ports and accepted domains.
+ - To use a custom domain:
+ ```
+ expose:
+   - port: 80
+     to:
+       - global: true
+   - port: 443
+     to:
+       - global: true
+     accept:
+       - "www.example.com"
+ ```
+ - This instructs the provider to create an ingress rule and attempt TLS certificate issuance for the domain.
+
+ ### DNS Configuration
+ - DNS setup is critical for domain validation and traffic routing.
+ - Tenants must create a CNAME record pointing to their deployment’s ingress endpoint.
+   - Example:
+   - `www.example.com` -> `deployment123.ingress.provider.akash.network`
+ - DNS propagation must complete before certificate issuance via Let's Encrypt can succeed.
+
+ ### Certificate Lifecycle
+ - Certificates are automatically requested, issued, and renewed via `cert-manager`.
+ - Tenants do not manually manage TLS certs.
+ - Failure to configure DNS correctly will prevent certificate issuance and may fall back to untrusted/self-signed certs.
+
+
+
+ ## Implementation
+
+An implementation leveraging `cert-manager` would simplify the whole solution by simply configuring the ingress with specific annotations that would trigger certificate issuing. A TLS configuration would also need to be added to the Ingress instance created by the hostname operator pointing to the TLS secret with the accepted domains.
+
+`cert-manager` watches Ingress resources across the Akash Provider cluster. If it observes an Ingress with annotations related to certificate issuing, it will ensure a Certificate resource with the name provided in the `tls.secretName` field and configured as described on the Ingress exists in the deployment namespace. An example Ingress:
+```yaml
+apiVersion: networking.k8s.io/v1
+kind: Ingress
+metadata:
+  annotations:
+    cert-manager.io/cluster-issuer: nameOfClusterIssuer
+  name: myIngress
+  namespace: myIngress
+spec:
+  rules:
+  - host: example.com
+    http:
+      paths:
+      - pathType: Prefix
+        path: /
+        backend:
+          service:
+            name: myservice
+            port:
+              number: 80
+  tls:
+  - hosts:
+    - custom.domain.my
+    secretName: myingress-cert
+```
+
+With this, user workloads will be provided a valid and automatically managed certificate for their custom domains.
diff --git a/src/content/aeps/aep-67/README.md b/src/content/aeps/aep-67/README.md
new file mode 100644
index 000000000..afa77738d
--- /dev/null
+++ b/src/content/aeps/aep-67/README.md
@@ -0,0 +1,56 @@
+---
+aep: 67
+title: "Console Bid PreCheck"
+author: Anil Murty (@anilmurty)
+status: Draft
+type: Standard
+category: Core
+created: 2025-05-16
+updated: 2025-05-16
+estimated-completion: 2025-06-15
+roadmap: major
+---
+
+## Motivation
+
+Users often see plenty of available GPUs on the pricing page but fail to receive any bids for their deployment. This causes users to think that the service is broken and likely give up on investigating further. Providing users guidance on why this is may be happening will go a long way in improving adoption.
+
+## Background
+There are situations where Console users hit the GPU pricing page (on the website) or the providers page (in console), see that there are enough "available" GPUs of the desired model, proceed to deploy via console, only to NOT get ANY bids for their deployment. This can happen due to the following primary reasons:
+
+- While there may be enough "available" GPUs in aggregate (across multiple providers), there may not be enough GPUs on a single provider
+- While there may be enough GPUs on a single provider, there aren't enough (to fulfill the gpu count in the user SDL) on a single node of the provider. This can happen if past small requests (1-2 GPUs per deployment) happened to get scheduled across different nodes of the provider, leaving the provider "fragmented" in terms of available GPUs.
+- While there may be enough GPUs on a single node to satisfy the gpu count, the specific node may not have enough other (non-GPU) resources available to satisfy all the resource requirements outlined in the compute profile. We have sometimes seen this happen when a provider's CPU count gets maxed out (90%) with work loads while they have little usage of GPUs.
+
+Users need some guidance on whether their SDL needs to be "adjusted" before they proceed with "create deployment" and if so, provide specific guidance on what needs to be changed in order to increase likelihood of bid being received
+
+## Proposed Solution
+
+One possible way to address this is to implement what we call a "Bid PreCheck" feature. The Pre-check feature should ideally check if the resources and pricing being requested by the user in the SDL will result in any bids or not, without them actually creating an on-chain transaction.
+
+### Implementation
+
+Ideally if should be a service on the providers that can be queried with resources as input and returns whether the provider will bid or not -- but this doesn't exist today. In the absence of that we will need to make use of inventory APIs
+
+The way this would work is, when the user clicks on deploy and lands on either the SDL builder or the YAML editor page we would:
+
+1. Parse the SDL to extract out the GPU Count, GPU filter (present or not), CPU count, memory size, storage size and pricing limit (uakt)
+2.  Query the providers on the network to determine
+     - Are there providers with those specific GPUs. If there are none then return 0 for "expected bids" and recommend to the user that they "remove the GPU filter"
+     - If there are providers with those GPUs then check if they have the requested count on a single node. If there are none, then return 0 and recommend to the user that they "reduce the number of GPUs requested"
+     - If there are enough GPUs on a node but not enough CPUs (to meet the requested CPU count) then return 0 and recommend to the user that they "reduce the CPU count")
+     - If there are enough GPUs and CPUs on a single node but not enough memory or storage, then return 0 and recommend reducing those.
+     - If there is a non zero value of providers/ nodes with requested resources then indicate that non-zero number and recommend the full list of things the user can do to increase that number
+
+Also we should limit this function only to deployments created by users who are not trial users because trial users in general have limited providers that are likely to be fully used
+
+1. For the YAML editor page, we split the frame into 2 halves. Display the YAML editor in the left half and in the right half, display the results of the pre-check
+
+2. For the SDL builder page, we do essentially the same as 1 above except we would first 
+     - Need to move the form fields that exist today on the right half of the page to be in a single column
+     - Left justify that whole column
+
+
+This is a rough/ initial/ tentative design that will likely be changed/ improved when we implement the feature
+
+![Bid-Precheck](bid-precheck-screen.png)
\ No newline at end of file
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diff --git a/src/content/aeps/aep-68/README.md b/src/content/aeps/aep-68/README.md
new file mode 100644
index 000000000..690453fcd
--- /dev/null
+++ b/src/content/aeps/aep-68/README.md
@@ -0,0 +1,53 @@
+---
+aep: 68
+title: "Console - Billing & Usage"
+author: Anil Murty (@anilmurty)
+status: Draft
+type: Standard
+category: Interface
+created: 2025-05-20
+updated: 2025-05-20
+estimated-completion: 2025-06-30
+roadmap: major
+---
+
+## Motivation
+
+As number of credit card users in Akash Console grows, a common request we here is being able to view usage and billing info
+
+## Background
+
+Akash Console support two payment options - Crypto Wallet based and Credit Card based. For Crypto Wallets it is easy enough for the users to see when they used tokens for deployments with a blockchain scan tool like mintscan. For credit card users there is no such tracking avaialble. We do get the invoice data from Stripe that we should be able to pass back to the user.
+
+Separately, users sometimes also may want to know how much of their funds are being used and for what - similar to the AWS (or othre cloud) billing pages where there is separation by services. In our case since we do not have managed services, showing some information about spend by provider or GPU models might be nice to have.
+
+## Proposed Solution
+
+A new page and submenu in the user Account Settings page called "Billing & Usage" that shows users information about billing and usage related things. The below elements are placeholder to be refined in eng and design conversations.
+
+- Tabular Data for
+  - Stripe Transactions 
+    - Date 
+    - Transaction Type (purchase/ refund) 
+    - Payment Method 
+    - Amount 
+    - Status (suceeded or failed)
+    - Link to download receipt
+  - Daily Usage 
+    - Date
+    - Resources Leased
+    - Amount Spent
+
+- Charts that show:
+  -  Cumulative Credit purchase over timne
+  -  Account balance over time 
+  -  Spend (in terms of compute costs for deployment) over time
+
+#### Tenative Design Mocks
+
+These are just placeholders for now to provide general direction and the final version will be different
+
+![Stripe Transactions](stripe-transactions.png)
+![Daily Usage](daily-usage.png)
+![Usage Analytics](usage-analytics.png)
+![Monthly Spend](monthly-spend.png)
\ No newline at end of file
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diff --git a/src/content/aeps/aep-68/usage-analytics.png b/src/content/aeps/aep-68/usage-analytics.png
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diff --git a/src/content/aeps/aep-69/README.md b/src/content/aeps/aep-69/README.md
new file mode 100644
index 000000000..c606b6c50
--- /dev/null
+++ b/src/content/aeps/aep-69/README.md
@@ -0,0 +1,51 @@
+---
+aep: 69
+title: "Provider Console API - v1"
+author: Anil Murty (@anilmurty) Jigar Patel (@jigar-arc10) Deval Patel (devalpatel67)
+status: Draft
+type: Standard
+category: Interface
+created: 2025-05-22
+updated: 2025-05-22
+estimated-completion: 2025-07-15
+roadmap: minor
+---
+
+## Motivation
+
+GPU providers using provider Console need to pull data into their own dashboards for financial and other reporting
+
+## Summary
+
+Provider Console currently displays the follownig stats in the dashboard:
+
+- Total (cumulative) revenue
+- Daily earnings (most recent 24 hours)
+
+Providers require more granular, structured access to:
+
+- Daily, weekly, and monthly revenue/utilization metrics
+- Net revenue/earnings after Akash fees (take rate)
+
+While showing these additional things in the UI would also be great - Providers that we have spoken with, typically want to pull this data via an API, ir order to:
+
+- Integrate with their internal dashboards
+- Geneate financing reports for their stakeholders
+- Automated revenue tracking and forecasting
+
+## Proposed Solution
+
+Offer a set of APIs to provide revenue and GPU/resources utilization metrics to providers through the provider console backend. 
+
+### Scope of work
+
+- Expose revenue and utilization data via authenticated REST API endpoints
+- Support filtering by date range (daily, weekly, monthly)
+- Create functions in indexer to retrieve data and create internal API endpoints in deploy-web to expose it through provider-console-backend
+- Introduce basic rate-limit to avoid abuse
+- Make any necessary changes to indexer to save desired data
+- Secure API with provider-specific authentication (likely using JWT Authentication)
+
+### API Spec
+
+TBD (will be added soon)
\ No newline at end of file
diff --git a/src/content/aeps/aep-7/README.md b/src/content/aeps/aep-7/README.md
index 238d8f512..0d4e8cf8b 100644
--- a/src/content/aeps/aep-7/README.md
+++ b/src/content/aeps/aep-7/README.md
@@ -1,7 +1,7 @@
 ---
 aep: 7
 title: "Incentivized Testnet 1: Akashian Challenge Phase 1"
-author: Greg Osuri (@gosuri), Chris Remus (@chris-remus)
+author: Greg Osuri (@gosuri) Chris Remus (@chris-remus)
 status: Final
 type: Meta
 requires: 5
@@ -67,4 +67,4 @@ A total of **3 million AKT (3% of AKT)** is allocated for rewards that include:
 
 ## Copyright
 
-All content herein is licensed under [Apache 2.0](https://www.apache.org/licenses/LICENSE-2.0).
\ No newline at end of file
+All content herein is licensed under [Apache 2.0](https://www.apache.org/licenses/LICENSE-2.0).
diff --git a/src/content/aeps/aep-70/README.md b/src/content/aeps/aep-70/README.md
new file mode 100644
index 000000000..9604bb22b
--- /dev/null
+++ b/src/content/aeps/aep-70/README.md
@@ -0,0 +1,28 @@
+---
+aep: 70
+title: "Console API - JWT and new features"
+author: Anil Murty (@anilmurty) Maxime Beauchamp (@baktun14)
+status: draft
+type: Standard
+category: Interface
+created: 2025-05-28
+updated: 2025-05-28
+estimated-completion: 2025-07-15
+roadmap: minor
+---
+
+
+## Motivation
+
+Accessing the API requires creating a certificate and working with mTLS. JWT eliminates the need for these.
+
+## Summary
+
+This is a follow up to the [AEP-63](https://akash.network/roadmap/aep-63/)
+
+## High Level Specification:
+
+1. Transition all existing endpoints to use JWT Authentication. This requires [AEP-64](https://akash.network/roadmap/aep-64/) to be complete
+2. Implement Retrieving Logs: `GET/v1/logs/{dseq}`
+3. Implement Retrieving Events: `GET/v1/events/{dseq}`
+4. Implement Funding Account via stripe checkout
\ No newline at end of file
diff --git a/src/content/aeps/aep-71/README.md b/src/content/aeps/aep-71/README.md
new file mode 100644
index 000000000..e16685cdf
--- /dev/null
+++ b/src/content/aeps/aep-71/README.md
@@ -0,0 +1,23 @@
+---
+aep: 71
+title: "Deployment Closure Alert in Console"
+description: "Alert and Notification when deployment closes for any reason"
+author: Anil Murty (@anilmurty) Iaroslav Grishajev (@ygrishajev)
+status: Final
+type: Standard
+category: Interface
+created: 2025-07-30
+updated: 2025-07-30
+completed: 2025-07-17
+roadmap: minor
+---
+
+## Motivation
+
+A users deployment can close becaause of reasons besides running out of funds (which is addressed as part of aep-33). This second type of Alert and Notification lets the user know immediately when a deployment is closed for any reason.
+
+## Summary
+
+Users of Akash Console will have the option of configuring a "Deployment Closed" alert for any deployment within their account and optionally tieing the alert to a notification channel. The initial notification channel supported will be email with more notification channels added over time, based on customer/ user feedback. 
+
+Github Milestone: https://github.com/akash-network/console/milestone/23
\ No newline at end of file
diff --git a/src/content/aeps/aep-72/README.md b/src/content/aeps/aep-72/README.md
new file mode 100644
index 000000000..7eda44976
--- /dev/null
+++ b/src/content/aeps/aep-72/README.md
@@ -0,0 +1,40 @@
+---
+aep: 72
+title: "Console - Improved User Onboarding"
+description: "Console User Onboarding on par with leading SaaS and CSPs"
+author: Anil Murty (@anilmurty) Maxime Beauchamp (@baktun14)
+status: Draft
+type: Standard
+category: Interface
+created: 2025-07-31
+updated: 2025-07-31
+estimated-completion: 2025-08-30
+roadmap: major
+---
+
+## Motivation
+
+Akash Console is the primary way that new users discover the magic of Akash Network and as such it is very important that the UX for getting them started be streamlined for maximum success along with somewhat generous trial credits comparable to other clouds (CSPs) in the industry.
+
+## Summary
+
+After surveying over a dozen products (across the public cloud, neo cloud and AI inference space) we've realized that there are a few common paradigms:
+1. A more generous amount of trial credit than the $10 that Console users get
+2. More restrictive trial sign up than the completely open and free trial that Console has (no sign up required, no credit card needed)
+3. A streamlined onboarding process with as few distractions as possible
+4. A limited time duration for deployments created that helps with freeing up resources that currently get hogged up and aren't available for new users
+5. A limited time duration for the trial itself which creates a sense of urgency
+6. Reminders within the UI as well as through notifications that encourage the user to upgrade and convert to a paid user so they can not lose their deployments or the trial credits.
+
+Further, the current trial is limited to a small subset of providers and we'd like to extend this to the entire network so that all providers benefit from it.
+
+With those in mind, we've enbarked on a project to build a new onboarding flow that will:
+1. Optimize the landing page for new users that is significantly simpler from a cognitive load perspective
+2. Require that the users sign up and enter a valid credit card (won't be charged) before they can start the trial
+3. Grant the user a lot more trial credits ($100 - which is a 10x increase from current) so that they can fully experience the product
+4. Open up the trial to ALL providers on the network - in conjunction with the[Tenant Incentives Pilot (TIPs)](https://github.com/orgs/akash-network/discussions/978) proposal
+5. Limit trial deployments to run for only 24 hours (will be closed unless the user upgrades to paid user but they can redeploy)
+6. Limit trials to last 30 days
+7. Plug the onboarding flow into the email notification system built as part of the Alert & Notification work in [AEP-33](https://akash.network/roadmap/aep-33/)
+
+Github Milestone: https://github.com/akash-network/console/milestone/23
\ No newline at end of file
diff --git a/src/content/aeps/aep-73/README.md b/src/content/aeps/aep-73/README.md
new file mode 100644
index 000000000..5beed6c7c
--- /dev/null
+++ b/src/content/aeps/aep-73/README.md
@@ -0,0 +1,39 @@
+---
+aep: 73
+title: "Console - New Product Announcement feature"
+description: "A way to inform customers and users about what's new in Akash"
+author: Anil Murty (@anilmurty)
+status: Draft
+type: Standard
+category: Interface
+created: 2025-07-31
+updated: 2025-07-31
+estimated-completion: 2025-08-31
+roadmap: major
+---
+
+## Motivation
+
+Informing Akash users and customers about what new products & features have been introduced will go a long way in driving retention. This is particularly important now as the Akash Core team and community have been rapidly adding new functionality to the products and platform this year.
+
+## Summary
+
+Keeping customers informed about new features being introduced in Akash Console and also generally on the Akash platform as whole (for both tenants/ users as well as providers) is a challenge. This is hard enough for traditional products to do where every users is known, only harder for Akash where many users are anonymous. At the same time, the risk of users not choosing Akash or worse, deciding to abandon it becuase they think a certain feature is missing while it actually is there, is significant. As such, a way to communicate these updates within the product and optionally push them to users where there is an option to do so, reduces the probability of that happening.
+
+## Proposed Solution
+
+### UI/ UX
+
+1. A side bar within Console on the right side that provides a running list of everything that is new in Akash. Each element in the list has a heading, a brief description and an optional hyperlink to a longer post (likely on the blog site) that provides details.
+2. A "notification" icon ("New Updates") on the top bar that lights up if there are new features added to the list
+3. An option to sign up to be notified when a new update drops. Doing so, will fire off an email to the user at the email address that they are registeted in Console with. 
+4. (Ideally) the ability for the user to provide feedback about each new feature
+
+### Implementation
+
+There are a coupld options for how the content can be managed.
+
+1. Use a product that specializes in this type of thing. A few examples include AnnounceKit, Appcues, Amplitude and some open source alternatives.
+2. Use markdown files (like we do for for the website at https://github.com/akash-network/website/tree/main/src/content/Blog)
+
+Github Milestone: https://github.com/akash-network/console/milestone/25
\ No newline at end of file
diff --git a/src/content/aeps/aep-74/README.md b/src/content/aeps/aep-74/README.md
new file mode 100644
index 000000000..fec086ab5
--- /dev/null
+++ b/src/content/aeps/aep-74/README.md
@@ -0,0 +1,38 @@
+---
+aep: 74
+title: "Console - Auto Credit Reload"
+description: "Make it easier for customers to keep their deployments running"
+author: Anil Murty (@anilmurty)
+status: Draft
+type: Standard
+category: Interface
+created: 2025-07-31
+updated: 2025-08-01
+estimated-completion: 2025-09-30
+roadmap: minor
+---
+
+## Motivation
+
+Making it easier for existing paying users to keep their deployments running without needing to manually intervene on the payment side, improves user experience and drives utilization higher
+
+## Summary
+
+Akash Console added support for being able to automatically top up deployment escrow accounts before they run out via [AEP-57](https://akash.network/roadmap/aep-57/) That feature alleviated a major pain point for Akash users but only went as far as the amount of credits in the account. The next logical step to that is to extend the top up functionality so that it automatically also purchases and adds more credits to the user account which can then be used to fund any automatic escrow top up jobs periodically. This would allow users and customers with long running workloads (like inference APIs) to (in theory) never have to worry about purchasing credits or topping up their deployments.
+
+## Proposed Solution
+
+Customers that have a valid credit card saved in the system (saving of credit cards will be available once [AEP-72](https://akash.network/roadmap/aep-72/) ships) will have the option to enable "Auto Credit Reload" along with two dollar amounts - one dollar amount for the balance to maintain and another dollar amount that is a threshold at which the reload is triggered. When Auto Credit Reload is enabled, a service will monitor the customer's credit balance and when it falls below a (user defined) threshold, it will kick of a purchase of credits necessary to bring back the account balance to the configured balance.
+
+### UI/ UX
+
+1. Customer sets up and saves at least one valid credit card in the system. If there is more than one, then a default one to charge is selected. Note that implementing this is out of scope of this AEP but is addressed by [AEP-57](https://akash.network/roadmap/aep-57/) which needs to be completed before this AEP.
+2. There is a global configuration in the same payment settings page that allows the user to enable or disable "Auto Credit Reload"
+3. Enabling Auto Credit Reload requires them to specify two values:
+   - A "Reload Balance" (this is the account balance that the service will reload to periodically). There will be a minimum amount here (say $15)
+   - A "Reload Threshold" (this is the condition that will trigged the service to perform a reload). There will be a minimum amount for this also (say $5)
+4. The service will monitor the account balance and when the balance is at or below the Reload Threshold it will trigged a credit purchase to bring the balance up to the Reload Balance. For example if the user sets a Reload Balance of $100 and a Threshold of $20, a credit purchase of $80 will automatically be performed when the account balance drops to $20.
+5. The user will have an option to be notified (via email) when the Auto Credit Reload is performed. 
+6. If the Auto Reload fails (due to an invalid credit card or other issue) the user will be notified. Not addressing the issue may result in the balance going to $0 0 - which will over time cause deployments to run out of funds and shut down.
+
+Github Milestone: https://github.com/akash-network/console/milestone/27
\ No newline at end of file
diff --git a/src/content/aeps/aep-75/README.md b/src/content/aeps/aep-75/README.md
new file mode 100644
index 000000000..66a1e9b6f
--- /dev/null
+++ b/src/content/aeps/aep-75/README.md
@@ -0,0 +1,182 @@
+---
+aep: 75
+title: "Multi-depositor escrow account"
+author: Artur Troian (@troian)
+status: Draft
+type: Standard
+category: Core
+created: 2025-08-18
+updated: 2025-08-18
+estimated-completion: 2025-08-30
+roadmap: major
+---
+
+## Abstract
+
+This AEP proposes enhancement of the `x/escrow` module with support of multiple funds depositors
+
+## Motivation
+
+The current deployment and escrow workflows are limited to using a single depositor for funds, which creates several significant limitations for users and automation workflows:
+
+### Current Limitations
+
+1. **Immutable Depositor Constraint**:
+   - If a deployment owner has multiple spend authorizations from different wallets, only one can be used during the entire lifetime of the deployment
+   - The depositor is immutable once set, preventing flexibility in fund management
+
+2. **Inefficient Fund Utilization**:
+   - Users cannot combine multiple smaller grants to meet larger deposit requirements
+   - Example: An owner with two separate grants (0.2 uAKT and 0.3 uAKT) cannot use them together to create a deployment requiring 0.5 uAKT initial deposit
+   - This forces users to maintain larger individual grants or miss deployment opportunities
+
+3. **Unnecessary Complexity in Authorization**:
+   - Users must explicitly specify the depositor address when using authorization (authz) for deposits
+   - This requirement is redundant since grants can be automatically fetched from the chain state during transaction execution
+   - Adds unnecessary complexity to the user experience and automation workflows
+
+### Benefits of Multi-Depositor Support
+
+Implementing multi-depositor escrow accounts would provide:
+- **Flexible Fund Management**: Ability to use multiple funding sources for a single deployment
+- **Improved Efficiency**: Better utilization of available grants and funds
+- **Simplified User Experience**: Reduced complexity in authorization workflows
+- **Enhanced Automation**: More flexible automation capabilities for deployment management
+
+
+## Technical Details
+
+1. Introduce new enum `DepositSource`
+```proto
+// DepositSource is an enum which lists source of funds for deployment deposit.
+enum DepositSource {
+  option (gogoproto.goproto_enum_prefix) = false;
+
+  // Prefix should start with 0 in enum. So declaring dummy state.
+  invalid = 0 [(gogoproto.enumvalue_customname) = "DepositSourceInvalid"];
+  // DepositSourceBalance denotes account balance as source of funds
+  balance = 1 [(gogoproto.enumvalue_customname)  = "DepositSourceBalance"];
+  // DepositSourceGrant denotes authz grants as source of funds
+  grant = 2 [(gogoproto.enumvalue_customname)  = "DepositSourceGrant"];
+}
+```
+2. Replace `depositor` field with `deposit_sources` in `MsgCreateDeployment` and `MsgDepositDeployment`
+```
+// MsgCreateDeployment defines an SDK message for creating deployment.
+message MsgCreateDeployment {
+  option (gogoproto.equal)      = false;
+
+  // ID is the unique identifier of the deployment.
+  akash.deployment.v1.DeploymentID id = 1 [
+    (gogoproto.nullable)   = false,
+    (gogoproto.customname) = "ID",
+    (gogoproto.jsontag)    = "id",
+    (gogoproto.moretags)   = "yaml:\"id\""
+  ];
+
+  // GroupSpec is a list of group specifications for the deployment.
+  // This field is required and must be a list of GroupSpec.
+  repeated GroupSpec groups = 2 [
+    (gogoproto.nullable)     = false,
+    (gogoproto.castrepeated) = "GroupSpecs",
+    (gogoproto.jsontag)      = "groups",
+    (gogoproto.moretags)     = "yaml:\"groups\""
+  ];
+
+  // Hash of the deployment.
+  bytes hash = 3 [
+    (gogoproto.jsontag)  = "hash",
+    (gogoproto.moretags) = "yaml:\"hash\""
+  ];
+
+  // Deposit specifies the amount of coins to include in the deployment's first deposit.
+  cosmos.base.v1beta1.Coin deposit = 4 [
+    (gogoproto.nullable) = false,
+    (gogoproto.moretags) = "yaml:\"deposit\""
+  ];
+
+  repeated akash.deployment.v1.DepositSource deposit_sources = 5 [
+    (gogoproto.jsontag)  = "deposit_sources",
+    (gogoproto.moretags) = "yaml:\"deposit_sources\""
+  ];
+}
+
+// MsgDepositDeployment represents a message to deposit funds into an existing deployment
+// on the blockchain. This is part of the interaction mechanism for managing
+// deployment-related resources.
+message MsgDepositDeployment {
+  option (gogoproto.equal) = false;
+
+  // ID is the unique identifier of the deployment.
+  DeploymentID id = 1 [
+    (gogoproto.nullable)   = false,
+    (gogoproto.customname) = "ID",
+    (gogoproto.jsontag)    = "id",
+    (gogoproto.moretags)   = "yaml:\"id\""
+  ];
+
+  // Amount defines the funds to deposit into the deployment.
+  // It is specified as a coin amount (denomination and value).
+  cosmos.base.v1beta1.Coin amount = 2 [
+    (gogoproto.nullable) = false,
+    (gogoproto.jsontag)  = "amount",
+    (gogoproto.moretags) = "yaml:\"amount\""
+  ];
+
+  repeated DepositSource deposit_sources = 3 [
+    (gogoproto.jsontag)  = "deposit_sources",
+    (gogoproto.moretags) = "yaml:\"deposit_sources\""
+  ];
+}
+```
+
+### Implementation Guidelines
+
+#### Deposit sources
+
+`DepositSources` array within both messages must:
+- contain at least one valid deposit source
+- must not contain duplicates
+- must preserve order of the sources
+
+#### x/deployment
+
+Following requirements apply for both `MsgCreateDeployment` and `MsgDepositDeployment`.
+
+On message receive:
+1. Process deposit autorizations in the order they are specified in the message
+  - deduct funds from source up to the `deposit` value
+  - if deposit amount not satisfied, try next source until either
+    - deposit amount is satisfies - transaction is successul
+    - total amount available via all sources is below requested deposit amount - transaction fails
+2. Build list of depositor addresses and amounts to be deducted and transfer list to the `escrow.AccountCreate` or `escrow.AccountDeposit`
+
+#### x/escrow
+
+Following requirements apply for both `AccountCreate` and `AccountDeposit`.
+
+1. Order of deposits must be preserved
+2. Each if deposit from same address already exists, then funds shall be combined
+
+##### Account settlement
+
+Balance settlemnt proceeds in the order of deposits have been received
+
+#### x/authz
+
+Implement secondary index for efficient search of available grants by grantee address and msgTypeUrl.
+The prefix of the index is defined as:
+```go
+var GranteeMsgKey = []byte{0x04} // reverse prefix to get grantee's grants by msgTypeUrl
+```
+
+The `Keeper` interface should be extended with following:
+```go
+type Keeper interface {
+  GetGranteeGrantsByMsgType(ctx context.Context, grantee sdk.AccAddress, msgType string, onGrant func(context.Context, sdk.AccAddress, authz.Authorization, *time.Time) bool)
+}
+```
+
+## Copyright
+
+All content herein is licensed under [Apache 2.0](https://www.apache.org/licenses/LICENSE-2.0).
diff --git a/src/content/aeps/aep-76/DESIGN.md b/src/content/aeps/aep-76/DESIGN.md
new file mode 100644
index 000000000..05962af02
--- /dev/null
+++ b/src/content/aeps/aep-76/DESIGN.md
@@ -0,0 +1,221 @@
+# BME Architecture Blueprint
+
+**Document status:** Draft for architecture sign-off  
+**Related spec:** [AEP-76](https://akash.network/roadmap/aep-76/)
+**Scope:** Phase 0 (Architecture) - no code delivery, establish invariant-complete blueprint
+**Prepared by:** Greg Osuri
+**Reviewers:** Protocol Engineering, Economics, Client Engineering, DevOps
+
+
+## 1. Objectives & Deliverables
+- Freeze protocol responsibilities for `x/bme`, `x/act`, and `x/oracle` prior to implementation.
+- Define complete data model (stores, module accounts, params) and inter-module contracts.
+- Slice migration path from legacy AEP-23 settlements to BME without breaking existing leases.
+- Quantify rounding rules, oracle windowing, and dust handling to guarantee deterministic accounting.
+- Provide governance & ops requirements (parameters, metrics, emergency hooks) needed at genesis upgrade.
+
+## 2. Component Boundary Overview
+| Component | Responsibilities | Key Interactions |
+| --- | --- | --- |
+| `x/bme` | Vault custody, remint-credit ledger, ACT mint/burn execution, circuit-breaker enforcement | `MsgMintACT`, `MsgBurnACT`, settlement adapter invoked from `x/escrow.paymentWithdraw`, keeper queries for CR/metrics |
+| `x/act` | Account-bound ACT balances, non-transferable spend authority, org/project scoping | Keeper exposes `Mint`, `Burn`, `SpendToModule(escrow)`; gRPC queries for balances and metadata |
+| `x/oracle` | Medianized AKT/USD price from Osmosis TWAP + secondary feed, freshness validation, deviation guards | `GetPrice(ctx, PriceUseCase)` with use-case tolerances (`Mint`, `Settle`, `Refund`); emits events for monitoring |
+| `x/escrow` | Existing lease escrow accounts, per-block accrual, fee routing, provider withdrawals | Calls `bmeKeeper.WithdrawFromACT(ctx, payment)` prior to subtracting fees; registers BME settlement hook without new messages |
+| `x/market` | Order/bid/lease lifecycle, escrow funding, provider withdrawals | Continues using `PaymentCreate`, `PaymentWithdraw`, `PaymentClose`; orchestrates auto top-ups via `MsgMintACT` if balances low |
+| Console (off-chain) | UX, credit-card onramp, telemetry dashboards | REST/gRPC client of `MsgMintACT`, streams CR metrics, invokes existing `MsgWithdrawLease` when needed |
+
+## 3. Data Model & Storage Layout
+### 3.1 Module Accounts & Supply Hooks
+- `bme_vault` (new module account)
+  - Holds uAKT from tenant top-ups.
+  - Balance mirrors `RemintCredits` until settlement consumes credits.
+  - Marked as `ModuleAccountTypeBasic` with burn permissions disabled (burn handled via keeper logic).
+- `act_module` (new module account)
+  - Not spendable; exists to satisfy Cosmos SDK supply bookkeeping for ACT denominations (if minted as `uact`).
+- Ensure `SupplyKeeper` whitelist includes ACT for module-level mint/burn.
+
+### 3.2 Key/Value Stores
+| Store | Key (prefix) | Value | Notes |
+| --- | --- | --- | --- |
+| `bme/params` | `0x00` | `Params` | CR thresholds, oracle ids, rounding mode, min mint size |
+| `bme/remint` | `0x01` + `uint64` epoch? -> to support histograms, but Phase 0 uses singleton | `sdk.Dec` | Tracks available AKT supply for remint; represented as `sdk.Dec` with 6 decimal precision |
+| `bme/metrics` | `0x02` | `OutstandingACT`, `NetBurnRolling` | Maintained via structs for telemetry |
+| `act/balances` | `0x10` + `sdk.AccAddress` | `sdk.Dec` | Non-transferable balances; stored in micro dollars (e.g., `uact`) |
+| `act/metadata` | `0x11` + `sdk.AccAddress` | `AccountMeta` | Ties balances to auth scopes (org/project) |
+| `act/escrow_commit` | `0x12` + `types.AccountID` | `sdk.Dec` | Tracks ACT that has been lent to escrow accounts; mirrors escrow `Balance+Funds` |
+| `oracle/prices` | `0x20` + `PriceUseCase` | `PriceSnapshot` | Contains TWAP result, timestamp, stddev, source weights |
+| `oracle/feeds` | `0x21` | `FeedConfig[]` | Governance-managed data sources |
+
+### 3.3 State Invariants
+- `RemintCredits >= 0` (except transiently in halt mode; if negative, circuit breaker escalates).
+- `OutstandingACT = Σ balances(owner) = Σ escrow_commit` (validated via end blocker).
+- Every escrow account (`types.Account`) must hold `Balance.Denom == uact`; `escrow_commit[id]` mirrors `Balance + Funds` to the micro-dollar.
+- `CR = (VaultBalance(uakt_to_dec) * P_ref) / OutstandingACT`; enforce `CR >= params.soft_floor` outside halt.
+- Vault bank balance must equal `RemintCredits` converted to `sdk.Int` minus in-flight dust accumulator.
+- ACT denomination is non-transferable: bank `SendCoins` disabled for `uact` except from module to module for refunds/settlements via keeper-controlled path.
+
+### 3.4 Numeric Representation & Rounding
+- Base units: `uakt` (1e-6 AKT) and `uact` (1e-6 USD).
+- Maintain internal `sdk.Dec` precision at 18 decimal places; round to 6 decimals for external ledger writes.
+- Mint path: floor ACT amounts (tenant-friendly), accumulate residual in `VaultDust` (new field) and add to `RemintCredits` when exceeding `1 uakt`.
+- Settlement path: floor AKT payouts (provider-safe). Residual flows to `VaultDust` as positive drift, improving CR.
+- Refund path mirrors settlement rounding to ensure no arbitrage beyond dust-level.
+
+### 3.5 Keeper Interfaces (Phase 0 contracts)
+- `x/act` exposes:
+  - `Credit(ctx, owner, amount sdk.DecCoin, meta AccountMeta)` → increase free ACT balance.
+  - `CommitToEscrow(ctx, owner, escrowID, amount)` → move ACT from free balance to `escrow_commit[escrowID]` (without bank transfer).
+  - `BurnEscrowBalance(ctx, escrowID, amount)` → reduce commitment during settlement/refund.
+  - `SpendToModule(ctx, owner, module string, amount)` → helper for migrations (console seed) but locked to `escrow` module.
+- `x/bme` exposes:
+  - `WithdrawFromACT(ctx, escrowID, provider sdk.AccAddress, amount sdk.DecCoin) (sdk.Int, sdk.Int, sdk.Int, sdk.Dec, error)` returning `(akt_out, use_vault, shortfall, price)`.
+  - `QueryVault`, `QueryCR`, telemetry getters.
+- `x/escrow` adds hook registration:
+  - `SetSettlementAdapter(fn SettlementAdapter)` where `SettlementAdapter` signature matches `WithdrawFromACT`; default implementation is no-op unless BME enabled.
+
+## 4. Oracle Architecture
+### 4.1 Feed Pipeline
+1. Osmosis TWAP querier (IBC / LCD) supplies 30-min TWAP with 5-min step size, outlier rejection 0.1%.
+2. External feed aggregator (e.g., Pyth) delivered via off-chain relayer posting `MsgSubmitPrice` to `x/oracle`.
+3. `x/oracle` keeper medianizes available feeds per use-case. Each use-case may specify:
+   - `MaxAge` (e.g., mint: 10m; settle/refund: 5m).
+   - `MaxDeviation` (1.5%).
+   - `Smoothing` (EWMA coefficient for CR reference price).
+4. On failure, `ErrOracle` surfaces; `x/bme` can degrade to emergency policy (halt new mints).
+
+### 4.2 Data Structures
+```go
+// oracle/types/price.go
+type PriceSnapshot struct {
+    DenomPair   string    // "AKT/USD"
+    UseCase     PriceUseCase
+    Price       sdk.Dec   // medianized result
+    Sources     []PriceSource // metadata for audits
+    Timestamp   time.Time
+    StdDev      sdk.Dec   // for monitoring
+}
+
+type PriceSource struct {
+    ID          string    // e.g., "osmosis:pool-XYZ"
+    Price       sdk.Dec
+    Weight      sdk.Dec
+    UpdateTime  time.Time
+}
+```
+
+### 4.3 Governance Parameters
+- `OracleMinFeeds`: default 1 (Osmosis) but prefer 2 for production.
+- `OracleHaltDeviation`: if deviation between sources > 3%, trip breaker.
+- `OracleDriftMax`: reject price if last update older than `MaxAge` (per use-case). Emits telemetry.
+
+## 5. Process Flows (Textual State Machines)
+### 5.1 Mint Path (`MsgMintACT`)
+`MsgMintACT` fields:
+- `payer sdk.AccAddress`
+- `owner sdk.AccAddress`
+- `akt_in sdk.Coin` (optional, mutually exclusive with `usd_exact`)
+- `usd_exact sdk.Dec` (optional USD target; keeper back-solves AKT)
+- `escrow_id types.AccountID` (optional, pre-commit minted ACT to escrow account)
+- `memo string` (metadata such as invoice or payment provider reference)
+
+1. Auth layer validates payer signature or feegrant.
+2. Keeper fetches `P_mint` with `PriceUseCaseMint` tolerances.
+3. Determine `akt_req`:
+   - If `usd_exact`: `ceil(usd_exact / P_mint)`.
+   - Else `akt_in` direct.
+4. `bank.SendCoins(payer → bme_vault, akt_req)`; update `RemintCredits += akt_req`.
+5. Calculate `act_out = floor(akt_req * P_mint)`; `actKeeper.Credit(owner, act_out)` adds to non-transferable ledger and, if requested, increments `escrow_commit` for the targeted escrow account.
+6. Update metrics: `OutstandingACT += act_out`; recompute `CR` using smoothed `P_ref` (EWMA seeded with minted price).
+7. Emit `EventMint` and persist TX trace (payer, owner, price, dust, escrow_id if provided).
+8. Circuit breaker check: if new `CR` < `params.halt_threshold`, revert unless bypass flag set via governance emergency.
+
+### 5.2 Settlement Path (escrow `AccountSettle` → `paymentWithdraw`)
+1. Existing `x/escrow` end-block logic advances `AccountSettle` for each open escrow account, accruing `FractionalPayment.Balance` in `uact`.
+2. When `PaymentWithdraw` or `PaymentClose` is invoked (from `MsgWithdrawLease`, `MsgCloseBid`, or automatic hooks), control enters the new BME settlement adapter before fees are computed.
+3. Adapter obtains `act_spend = payment.Balance` (DecCoin, denom `uact`), resolves the escrow account owner from `act/escrow_commit`, and calls `bmeKeeper.WithdrawFromACT(ctx, escrowID, provider, act_spend)`.
+4. `WithdrawFromACT`:
+   - Fetches `P_settle` using `PriceUseCaseSettle` (freshness 5 min, deviation ≤ 1.5%).
+   - Burns ACT from the tenant escrow account (`x/act.BurnEscrowBalance`), updating `OutstandingACT -= act_spend`.
+   - Calculates `akt_out = floor(act_spend / P_settle)`.
+   - Decrements `RemintCredits` by `use_vault = min(akt_out, RemintCredits)` and transfers that amount of `uakt` from `bme_vault` to the escrow module.
+   - Mints any `shortfall = akt_out - use_vault` directly into the escrow module using `x/mint` (inflationary component).
+   - Returns `(akt_out, use_vault, shortfall, P_settle)` to the caller and emits `event_bme_settlement`.
+5. `paymentWithdraw` replaces the payment balance with a `sdk.DecCoin{Denom: uakt, Amount: akt_out}` before calling `TakeKeeper.SubtractFees`, preserving existing fee logic.
+6. Coins are sent from the escrow module to the provider in `uakt` without introducing new messages; telemetry captures vault vs. mint proportions and updated CR.
+7. Circuit breaker checks run inside `WithdrawFromACT`. If CR would fall below `halt_threshold`, adapter returns `ErrCircuitBreaker` causing the withdrawal to defer until governance intervention (settlement queue remains pending but no extra gas is charged).
+
+### 5.3 Refund Path (`MsgBurnACT`)
+`MsgBurnACT` fields:
+- `owner sdk.AccAddress`
+- `to sdk.AccAddress` (defaults to owner)
+- `act_burn sdk.DecCoin`
+- `memo string`
+
+Mirror settlement but `to` is tenant-provided address; share code path to reduce divergence. Refunds allowed even in halt (unless governance toggles `refund_disabled`).
+
+## 6. Circuit Breaker Logic
+- Parameters: `warn_threshold` (default 0.95), `halt_threshold` (0.90), `restart_threshold` (0.93 to resume), `mint_cooldown_blocks` (throttles per block).
+- Implementation: stored in `Params`; `x/bme` leverages `BeforeMint` hook to enforce.
+- Breaking sequence:
+  1. If `CR < warn`: emit `EventCRWarning`, no functional change.
+  2. If `CR < halt`: set `MintPaused = true`; `MsgMintACT` errors with `ErrCircuitBreaker`.
+  3. Settlements/refunds remain allowed to restore CR.
+  4. Governance or automatic logic flips `MintPaused` once CR > restart for `cooldown_period` blocks.
+- Additional lever: `MaxMintPerBlock` parameter to avoid sudden CR dilutions.
+
+## 7. Migration Strategy (Phase 0 Decisions)
+1. **Pre-upgrade snapshot:** capture outstanding stable balances and awaiting settlements from AEP-23.
+2. **Convert console stable escrow → ACT**
+   - Off-chain service buys AKT at `P_transition` (oracle price at upgrade block).
+   - Submit `MsgMintACT` using AKT purchased; ensures `bme_vault` seeded and `RemintCredits` align with outstanding liability.
+3. **Seed Vault Buffer:** Governance deposit of AKT (e.g., community pool transfer) to adjust CR > 1 before enabling new mints.
+4. **Disable stable payouts:** set `x/market` params to ignore USDC; ensure no outstanding USDC invoices remain.
+5. **Genesis modifications:** include new module accounts, new params, zeroed stores, and initial metrics (CR computed from seeded values).
+6. **Backwards compatibility:** Provide read-only translation endpoints so console can display pre-upgrade balances as ACT.
+
+## 8. Parameter Catalog (Initial Values TBD)
+| Parameter | Module | Purpose | Notes |
+| --- | --- | --- | --- |
+| `warn_threshold` | `x/bme` | CR warning trigger | e.g., 0.95 |
+| `halt_threshold` | `x/bme` | Pause mint threshold | e.g., 0.90 |
+| `restart_threshold` | `x/bme` | Resume mint threshold | > halt |
+| `mint_cooldown_blocks` | `x/bme` | Rate limit for new ACT mints | e.g., 10 |
+| `max_mint_per_block` | `x/bme` | Additional throttle | sized vs. liquidity |
+| `oracle_max_age_mint` | `x/oracle` | Freshness requirement | 600s |
+| `oracle_max_age_settle` | `x/oracle` | 300s |
+| `oracle_deviation_limit` | `x/oracle` | Source disagreement bound | 0.015 |
+| `dust_threshold_uakt` | `x/bme` | When to sweep rounding dust | 1 uAKT |
+| `min_mint_act` | `x/bme` | Lower bound per mint (USD) | e.g., 10 USD |
+| `refund_fee_bps` | `x/bme` | Optional fee to discourage frequent refunds | default 0 |
+
+## 9. Security & Audit Focus Areas
+- **Oracle Manipulation:** Document handshake between console RFQ and on-chain oracle; require price attestations to match within tolerance; design monitoring for feed downtime.
+- **Module Accounts:** Ensure `bme_vault` flagged in supply keeper to avoid send-enabled operations; restrict `uact` send to module pathways to prevent leakage.
+- **Invariant Checks:** Add end-block invariants verifying `OutstandingACT` sum, `RemintCredits` alignment, and `CR` calculations. Provide CLI `akashd q bme invariants` for ops.
+- **AuthZ:** Phase 0 defines `MsgMintACT`/`MsgBurnACT` permissions; console uses `ServiceAccount` pattern via `authz` to mint on behalf of tenant.
+
+## 10. Observability & Telemetry Requirements
+- Instrument Prometheus gauges: `bme_outstanding_act`, `bme_vault_uakt`, `bme_cr`, `bme_mint_paused`.
+- Emit events with consistent attribute keys for price, dust, vault usage to feed data warehouse.
+- Provide gRPC queries:
+  - `QueryVault()` returning balance, remint credits, CR.
+  - `QueryAccountACT(owner)` returning balances and spend forecasts.
+  - `QueryParameters()` for governance dashboards.
+- Define ABCI telemetry for circuit-breaker transitions (info log + event).
+
+## 11. Open Questions for Sign-off
+1. **Denomination Strategy:** Keep ACT off bank module (custom denom) vs. integrate as IBC-denom-like? Decision required to avoid IBC send.
+2. **RemintCredits Representation:** Should we track as `sdk.Int` (1e-6 precision) or `sdk.Dec` to accommodate fractional results? Implementation preference affects rounding logic.
+3. **Oracle Delivery:** Do we rely on existing price server infrastructure, or must we introduce new relayer? Need ops alignment.
+4. **Refund Policy:** Should refunds remain unrestricted during CR stress or adopt staged throttling (e.g., queue with per-block cap)?
+5. **Dust Sweeping Frequency:** prefer immediate re-credit vs. periodic end-block sweep; decision influences deterministic accounting tests.
+6. **Genesis Seed Amount:** Determine AKT buffer to target initial CR ≥ 1.05.
+
+## 12. Sign-off Checklist
+- [ ] Economics + governance approve CR thresholds, rounding, and dust behavior.
+- [ ] Protocol engineering validates store layout, invariants, and message schemas.
+- [ ] Console/backend teams confirm API contracts (`MsgMintACT`, telemetry endpoints).
+- [ ] DevOps confirms oracle infra and monitoring coverage.
+- [ ] Migration plan reviewed with product & support; run book drafted.
+
+---
diff --git a/src/content/aeps/aep-76/README.md b/src/content/aeps/aep-76/README.md
new file mode 100644
index 000000000..de9cee6d4
--- /dev/null
+++ b/src/content/aeps/aep-76/README.md
@@ -0,0 +1,490 @@
+---
+aep: 76
+title: "Burn Mint Equilibrium On Akash"
+author: Greg Osuri (@gosuri)
+status: Draft
+type: Standard
+category: Economics
+created: 2025-09-21
+updated: 2025-09-21
+estimated-completion: 2025-12-30
+roadmap: major
+replaces: 55
+---
+# Motivation
+
+AKT is the native cryptocurrency of Akash Network and was initially conceived as the sole payment method. When a lease is established, tenants and providers agree on a price in AKT. These leases are open-ended, continuing until either party terminates them. However, the fluctuating value of AKT presents a challenge. Participants typically anticipate stable pricing equivalent to USD, and AKT's price instability compromises its utility as a payment mechanism.
+
+To address this challenge, [AEP-23](https://github.com/akash-network/AEP/tree/main/spec/aep-23) was proposed, approved, and implemented, introducing stablecoin payments alongside AKT. This system enables tenants to utilize whitelisted stablecoins, such as USDC, for both pricing and settlement. A portion of the hosting fees collected during settlement is distributed to AKT stakers, rewarding them for their role in securing the blockchain. While this stable payment solution significantly boosted revenue growth on the Akash network, it also led to a notable drawback: reduced demand for AKT, as the staking incentives proved insufficient to sustain the token's value.
+
+Maintaining the foundational role of AKT within the Akash ecosystem is crucial. Therefore, revitalizing demand for AKT while simultaneously ensuring stable settlement options is essential.
+
+### Goals
+1. Restore **AKT‑only settlement** while preserving tenants’ **stable USD experience**.  
+2. Increase **structural AKT demand** and shrink effective float.  
+3. Make the mechanism **sustainably neutral** without hidden taxes; volatility and timing determine net burn/mint, not a fee.
+
+### Non Goals
+1. Replace or modify consensus/security.
+2. Depend on any single off‑chain venue; use diverse liquidity sources (Osmosis TWAP and external oracle aggregation). *Osmosis supports on‑chain [TWAP](https://docs.osmosis.zone/overview/features/concentrated-liquidity); Cosmos SDK supports custom bank/mint flows*
+
+## Burn-Mint-Equilibrium Overview
+
+The Burn Mint Equilibrium (BME) is a tokenomic model designed to balance supply and demand between a volatile value-accruing token (like AKT) and a stable utility token used for transactions. Inspired by models like those in Factom, Helium, and algorithmic stablecoins, BME creates ongoing demand for the volatile token by requiring it to be burned for minting the stable token, while allowing the reverse process (burning the stable token to mint the volatile one) to maintain equilibrium via arbitrage. This prevents supply bloat, captures usage value in the volatile token, and encourages holding/staking.
+
+In the context of Akash Network, the goal is to preserve stable USD-equivalent payments (building on AEP-23's success in driving revenue growth) while revitalizing demand for AKT. Currently, AEP-23 allows tenants to use whitelisted stablecoins (e.g., USDC) for lease pricing and settlement, with a percentage of fees distributed to AKT stakers. However, this shifts demand away from AKT. A BME mechanism addresses this by introducing a native stable token backed algorithmically by AKT, making AKT essential for generating stable payment units.
+
+## Key Benefits for Akash
+
+* **Stable Payments Retained:** Leases remain priced and settled in stable units, avoiding AKT volatility for users.  
+* **AKT Demand Revitalized:** Minting stable units requires burning AKT, creating buy-and-burn pressure proportional to network usage.  
+* **Deflationary Potential:** If network growth leads to more burns than mints, AKT becomes scarcer, benefiting stakers. Helium validated this as its native token HNT became net [deflationary](https://twitter.com/MessariCrypto/status/1965069808887886043) recently as adoption grew.  
+* **Compatibility with AEP-23:** This can extend the existing stablecoin system by integrating a native BME token as the primary or optional payment method, with fees still flowing to stakers.
+
+# Proposal
+
+BME overhauls Akash network lease settlement and tenant payments, improving user experience and tokenomics.
+
+### Core Changes
+* **AKT for Lease Settlement:** All leases settle in AKT.  
+* **ACT for Tenant Payments:** Tenants prepay with ACT, a non-transferable USD-pegged compute credit, generated by burning AKT. ACT is burned at settlement, and AKT re-minted to providers at the current price, automatically adjusting supply based on AKT demand.
+
+### Enhanced User Experience (UX)
+* **USD Quoting:** Console and APIs display costs in USD.  
+* **Flexible Payments:** Tenants can pay with credit cards or AKT.  
+* **Credit Card Payments Drive AKT Demand:** Credit card payments trigger immediate AKT market buys, which are then burned to mint ACT. 
+
+### Positive Token Effects
+* **Increased AKT Demand:** Every dollar spent on compute boosts AKT demand.  
+* **ACT as Supply Sink:** Outstanding ACT reduces circulating AKT supply between top-up and payout.  
+* **Net Burns from AKT Appreciation:** AKT appreciation between top-up and payout results in a net burn of AKT.  
+* **AEP-23 Take-Rate Eliminated:** BME removes AEP-23 take-rates, re-centering the economic model on AKT.
+
+#### Driving AKT Demand and Price Support
+* **Immediate AKT Market Buy:** Every dollar spent on compute directly drives AKT demand.  
+* **Outstanding ACT as Escrowed AKT (BME Vault):** ACT held by users acts as escrowed AKT, removing it from liquid supply.  
+* **Favorable Price Drift and Net Burns:** If AKT price increases between top-up and settlement, a net burn of AKT occurs at payout.
+* **Batch Top-ups Deepen AKT Sink:** Larger, infrequent top-ups increase outstanding ACT, deepening the AKT sink and reducing circulating supply.
+
+#### Economic Walkthrough
+* **As of Sept 16, 2025:** Total supply minted ≈ 278,583,970 AKT; max 388,539,008; price ≈ $1.14  
+* Assume the average tenant keeps **7 days** of runway in ACT.  
+* If monthly gross new top‑ups are $10M, that’s an immediate **market buy** of \~**8.77M AKT** at $1.14 and removal from float until spent.  
+* If the blended settlement price later averages $1.25, providers receive \~**$10M / 1.25 \= 8.00M AKT**.  
+  * **Net monthly burn:** **\~0.77M AKT** plus the *time‑in‑vault* float reduction during the month.
+
+## Tokens & Denoms
+* **AKT (existing):** staking token & settlement currency.  
+* **ACT (new):** *Akash Compute Token*.  
+  * **Peg:** 1 ACT ≈ **$1** of compute credit.  
+  * **Decimals:** 6 (denom uact) to match cosmos conventions.  
+  * **Non‑transferable:** balance is **soulbound** to the funding account (tenant, org, or project).  
+  * **Use:** only to pay Akash lease invoices; cannot be sent peer‑to‑peer or traded.
+
+# Core Mechanics
+
+Let:
+
+* $`P_t`$ = 30‑min TWAP AKT/USD price at time t.  
+* $`B_t`$ \= AKT burned to mint ACT at time t.  
+* $`A_t`$ \= ACT minted at time t.   
+* $`S_t`$ \= AKT minted to providers at settlement time t.  
+* Spread parameters initially **25 bps**
+
+**Mint ACT (tenant top‑up)**
+
+* Tenant supplies AKT **or** pays by card:  
+  * *AKT path:* user sends $`B_t`$ AKT → protocol burns (moves to BME vault) → mints   
+   $`A_t = B_t \cdot P_t`$ ACT   
+  * *Card path:* Console market‑buys AKT for \$X on Osmosis/aggregators, receives $`B_t`$ AKT, sends to chain → same burn/mint as above; **ACT minted equals net $ received** so tenants see precise dollar value.
+
+**Settle (provider payday)**  
+When an invoice for A ACT is due, the protocol:
+
+1. **Burns** $`A`$ ACT, and,  
+2. **Mints** $`S = \frac{A}{P_{settle}}`$ AKT to the provider.
+
+**Net supply effect per dollar of usage**
+* At top‑up: burn $`\frac{\$}{P_{mint}}`$ AKT.  
+* At settlement: mint $`\frac{\$}{P_{settle}}`$ AKT.  
+* **ΔSupply (AKT)** = $`\frac{\$}{P_{mint}} - \frac{\$}{P_{settle}}`$.
+  * If **price rises** while credits are outstanding → **net burn**.  
+  * If **price falls** → **net mint**.  
+* Between events, **AKT float is reduced** by the amount sequestered in the BME vault against outstanding ACT.
+
+**Concrete Example**
+* Tenant tops up **$1,000 ⇒ burn 877.192982 AKT[^1]**, mint 1,000 ACT.  
+* If settlement occurs at **$1.50** ⇒ mint **666.666667 AKT** to provider ⇒ **net −210.526316 AKT** (deflation).  
+* If settlement at **$0.90** ⇒ mint **1,111.111111 AKT** ⇒ **net \+233.918129 AKT** (inflation). (*These deltas balance over time; outstanding ACT acts like an elastic buffer.*)
+
+# Architecture
+
+## Modules
+### `x/bme` Burn‑Mint Equilibrium module
+
+* **Vault accounting:**  
+  * “Burn” moves AKT into a **BME vault module account** (circulating supply goes down).  
+  * The vault maintains a **Remint Credit** ledger so provider payouts first consume burned AKT; only if short, mint new AKT. This preserves the *hard cap framing* at the net level.  
+* **Invariants & queries:**  
+  * `OutstandingACT()`: total ACT supply.  
+  * `VaultAKT()`: AKT in vault with remint credits.  
+  * **Collateral ratio:** $CR=\frac{VaultAKT \cdot P}{OutstandingACT}$
+  * Governance thresholds for **circuit breakers**  
+* **EndBlocker:** batch‑settles invoices (e.g., every block, or 1–5 min epochs).
+  
+  *(Cosmos SDK natively supports bank burns and module accounts; minting can be customized via x/mint’s MintFn to draw down remint credits first.)*
+
+
+### `x/act` Account‑bound compute credits
+* Non‑transferable balances keyed by owner (EOA, org, project).  
+* Messages: MsgMintACT, MsgBurnACT.  
+* Spend path is only callable by x/market during settlement.
+
+
+### `x/oracle` Price feeds
+* **Primary:** Osmosis AKT/USDC **TWAP** (e.g., 30‑min, 0.1% outlier rejection).  
+* **Secondary:** external oracle (e.g., Pyth/Chainlink via IBC or relays) with fallback rules & medianization. (Osmosis [TWAP](https://docs.osmosis.zone/overview/features/concentrated-liquidity) exists; Pyth has Cosmos‑SDK deployments; pattern is standard)
+
+
+### `console` Payments UX (AEP‑31 aligned)
+* Card on‑ramp (existing roadmap item) performs **immediate AKT buy** and calls `MsgMintACT` so tenants always see **$‑exact** credit. (Credit‑card payments feature tracked as [AEP‑31](https://akash.network/roadmap/aep-31/))
+* Auto‑top‑up & batch recharges (configurable days‑of‑runway).
+
+### `x/market` Leases & settlement
+* Quotes remain **USD‑first** in the UI; on chain, settlement pays providers **in AKT** by consuming ACT.  
+* Providers optionally auto‑stake a % of payouts (off by default).
+* AEP‑23 brought [stable payments](https://akash.network/docs/deployments/stable-payment-deployments) and take‑rates; with BME we keep the stable UX but remove take‑rates and settle AKT‑only.*
+
+#### Settlement loop (system flow)
+
+##### Preconditions
+* Lease exists, invoice is due, amount matches `act_spend` (or ≤ remaining).  
+* `from` has ≥ `act_spend` ACT.  
+* Oracle healthy (settlement price).  
+* Circuit breaker may **slow** but should not block normal settlement unless in extreme halt mode.
+
+##### Flow
+1. Oracle read (settlement price)  
+   * Fetch $`P_{settle}`$ = AKT/USD TWAP.
+2. Burn ACT  
+   * `act.Burn(from, act_spend)`
+   * `OutstandingACT = act_spend`
+3. Compute AKT owed  
+   * `akt_out = floor(act_spend / P_settle)` (6-decimals)  
+4. Pay from the vault (deflationary first)  
+   * `use_vault = min(akt_out, RemintCredits)`
+   * If `use_vault > 0`:  
+     * Decrease `RemintCredits -= use_vault`  
+     * `bank.SendCoins(BME_VAULT:provider, use_vault)`
+   * `shortfall = akt_out - use_vault`
+5. Inflationary mint for any shortfall  
+   * If `shortfall > 0`:  
+     * `mint.MintCoins(provider, shortfall)`
+     * (No change to `VaultAKT`; net increase to circulating supply by `shortfall`.)  
+6. Finalize lease accounting  
+   * Mark invoice (partial/complete) as paid for `act_spend`.  
+   * Update provider’s earnings ledger.  
+7. Events & logs  
+   * `event_bme_spend {lease_id, from, provider, act_burn: act_spend, akt_out, P_settle, vault_paid: use_vault, minted: shortfall}`
+8. Post-conditions / Invariants  
+   * ACT supply decreased by `act_spend`.  
+   * Provider receives `akt_out` AKT.  
+   * Net AKT supply changes by: `Δ = shortfall - use_vault_vanish` (Intuition: if `use_vault = akt_out` → **no inflation**, and circulating AKT only re-enters; if price rose since mint, `use_vault < akt_in_at_mint`, so **net burn** already happened at the earlier step.)
+
+##### Failure cases
+* Oracle unhealthy → `ErrOracle`.  
+* Insufficient ACT → `ErrInsufficientACT`.  
+* Lease invariants mismatch / double-spend attempt → `ErrInvoiceState`
+
+## BME Vault
+BME Vault is a module account and a ledger (“remint credits”) that holds the AKT created when tenants fund ACT (their dollar-pegged compute credits). Those AKT are out of circulation until providers are paid. At payout, the protocol re-issues AKT (up to what’s owed) using the oracle price at settlement. Net supply moves only by the difference between the AKT burned at top-up and the AKT reminted at payout.
+
+### Benefits
+1. **Structural buy-pressure:** Every dollar of usage triggers an AKT market buy (card → buy AKT → burn to mint ACT). That’s constant demand for AKT.  
+2. **Reduced circulating supply (scarcity):** The AKT tied to outstanding ACT sits in the vault, not tradable, shrinking liquid float until workloads are settled.  
+3. **Automatic net-burn when price rises:** If AKT appreciates between top-up and payout, fewer AKT are needed to pay the provider than were originally burned → net burn (deflationary).  
+4. **Soft landing when price falls If AKT declines:** the vault first uses its “remint credits.” Only if that’s insufficient does the system mint the shortfall (inflationary). Circuit-breakers can slow new ACT mints during severe drawdowns—no fee/take-rate needed.  
+5. **Stable UX with AKT-only settlement:** Tenants always see exact $ funding; providers always receive AKT. The vault is the bridge that makes those two things compatible.
+
+### Key Metrics to Watch
+* **Outstanding ACT**: the protocol’s dollar liability to providers.  
+* **Collateral Ratio (CR)**: the vault’s AKT value vs. that liability:  
+
+```math
+CR = \frac{VaultAKT × P}{OutstandingACT} 
+```
+* If ***CR \> 1***: the vault’s AKT is worth more than the credits outstanding (healthy buffer; likely net burns on payout).  
+* If ***CR \< 1***: the vault will need to remint some AKT on payout (inflationary), so circuit-breakers can kick in to protect the system.
+
+### 
+
+### Concrete Example 
+
+* Tenant funds **$10,000,000** in **ACT** at $1.14[^1] → vault receives/burns **8,771,929 AKT**.  
+* If payouts happen at **$1.25**, the protocol remints $10,000,000 / 1.25 \= **8,000,000 AKT** to providers.  
+  * Net effect: **−771,929 AKT (deflation).**  
+* If payouts happen at **$0.90**, the protocol needs **11,111,111 AKT**; it reissues the 8.77M from the vault and mints the **\~2.34M shortfall (inflation)**.
+  While those credits are outstanding, that **8.77M AKT is out of circulation**. If spot drifts up to $1.20 before payout, the vault’s value vs. the liability becomes:  
+
+  $`CR=\frac{8.77M × 1.20}{10M}≈1.053`$ - a \~5.3% buffer that will materialize as **net burn** on payout.
+
+### Implementation notes
+
+You can implement the “burn” either as a true burn and later mint, or as escrow in a non-spendable module account with a remint-credits ledger. In both cases, circulating supply drops immediately and only changes net by the price-timing delta.
+
+Because the vault is transparent (on-chain), you get auditable metrics: `VaultAKT`, `OutstandingACT`, `CR`, `NetBurn24h/30d`.
+
+### Risk controls
+
+We avoid per‑lease take‑rates. Instead, we rely on **design‑time controls**:
+* **Oracle safety:** dual‑feed medianization; TWAP windows (e.g., 30 min); max update drift; pause on disagreement \> X%. *TWAP mechanics [documented](https://docs.osmosis.zone/overview/features/concentrated-liquidity) by Osmosis*.
+* **Circuit breakers:** if $`CR<0.93~`$ (configurable), temporary measures engage:  
+  * Slow mints (shorter settlement epochs),  
+  * Require new ACT mints to be ≥ N days of run‑rate (encourages batching),  
+  * If $`CR<0.90`$, fallback: pause new ACT mints; tenants can still pay directly in **AKT** (UI reveals an “AKT direct” path) until CR recovers.  
+* **Initial reserve (one‑time):** seed the BME vault with a small **AKT volatility buffer** via governance/community pool (similar [buffers](https://github.com/orgs/akash-network/discussions/930) have been budgeted in governance requests). This covers rare fast‑down moves without taxing leases.
+* **Optional micro‑spread (0–25 bps) on *mint only***: If governance wants a self‑healing buffer without “fees on providers,” apply a tiny haircut only at **ACT mint** (tenant side), and send the surplus to the BME vault. This is **not a take‑rate on hosting fees** and can default to **25 bps** at launch.
+
+# Governance Parameters
+
+1. **Oracle Mechanism:** The system utilizes a robust oracle mechanism to determine the precise value for transactions. This mechanism calculates a median price based on two sources: a 30-minute Time-Weighted Average Price (TWAP) from Osmosis, and an external oracle, also sampled over a 30-minute period. To ensure data integrity and prevent manipulation, any price outlier exceeding 1.5% from the median is automatically ignored, ensuring a stable and reliable valuation.
+
+1. **Settlement Epoch Options:** To optimize for different operational needs, the system offers two distinct settlement epoch options:
+    * **Per Block Settlement (Fast):** This option enables immediate settlement of transactions with every new block validated on the network. This provides the quickest possible finality for operations where speed is paramount.  
+    * **Every 5 Minutes Settlement (Gas-Friendly):** For scenarios where gas efficiency is a higher priority than instantaneous settlement, transactions can be batched and settled every five minutes. This approach helps reduce transaction costs by optimizing gas usage.
+
+3. **Circuit Breakers for Stability:** To safeguard the system against extreme market volatility and maintain stability, two crucial circuit breakers are implemented:
+    * **CRwarn (Credit Ratio Warning):** At a credit ratio of 0.95, a warning is triggered, signaling potential instability and prompting system administrators to monitor the situation closely.  
+    * **CRhalt (Credit Ratio Halt):** Should the credit ratio drop further to 0.90, a halt is initiated, temporarily suspending certain operations to prevent further destabilization and allow for corrective measures to be taken.
+
+4. **Mint/Settle Spreads:** Initially, the system operates with a mint/settle spread of 25 basis points (bps). This spread represents the difference between the price at which new tokens are minted and the price at which they can be settled, contributing to the system's economic model and liquidity.
+
+5. **ACT Expiry and Refundability:** Akash Credit Tokens (ACT) are designed without an expiration date, ensuring that credits held by users remain valid indefinitely. Furthermore, ACT are fully refundable back to AKT (Akash Token) at the current oracle price. This feature provides flexibility and liquidity for ACT holders, allowing them to convert their credits back to the native token at any time based on the prevailing market rate.
+
+6. **Denomination of ACT:** For precision in transactions and system operations, ACT is denominated in `uact`. The conversion rate is standardized as 1 ACT equal to 1,000,000 `uact` (`1e6 uact`), facilitating granular accounting and transaction processing within the ecosystem.
+
+
+# Developer Spec
+
+## Messages
+
+### MsgMintACT
+Mint non-transferable ACT credits by removing AKT from circulation.
+
+#### Purpose
+* Turn **AKT → ACT ($1 credits)** at the mint TWAP price.  
+* Two UX paths collapse to the same on-chain flow:  
+  * **AKT path:** tenant funds with AKT directly.  
+  * **Card path:** console market-buys AKT off-chain and pays on-chain; chain still just sees AKT.
+
+#### Message
+
+```protobuf
+MsgMintACT {
+  // who provides AKT (tenant or console wallet)
+  payer:   Address       
+  // whose ACT balance to credit (tenant/org/project)
+  owner:   Address       
+  // AKT amount provided (mutually exclusive with usd_exact)
+  akt_in:  sdk.DecCoin
+     // optional: request “exact $X ACT”; keeper back-solves AKT      
+  usd_exact: sdk.DecCoin    
+  // optional metadata (invoice id, cc receipt id)
+  memo: string?
+}
+```
+
+#### Preconditions
+
+* `owner` is a valid ACT account.  
+* Oracle is **healthy** (TWAP within drift limits; price freshness OK).  
+* Circuit breakers not blocking mints.  
+* If `usd_exact` is set, keeper must be able to **pull** or **receive** the corresponding AKT from `payer`.
+
+#### Flow
+
+1. Ante / auth  
+   * Verify `payer` signature (or valid feegrant/authz).  
+   * Collect fees, increment sequence.  
+2. Oracle read (mint price)  
+   * Fetch **P\_mint \= AKT/USD TWAP** (e.g., 30-min, medianized).  
+   * Reject if stale or outside deviation bounds.  
+3. Determine AKT to pull  
+   * If `akt_in` provided → `akt_req = akt_in`.  
+   * Else if `usd_exact` → `akt_req = ceil(usd_exact / P_mint)` (round up 6-decimals).  
+   * Guard: `akt_req > 0`.  
+4. Funds movement  
+   * `bank.SendCoins(payer → BME_VAULT, akt_req uakt)`
+   * Increase **RemintCredits** by `akt_req`. (This is the book-entry saying “we can later re-issue up to this much without fresh inflation.”)  
+5. Mint ACT  
+   * `act_out = floor(akt_req * P_mint)` (6-decimals).  
+   * `act.Mint(owner, act_out)`
+6. State updates  
+   * `OutstandingACT += act_out`
+   * Recompute **CR**: `(VaultAKT * P_ref) / OutstandingACT` (`P_ref` can be `P_mint` or a moving ref).  
+7. Events & logs  
+   * `event_bme_mint { payer, owner, akt_in: akt_req, act_out, P_mint }`
+8. Post-conditions / invariants  
+   * `VaultAKT` increased by `akt_req`.  
+   * `OutstandingACT` increased by `act_out`.  
+   * **Circulating AKT** effectively down by `akt_req`.
+
+#### Failure Cases
+
+* Oracle unhealthy → `ErrOracle`.  
+* Circuit breaker active (`CR < halt`) → `ErrCircuitBreaker`.  
+* Insufficient AKT from `payer` → `ErrInsufficientFunds`.
+
+### MsgBurnACT
+
+Tenant burns unused ACT and receives AKT back at **current price**.
+
+#### Purpose
+
+* Let users unwind credits if they stop using compute.  
+* Keeps UX fair; also exercises the same safety path as settlement.
+
+#### Message
+
+```protobuf
+MsgBurnACT {
+  owner:      Address    // whose ACT to burn
+  to:         Address    // who receives AKT (default = owner)
+  act_burn:   sdk.DecCoin // ACT to convert back to AKT
+}
+```
+
+#### Preconditions
+
+* `owner` has ≥ `act_burn` ACT.  
+* Oracle healthy (refund price).  
+* Circuit breaker policy may throttle refunds only under extreme CR stress (configurable), but default is **always allow**.
+
+#### Flow
+
+1. Ante / auth  
+   * Verify `owner` (or authz).  
+2. Oracle read (refund price)  
+   * P\_now \= AKT/USD TWAP  
+3. Burn ACT  
+   * `act.Burn(owner, act_burn)`  
+   * `OutstandingACT -= act_burn`
+4. Compute AKT to return  
+   * `akt_out = floor(act_burn / P_now)`
+5. Pay from the vault first  
+   * `use_vault = min(akt_out, RemintCredits)`
+   * If `use_vault > 0`:  
+     * `RemintCredits -= use_vault`
+     * `bank.SendCoins(BME_VAULT → to, use_vault)`
+   * `shortfall = akt_out - use_vault`
+6. Inflationary mint for shortfall (if any)  
+   * If `shortfall > 0`:  
+     * `mint.MintCoins(to, shortfall)`
+7. Events & logs  
+   * `event_bme_burn_act { owner, to, act_burn, akt_out, P_now, vault_paid: use_vault, minted: shortfall }`
+8. Post-conditions  
+   * ACT supply reduced by `act_burn`.  
+   * AKT sent to `to` equals `akt_out`.  
+   * Net AKT supply changes only if `shortfall > 0`.
+
+#### Failure cases
+
+* Oracle unhealthy → `ErrOracle`.  
+* Insufficient ACT → `ErrInsufficientACT`.
+
+#### Cross-cutting behavior (all three messages)
+
+* Oracle safety  
+  * Use **median(TWAP\_osmosis, TWAP\_external)** with freshness checks.  
+  * Reject if feeds disagree \> threshold (e.g., 1.5%) or stale.
+
+* Circuit breakers  
+  * Monitor **Collateral Ratio (CR)** \= `(VaultAKT * P_ref) / OutstandingACT`.  
+  * **Warn** below 0.95, **halt new mints** below 0.90 (settlements/refunds still allowed; governance may throttle refunds if CR is critically low).
+
+* Events/metrics to expose  
+  * `OutstandingACT`, `VaultAKT`, `RemintCredits`, `CR`, `NetBurn24h`, `NetBurn30d`.  
+  * Per-tx: emitted prices, amounts, and whether payout used vault vs. new mint.
+
+* Rounding rules  
+  * Favor **tenant** on mint (round ACT **down** very slightly); favor **provider** on settlement (round AKT **down** very slightly) to avoid over-pay; the residuals accrue to the vault as dust and improve CR over time.
+
+* Idempotency  
+  * `MsgSpendACT` should carry a lease `nonce` or reference the invoice id; keeper must be idempotent.
+
+* AuthZ / Feegrant  
+  * Allow org billing wallets or the console to act on behalf of tenants (auto top-ups).
+
+### One Concrete Flow (numbers)
+
+* **Mint:** Tenant tops up **$1,000 @ P\_mint \= $1.14**  
+  * Pull `akt_req = 877.192982`, send to `BME_VAULT`  
+  * Mint `act_out = 1,000` ACT  
+  * RemintCredits \+= 877.192982
+
+* Spend (settle later @ P\_settle \= $1.50)  
+  * Burn `1,000` ACT  
+  * Owe provider `akt_out = 666.666667`  
+  * Pay entirely from vault (`use_vault = 666.666667`)  
+  * `RemintCredits = 210.526315` remaining  
+  * **Net AKT still out of circulation:** 210.526315 (which is the deflation)
+
+* Refund (if tenant cancels remaining $X credits)  
+  * Same as spend: burn ACT, return AKT using vault first, mint only if needed.
+
+### State
+* `VaultAKT` (module account balance) and RemintCredits (book‑entry of burned AKT available to re‑issue).  
+* `TotalACT`, per‑account ACT balances.  
+* `CR` view.
+
+### Invariants
+
+* `RemintCredits >= 0` except during a price‑crash path when circuit breaker logic governs shortfall; if `RemintCredits < 0`, only inflationary mint covers the difference (visible metric).
+
+*(Cosmos SDK’s [bank/mint](https://docs.cosmos.network/v0.46/modules/bank/) facilities support this pattern cleanly)*
+
+## Provider & Tenant UX
+
+### Tenant (Console)
+
+1. Add funds → choose card or AKT.  
+2. If card: pay $X → console **buys AKT** on Osmosis, sends to vault; chain **mints X ACT**.  
+3. See **$ balance**, low‑balance alerts, auto‑top‑up (batching default).
+
+**Provider**
+* Price as of today (USD‑first in UI).  
+* Receive **AKT** each epoch.  
+* Optional “auto‑stake N%” toggle.
+
+## Interoperability with AEP‑23 & migration
+
+* **AEP‑23 kept:** USD quoting, whitelisting, and the stable‑payment user journey in [docs](https://github.com/orgs/akash-network/discussions/930)
+* **AEP‑23 changed:** **remove take‑rate** on stable settlements, and **disable USDC payouts** to providers; all payouts are in AKT. *The earlier [discussions](https://github.com/orgs/akash-network/discussions/930) recorded per‑currency take‑rates; we eliminate them here.*
+* **Data migration:** existing escrowed stable balances in the console can be one‑time converted: buy AKT → burn → mint ACT at migration block’s oracle price.
+
+## Observability & Dashboard
+
+* **On‑chain:** `OutstandingACT`, `VaultAKT`, `RemintCredits`, `CR`, `NetBurn24h`, `NetBurn30d`.  
+* **Console:** “**AKT saved from circulation**” badge; “**Effective AKT purchased**”; runway days; min/top‑up size.  
+* **Provider:** AKT payout history with oracle prices.
+
+## Security & Attack surface
+
+* **Oracle manipulation:** use multi‑feed medianization with [TWAP](https://docs.osmosis.zone/overview/features/concentrated-liquidity); cap per‑block price move; pausable by governance multisig in emergencies. 
+* **Liquidity stress:** perform console buys via RFQ/aggregator (Osmosis primary) with max slippage. (Osmosis as Cosmos liquidity hub. 
+* **Module integrity:** [bank](https://docs.cosmos.network/v0.46/modules/bank) burn/mint auditing with supply invariants in end blockers. 
+
+## Rollout plan
+
+1. **Testnet phase (4–6 weeks):** enable `x/bme` and `x/act` with faucets; fuzz settle/mint under varying volatility; run oracle chaos tests.  
+2. **Shadow launch:** mainnet with 25 bps spreads; circuit breakers armed; small governance‑seeded vault buffer.  
+3. **Full launch:** migrate console to ACT top‑ups; switch payouts to AKT‑only; deprecate USDC payouts (keep USDC **funding** path only via card → AKT buy → ACT).  
+4. **Post‑launch:** expose metrics; if CR drifts lower in stress, governance can nudge mint‑side bps to rebuild buffer **without taxing providers** or re‑introducing take‑rates.
+
+# Quick FAQ
+
+* **Is this deflationary?** Over any window where AKT appreciates between top‑up and settlement, yes—net burns occur. In all cases, outstanding ACT removes AKT from float until it’s paid out.  
+* **What if AKT dumps?** The seeded vault and circuit breakers cover shortfalls without taxing leases. Worst case, tenants pay AKT directly for a short window while CR recovers.  
+* **Does this harm providers?** No. Providers are paid AKT valued at the invoice’s USD amount using the settlement TWAP. No take‑rate applies to their payout.
+
+[^1]: *AKT trading ≈ $1.14 as of Sept 16, 2025*
\ No newline at end of file
diff --git a/src/content/aeps/aep-77/README.md b/src/content/aeps/aep-77/README.md
new file mode 100644
index 000000000..3855c5f99
--- /dev/null
+++ b/src/content/aeps/aep-77/README.md
@@ -0,0 +1,406 @@
+---
+aep: 77
+title: "Multi-depositor escrow account"
+author: Artur Troian (@troian)
+status: Final
+type: Standard
+category: Core
+created: 2025-08-18
+updated: 2025-09-02
+estimated-completion: 2025-10-21
+roadmap: major
+---
+
+## Abstract
+
+This AEP proposes enhancement of the `x/escrow` module with support of multiple funds depositors, enabling flexible fund management and improved automation workflows for deployment operations.
+
+## Motivation
+
+The current deployment and escrow workflows are limited to using a single depositor for funds, which creates several significant limitations for users and automation workflows:
+
+### Current Limitations
+
+1. **Immutable Depositor Constraint**:
+   - If a deployment owner has multiple spend authorizations from different wallets, only one can be used during the entire lifetime of the deployment
+   - The depositor is immutable once set, preventing flexibility in fund management
+
+2. **Inefficient Fund Utilization**:
+   - Users cannot combine multiple smaller grants to meet larger deposit requirements
+   - Example: An owner with two separate grants (0.2 uAKT and 0.3 uAKT) cannot use them together to create a deployment requiring 0.5 uAKT initial deposit
+   - This forces users to maintain larger individual grants or miss deployment opportunities
+
+3. **Unnecessary Complexity in Authorization**:
+   - Users must explicitly specify the depositor address when using authorization (authz) for deposits
+   - This requirement is redundant since grants can be automatically fetched from the chain state during transaction execution
+   - Adds unnecessary complexity to the user experience and automation workflows
+
+### Benefits of Multi-Depositor Support
+
+Implementing multi-depositor escrow accounts would provide:
+- **Flexible Fund Management**: Ability to use multiple funding sources for a single deployment
+- **Improved Efficiency**: Better utilization of available grants and funds
+- **Simplified User Experience**: Reduced complexity in authorization workflows
+- **Enhanced Automation**: More flexible automation capabilities for deployment management
+
+## Key Changes
+
+This AEP introduces several fundamental changes to the escrow system:
+
+### 1. **New Deposit Type Structure**
+- Introduces `akash.base.deposit.v1.Deposit` message type
+- Supports multiple funding sources (balance, grants) in a single deposit
+- Enables flexible fund allocation strategies
+
+### 2. **Enhanced Message Types**
+- Updates `MsgCreateDeployment` and `MsgCreateBid` to use new deposit structure
+- Replaces single depositor model with multi-source deposit capability
+- Maintains backward compatibility through structured message format
+
+### 3. **New Escrow Operations**
+- Adds `MsgAccountDeposit` for additional deposits to existing accounts
+- Introduces `DepositAuthorization` for granular access control
+- Supports both deployment and bid-level escrow operations
+
+### 4. **Improved Authorization System**
+- Implements secondary indexing for efficient grant lookups
+- Supports multiple authorization scopes (deployment, bid)
+- Enables more sophisticated permission management
+
+## Technical Details
+
+1. Introduce new type `Deposit` in a new package `akash.base.deposit.v1`
+```proto
+// Source is an enum which lists source of funds for deployment deposit.
+enum Source {
+  option (gogoproto.goproto_enum_prefix) = false;
+
+  // Prefix should start with 0 in enum. So declaring dummy state.
+  invalid = 0 [(gogoproto.enumvalue_customname) = "SourceInvalid"];
+  // DepositSourceBalance denotes account balance as source of funds
+  balance = 1 [(gogoproto.enumvalue_customname)  = "SourceBalance"];
+  // DepositSourceGrant denotes authz grants as source of funds
+  grant = 2 [(gogoproto.enumvalue_customname)  = "SourceGrant"];
+}
+
+// Deposit is a data type use by MsgCreateDeployment, MsgDepositDeployment and MsgCreateBid to indicate source of the deposit
+message Deposit {
+  // Deposit specifies the amount of coins to include in the deployment's first deposit.
+  cosmos.base.v1beta1.Coin amount = 1 [
+    (gogoproto.nullable) = false,
+    (gogoproto.moretags) = "yaml:\"amount\""
+  ];
+
+  // Sources list of deposit sources, each entry must be unique
+  repeated Source sources = 5 [
+    (gogoproto.castrepeated) = "Sources",
+    (gogoproto.jsontag)      = "deposit_sources",
+    (gogoproto.moretags)     = "yaml:\"deposit_sources\""
+  ];
+}
+
+```
+2. In `MsgCreateDeployment` and `MsgCreateBid` replace `deposit` and `depositor` fields and replace with `deposit` of type `Deposit`
+```
+// MsgCreateDeployment defines an SDK message for creating deployment.
+message MsgCreateDeployment {
+  option (gogoproto.equal)      = false;
+
+  // ID is the unique identifier of the deployment.
+  akash.deployment.v1.DeploymentID id = 1 [
+    (gogoproto.nullable)   = false,
+    (gogoproto.customname) = "ID",
+    (gogoproto.jsontag)    = "id",
+    (gogoproto.moretags)   = "yaml:\"id\""
+  ];
+
+  // GroupSpec is a list of group specifications for the deployment.
+  // This field is required and must be a list of GroupSpec.
+  repeated GroupSpec groups = 2 [
+    (gogoproto.nullable)     = false,
+    (gogoproto.castrepeated) = "GroupSpecs",
+    (gogoproto.jsontag)      = "groups",
+    (gogoproto.moretags)     = "yaml:\"groups\""
+  ];
+
+  // Hash of the deployment.
+  bytes hash = 3 [
+    (gogoproto.jsontag)  = "hash",
+    (gogoproto.moretags) = "yaml:\"hash\""
+  ];
+
+  // Deposit specifies the amount of coins to include in the deployment's first deposit.
+  akash.base.deposit.v1.Deposit deposit = 4 [
+    (gogoproto.nullable) = false,
+    (gogoproto.jsontag)  = "deposit",
+    (gogoproto.moretags) = "yaml:\"deposit\""
+  ];
+}
+
+// MsgCreateBid defines an SDK message for creating Bid.
+message MsgCreateBid {
+  option (gogoproto.equal)      = false;
+
+  akash.market.v1.BidID id = 1 [
+    (gogoproto.customname) = "ID",
+    (gogoproto.nullable)   = false,
+    (gogoproto.jsontag)    = "id",
+    (gogoproto.moretags)   = "yaml:\"id\""
+  ];
+
+  // Price holds the pricing stated on the Bid.
+  cosmos.base.v1beta1.DecCoin price = 2 [
+    (gogoproto.nullable) = false,
+    (gogoproto.jsontag)  = "price",
+    (gogoproto.moretags) = "yaml:\"price\""
+  ];
+
+  // Deposit holds the amount of coins to deposit.
+  akash.base.deposit.v1.Deposit deposit = 3 [
+    (gogoproto.nullable) = false,
+    (gogoproto.jsontag)  = "deposit",
+    (gogoproto.moretags) = "yaml:\"deposit\""
+  ];
+
+  // ResourceOffer is a list of resource offers.
+  repeated ResourceOffer resources_offer = 4 [
+    (gogoproto.nullable)     = false,
+    (gogoproto.castrepeated) = "ResourcesOffer",
+    (gogoproto.customname)   = "ResourcesOffer",
+    (gogoproto.jsontag)      = "resources_offer",
+    (gogoproto.moretags)     = "yaml:\"resources_offer\""
+  ];
+}
+```
+
+3. Remove `MsgDepositDeployment` and `DeploymentDepositAuthorization` from `deployment` module
+
+4. Introduce `MsgAccountDeposit` in escrow module
+```proto
+// MsgAccountDeposit represents a message to deposit funds into an existing escrow account
+// on the blockchain. This is part of the interaction mechanism for managing
+// deployment-related resources.
+message MsgAccountDeposit {
+  option (gogoproto.equal) = false;
+  option (cosmos.msg.v1.signer) = "owner";
+
+  // Owner is the account bech32 address of the user who owns the deployment.
+  // It is a string representing a valid bech32 account address.
+  //
+  // Example:
+  //   "akash1..."
+  string owner = 1 [
+    (cosmos_proto.scalar) = "cosmos.AddressString",
+    (gogoproto.jsontag)   = "owner",
+    (gogoproto.moretags)  = "yaml:\"owner\""
+  ];
+
+  // ID is the unique identifier of the account.
+  akash.escrow.id.v1.Account id = 2 [
+    (gogoproto.nullable)   = false,
+    (gogoproto.customname) = "ID",
+    (gogoproto.jsontag)    = "id",
+    (gogoproto.moretags)   = "yaml:\"id\""
+  ];
+
+  akash.base.deposit.v1.Deposit deposit = 3 [
+    (gogoproto.nullable) = false,
+    (gogoproto.jsontag)  = "deposit",
+    (gogoproto.moretags) = "yaml:\"deposit\""
+  ];
+}
+```
+
+5. Introduce `DepositAuthorization` in `escrow` module
+```proto
+// DepositAuthorization allows the grantee to deposit up to spend_limit coins from
+// the granter's account for a deployment.
+message DepositAuthorization {
+  option (cosmos_proto.message_added_in)     = "chain-sdk v0.1.0";
+  option (cosmos_proto.implements_interface) = "cosmos.authz.v1beta1.Authorization";
+  option (amino.name)                        = "akash/DepositAuthorization";
+
+  // State is an enum which refers to state of deployment.
+  enum Scope {
+    option (gogoproto.goproto_enum_prefix) = false;
+
+    // Prefix should start with 0 in enum. So declaring dummy state.
+    invalid = 0 [(gogoproto.enumvalue_customname)     = "DepositScopeInvalid"];
+    // DeploymentActive denotes state for deployment active.
+    deployment = 1 [(gogoproto.enumvalue_customname)  = "DepositScopeDeployment"];
+    // DeploymentClosed denotes state for deployment closed.
+    bid = 2 [(gogoproto.enumvalue_customname)         = "DepositScopeBid"];
+  }
+
+  // SpendLimit is the amount the grantee is authorized to spend from the granter's account for
+  // the purpose of deployment.
+  cosmos.base.v1beta1.Coin spend_limit = 1 [
+    (gogoproto.nullable) = false,
+    (gogoproto.jsontag)  = "spend_limit"
+  ];
+
+  repeated Scope scopes = 2 [
+    (gogoproto.castrepeated) = "DepositAuthorizationScopes",
+    (gogoproto.jsontag)  = "scopes",
+    (gogoproto.moretags) = "yaml:\"scopes\""
+  ];
+}
+```
+
+6. Introduce transaction message server in `escrow` module
+```proto
+// Msg defines the x/deployment Msg service.
+service Msg {
+  option (cosmos.msg.v1.service) = true;
+
+  // AccountDeposit deposits more funds into the escrow account.
+  rpc AccountDeposit(MsgAccountDeposit) returns (MsgAccountDepositResponse);
+}
+```
+
+### AccountDeposit Functionality
+
+The `AccountDeposit` operation allows users to add additional funds to existing escrow accounts, supporting multiple funding sources and flexible deposit strategies.
+
+#### Workflow Overview
+
+1. **Message Validation**:
+   - Verify the account exists and belongs to the message signer
+   - Validate deposit amount and sources
+   - Check authorization permissions if using grants
+
+2. **Fund Processing**:
+   - Process each deposit source in the specified order
+   - Deduct funds from balance or process authorization grants
+   - Combine funds from multiple sources to meet the total deposit amount
+
+3. **Account Update**:
+   - Add new deposits to the escrow account
+   - Preserve deposit order for settlement purposes
+   - Update account balance and metadata
+
+#### Implementation Details
+
+##### Source Processing Order
+The system processes deposit sources sequentially until the total deposit amount is satisfied:
+
+1. **Sequential Processing**: Each source in the `sources` array is processed one by one in the specified order
+2. **Amount Tracking**: The system maintains a running total of remaining amount needed
+3. **Source Exhaustion**: When a source is fully utilized, the system moves to the next source
+4. **Early Termination**: Processing stops as soon as the total deposit amount is reached
+5. **Validation**: If all sources are exhausted and the amount is still not met, the transaction fails
+
+##### Grant Authorization Processing
+When processing authorization grants as a funding source:
+
+1. **Grant Discovery**: The system queries all available grants for the account owner
+2. **Permission Validation**: Each grant is checked for proper permissions and expiration
+3. **Amount Calculation**: The system determines how much can be drawn from each grant
+4. **Sequential Utilization**: Grants are used in order until the required amount is satisfied
+5. **Fund Transfer**: Once approved, funds are deducted from the grant and transferred to escrow
+6. **Record Keeping**: Each processed grant is recorded with its source and amount details
+
+#### Error Handling
+
+The `AccountDeposit` operation handles various error scenarios:
+
+- **Insufficient Funds**: If the total available funds from all sources cannot meet the deposit amount
+- **Invalid Account**: If the escrow account doesn't exist or doesn't belong to the signer
+- **Authorization Failures**: If grant processing fails due to insufficient permissions or expired grants
+- **Source Processing Errors**: If individual source processing encounters issues
+
+#### Settlement Order
+
+Deposits are processed and settled in the order they are received:
+
+1. **First-in-First-out (FIFO)**: Earlier deposits are settled before later ones
+2. **Source Preservation**: The order of sources within each deposit is maintained
+3. **Combination Logic**: Multiple deposits from the same address are combined but maintain chronological order
+
+#### Use Cases
+
+1. **Escrow Top-up**: Add funds to prevent deployment termination
+2. **Grant Utilization**: Use authorization grants for additional deposits
+3. **Multi-source Funding**: Combine balance and grant funds for larger deposits
+4. **Automated Replenishment**: Support automated systems for maintaining escrow balances
+
+### Implementation Guidelines
+
+#### Deposit sources
+
+`DepositSources` array within both messages must:
+- contain at least one valid deposit source
+- must not contain duplicates
+- must preserve order of the sources
+
+#### x/deployment
+
+Following requirements apply for both `MsgCreateDeployment` and `MsgDepositDeployment`.
+
+On message receive:
+1. Process deposit autorizations in the order they are specified in the message
+  - deduct funds from source up to the `deposit` value
+  - if deposit amount not satisfied, try next source until either
+    - deposit amount is satisfies - transaction is successul
+    - total amount available via all sources is below requested deposit amount - transaction fails
+2. Build list of depositor addresses and amounts to be deducted and transfer list to the `escrow.AccountCreate` or `escrow.AccountDeposit`
+
+#### x/escrow
+
+Following requirements apply for both `AccountCreate` and `AccountDeposit`.
+
+1. Order of deposits must be preserved
+2. Each if deposit from same address already exists, then funds shall be combined
+
+##### Account settlement
+
+Balance settlemnt proceeds in the order of deposits have been received
+
+#### x/authz
+
+Implement secondary index for efficient search of available grants by grantee address and msgTypeUrl.
+The prefix of the index is defined as:
+```go
+var GranteeMsgTypeUrlKey = []byte{0x04} // reverse prefix to get grantee's grants by msgTypeUrl
+```
+
+The `Keeper` interface should be extended with following:
+```go
+type Keeper interface {
+  GetGranteeGrantsByMsgType(ctx context.Context, grantee sdk.AccAddress, msgType string, onGrant func(context.Context, sdk.AccAddress, authz.Authorization, *time.Time) bool)
+}
+```
+
+## Implementation Resources
+
+### Development Guidelines
+
+#### Protobuf Message Structure
+All new message types follow standard Cosmos SDK patterns:
+- Use `gogoproto` annotations for consistent serialization
+- Implement proper validation rules and constraints
+- Maintain backward compatibility where possible
+
+#### Authorization Implementation
+The enhanced authorization system provides:
+- Efficient grant lookup through secondary indexing
+- Support for multiple authorization scopes
+- Granular permission management for different operation types
+
+#### Escrow Account Management
+Multi-depositor escrow accounts support:
+- Multiple funding sources per account
+- Ordered deposit processing
+- Automatic fund combination from same addresses
+- Flexible settlement strategies
+
+### Testing Considerations
+
+1. **Unit Tests**: Test individual message validation and processing
+2. **Integration Tests**: Verify escrow account creation and management flows
+3. **Authorization Tests**: Validate grant processing and permission enforcement
+4. **Performance Tests**: Ensure efficient grant lookup and processing
+
+## Copyright
+
+All content herein is licensed under [Apache 2.0](https://www.apache.org/licenses/LICENSE-2.0).
diff --git a/src/content/aeps/aep-78/README.md b/src/content/aeps/aep-78/README.md
new file mode 100644
index 000000000..2b40af138
--- /dev/null
+++ b/src/content/aeps/aep-78/README.md
@@ -0,0 +1,279 @@
+---
+aep: 78
+title: Enable CosmWasm Smart Contracts on Akash Network
+author: Artur Troian (@troian)
+status: Draft
+type: Standard
+category: Core
+roadmap: major
+created: 2025-11-14
+estimated-completion: 2025-11-30
+---
+
+## Summary
+
+This AEP proposes enabling CosmWasm smart contract functionality on Akash Network to unlock programmable decentralized cloud infrastructure, enabling automated resource management, advanced settlement mechanisms, and on-chain governance capabilities. This enhancement leverages Pyth Network as a price oracle to support AEP-76's Burn Mint Equilibrium (BME) mechanism and extends Akash's capabilities beyond simple compute marketplaces into a fully programmable cloud platform.
+
+## Abstract
+
+CosmWasm is a multi-chain smart contracting platform built for the Cosmos ecosystem that allows developers to write secure, performant smart contracts in Rust. Enabling CosmWasm on Akash Network will provide the foundation for building sophisticated decentralized applications (dApps), implementing automated marketplace logic, creating programmable payment channels, and enabling complex provider-tenant relationships. This proposal integrates with AEP-76's requirement for a reliable price oracle by incorporating Pyth Network's low-latency price feeds, ensuring accurate and manipulation-resistant pricing for the BME tokenomics model while opening the door to a rich ecosystem of on-chain applications.
+
+## Motivation
+
+### Current Limitations
+
+Akash Network currently operates as a decentralized compute marketplace where the core functionality is hardcoded into the blockchain's native modules. While this approach ensures stability and security, it creates several limitations:
+
+1. **Limited Programmability**: New marketplace features require network upgrades and governance approval, slowing innovation
+2. **Rigid Settlement Mechanisms**: Payment and escrow logic cannot be easily modified or extended
+3. **Manual Governance**: Complex decisions require off-chain coordination and manual execution
+4. **Limited Ecosystem Integration**: Cannot natively interact with other protocols or leverage composable primitives
+5. **Oracle Dependency**: AEP-76's BME mechanism requires reliable price oracles, which need smart contract infrastructure to function optimally
+6. **Provider Incentives**: Limited ability to create sophisticated incentive mechanisms for providers
+
+### Benefits of CosmWasm Integration
+
+Enabling CosmWasm smart contracts on Akash Network provides transformational capabilities:
+
+**1. Programmable Cloud Infrastructure**
+- Custom deployment automation and orchestration logic
+- Conditional resource allocation based on on-chain conditions
+- Dynamic pricing algorithms implemented as smart contracts
+- Automated provider selection and load balancing
+
+**2. Advanced Settlement and Payment Systems**
+- Programmable escrow contracts with custom release conditions
+- Micropayment channels for real-time resource usage billing
+- Multi-party payment splits and revenue sharing
+- Integration with AEP-76's BME mechanism via smart contract-based burn/mint operations
+
+**3. Enhanced Price Oracle Integration**
+- Smart contracts consuming Pyth Network price feeds for AKT/USD pricing
+- Automated arbitrage mechanisms for the BME equilibrium
+- Price-triggered actions for lease renewals and settlements
+- Oracle failsafe mechanisms and price aggregation logic
+
+**4. Ecosystem Integration**
+- Lending protocols for provider collateral and tenant deposits
+- Liquid staking derivatives for staked AKT
+- Cross-chain bridges and IBC-enabled applications
+- Yield optimization strategies for network participants
+
+**5. Decentralized Governance Tools**
+- On-chain voting mechanisms for network parameters
+- Automated treasury management
+- Provider slashing and dispute resolution contracts
+- Community fund allocation and grant programs
+
+**6. Developer Ecosystem Growth**
+- Attract Cosmos ecosystem developers already familiar with CosmWasm
+- Enable third-party innovation without requiring core protocol changes
+- Create opportunities for application-specific tooling and infrastructure
+- Foster composability with other Cosmos chains running CosmWasm
+
+## Specification
+
+### Technical Architecture
+
+#### Core Components
+
+**1. CosmWasm Module Integration**
+
+The implementation requires integrating the `x/wasm` module from the CosmWasm stack into the Akash blockchain:
+
+```
+wasmd v0.61.6.0 or higher
+- CosmWasm VM integration
+- Wasm bytecode storage
+- Smart contract instantiation and execution
+- Gas metering and optimization
+```
+
+**2. Pyth Network Oracle Integration**
+
+As required by AEP-76, Pyth Network will serve as the primary price oracle. Pyth network has ready to use smart-contract implementing [oracle price feed](https://github.com/pyth-network/pyth-crosschain/blob/main/target_chains/cosmwasm/contracts/README.md)
+
+
+#### Smart Contract Capabilities
+
+**Supported Features:**
+- Contract upload, instantiation, execution, and migration will be supported via governance
+- Inter-contract messaging (CosmWasm to CosmWasm)
+- IBC contract support for cross-chain operations
+- Query support for contract state
+- Native token handling (AKT and ACT)
+- Integration with native Akash modules (deployment, provider, market)
+
+**Gas and Fee Structure:**
+- Gas costs for contract operations based on computational complexity
+- Storage fees for contract code and state
+- Execution fees for contract calls
+- Gas limits and optimization requirements
+
+#### Security Considerations
+
+**1. Contract Upload Governance**
+Initially, contract upload permissions should be restricted to governance-approved addresses to prevent malicious code deployment:
+
+```
+Parameters:
+- code_upload_access: "Governance" | "Everybody" | "Nobody"
+- instantiate_default_permission: "Everybody" | "Nobody"
+```
+
+**2. Contract Execution Limits**
+- Maximum contract size: 800 KB (compressed)
+- Maximum gas per transaction: 100M units
+- Query gas limit: 10M units
+- Maximum recursion depth: 5 levels
+
+**3. Oracle Security**
+- Pyth Network provides cryptographically signed price updates
+- Multi-source price aggregation to prevent manipulation
+- Confidence intervals for price data quality
+- Emergency circuit breakers for anomalous price feeds
+
+**4. Testing Requirements**
+- Testnet deployment and community review before mainnet activation
+
+### Integration with AEP-76
+
+This proposal directly supports AEP-76's Burn Mint Equilibrium mechanism by providing:
+
+1. **Smart Contract-Based BME Implementation**: The burn-mint logic can be implemented as auditable, upgradeable smart contracts rather than hardcoded protocol logic
+
+2. **Pyth Network Price Oracle**: CosmWasm enables integration with Pyth's low-latency price feeds, providing the reliable pricing infrastructure required for BME operations
+
+3. **Automated Arbitrage Mechanisms**: Smart contracts can monitor ACT/AKT price spreads and execute arbitrage automatically, helping maintain the BME equilibrium
+
+4. **Transparent Operations**: All burn-mint operations occur in observable smart contracts, increasing transparency and auditability
+
+5. **Extensibility**: Future improvements to the BME mechanism can be deployed as contract upgrades without requiring hard forks
+
+## Rationale
+
+### Why CosmWasm?
+
+1. **Cosmos Ecosystem Standard**: CosmWasm is the de facto smart contract platform for Cosmos SDK chains, ensuring compatibility and developer familiarity
+2. **Security**: Rust's memory safety guarantees and CosmWasm's design prevent common smart contract vulnerabilities (reentrancy attacks, overflow/underflow issues)
+3. **Performance**: WebAssembly provides near-native execution speed while maintaining portability
+4. **IBC Native**: CosmWasm has first-class support for Inter-Blockchain Communication, enabling cross-chain applications
+5. **Proven Track Record**: Multiple Cosmos chains (Juno, Neutron, Stargaze, Terra 2.0) successfully run CosmWasm with significant TVL and activity
+
+### Why Pyth Network?
+
+As required by AEP-76, Pyth Network is the optimal choice for price oracle functionality:
+
+1. **Low Latency**: 400ms price updates enable real-time pricing for BME operations
+2. **High Quality Data**: Price feeds sourced from major exchanges, market makers, and trading firms
+3. **Cosmos Integration**: Already deployed on Osmosis and other Cosmos chains with proven reliability
+4. **Security**: Cryptographically signed price updates with confidence intervals and multi-source aggregation
+5. **Comprehensive Coverage**: Supports AKT/USD and other necessary price pairs for the Akash ecosystem
+
+### Alternative Approaches Considered
+
+**1. Native Module Implementation**
+- **Pros**: Better performance, simpler architecture
+- **Cons**: Requires hard forks for updates, limits developer innovation, no composability with broader ecosystem
+
+**2. EVM Compatibility Layer**
+- **Pros**: Access to Ethereum developer community and tooling
+- **Cons**: Less optimized for Cosmos, different security model, not standard for Cosmos ecosystem
+
+**3. Other Oracle Solutions (Chainlink, Band Protocol)**
+- **Pros**: Established reputation, wide adoption
+- **Cons**: Less Cosmos-native, higher latency, AEP-76 specifically targets Pyth Network
+
+## Backwards Compatibility
+
+This proposal is fully backwards compatible:
+
+- Existing Akash modules and functionality remain unchanged
+- CosmWasm operates as an additional module alongside existing features
+- No changes to current deployment, provider, or market modules
+- Existing deployments continue to function without modification
+- Opt-in functionality for users who want smart contract features
+
+## Test Cases
+
+### Integration Tests
+
+1. Deploy Pyth contract on testnet
+2. Deploy BME burn-mint contracts
+3. Execute full burn-mint cycle with price oracle query
+4. Verify correct ACT minting and AKT burning
+5. Test automated arbitrage contract behavior
+6. Validate settlement contract execution with real deployments
+
+### Testnet Deployment
+
+- Public testnet with CosmWasm enabled
+- Developer documentation and examples
+- Bug bounty for critical vulnerabilities
+- Community testing period: minimum 3 months before mainnet
+
+## Security Considerations
+
+### Contract Security
+
+1. **Upgrade Path**: Use contract migration features carefully with governance oversight
+2. **Permission System**: Initially restrict contract uploads to governance-approved addresses
+3. **Gas Limits**: Implement appropriate gas limits to prevent DoS attacks
+
+### Oracle Security
+
+1. **Price Manipulation**: Pyth's multi-source aggregation and confidence intervals mitigate manipulation risks
+2. **Data Staleness**: Circuit breakers trigger if price data exceeds freshness threshold
+3. **Fallback Mechanisms**: Multiple oracle sources for critical operations
+4. **Governance Override**: Emergency governance actions can pause BME operations if oracle issues detected
+
+## Implementation
+
+### Required Changes
+
+**1. Core Node Software**
+```
+akash-network/node:
+- Integrate wasmd v0.61.6
+- Add x/wasm module to app.go
+- Configure wasm parameters
+- Enable contract upload governance
+```
+
+**2. CosmWasm Contracts**
+```
+New Repository: akash-network/contracts
+- Pyth oracle consumer
+```
+
+**3. Documentation**
+```
+akash-network/docs:
+- CosmWasm developer guide
+- Contract deployment tutorial
+- Oracle integration guide
+- Security best practices
+- Example contracts and templates
+```
+
+**4. Testing Infrastructure**
+```
+- Testnet deployment scripts
+- Integration test suite
+- Performance benchmarks
+- Security testing framework
+```
+
+## References
+
+- [CosmWasm Documentation](https://docs.cosmwasm.com/)
+- [CosmWasm GitHub](https://github.com/CosmWasm/cosmwasm)
+- [Pyth Network Documentation](https://docs.pyth.network/)
+- [Pyth Network on Osmosis](https://www.pyth.network/blog/pyth-launches-price-oracles-on-osmosis)
+- [AEP-76: Burn Mint Equilibrium](https://akash.network/roadmap/aep-76/)
+- [Cosmos SDK Documentation](https://docs.cosmos.network/)
+- [Akash Network Documentation](https://docs.akash.network/)
+
+## Copyright
+
+All content herein is licensed under [Apache 2.0](https://www.apache.org/licenses/LICENSE-2.0).
diff --git a/src/content/aeps/aep-79/README.md b/src/content/aeps/aep-79/README.md
new file mode 100644
index 000000000..ab548a34b
--- /dev/null
+++ b/src/content/aeps/aep-79/README.md
@@ -0,0 +1,204 @@
+---
+aep: 79
+title: "Akash on Shared Security"
+author: Greg Osuri (@gosuri)
+status: Final
+type: Standard
+category: Core
+created: 2025-12-15
+updated: 2025-12-15
+estimated-completion: 2026-12-31
+roadmap: major
+---
+
+## Abstract
+
+This RFP seeks proposals from established Layer 1 protocols to become the shared-security provider for the Akash Network, a decentralized cloud computing marketplace on the Cosmos SDK. The goal is to transition from Akash's sovereign chain to a shared-security model to address high capital inefficiency from AKT staking and excessive operational overhead. This move will adopt a pay-per-use security model, reducing the liquidity burden and allowing the team to focus on product innovation, particularly for GPU-intensive AI workloads. The partner must ensure scalable, robust, and decentralized security, maintaining strong IBC interoperability. Proposals must detail the L1's Security Model, Technical Integration, Scalability, Governance, Economic/Legal Considerations, and Ecosystem Profile to enable Akash to leverage external security while preserving application sovereignty.
+
+## Motivation
+
+Akash Network is migrating from its sovereign chain to a shared-security framework to enhance capital efficiency and reduce operational overhead. This move frees staked AKT for marketplace growth and offloads L1 maintenance and security, allowing developers to focus solely on the `AkashApp` (marketplace logic). The goal is to achieve equivalent or better security at a lower cost, accelerating decentralized cloud innovation.
+
+## Introduction
+
+Akash is a **decentralized cloud computing marketplace** that facilitates peer-to-peer trading of computing power. By eliminating middlemen, users can buy and sell resources at a fraction of the cost of big cloud providers.
+
+Often regarded as the first decentralized cloud and category creator for [DePIN](https://messari.io/report/the-depin-sector-map), the Akash community and code are widely regarded for their deep open-source and decentralization values. Akash is an [open‑source](https://github.com/akash-network) protocol built on the Cosmos SDK and uses Tendermint PoS consensus. Marketplace activity (requests, bids and leases) is stored on‑chain and paid for with the AKT token. The network operates a reverse auction; providers compete to offer resources and often deliver compute **at a fraction of the cost** of centralized cloud. This decentralized model has attracted a **large community of over 500 contributors**.
+
+Akash has traditionally run on its **own sovereign chain**. Operating a sovereign chain has two major drawbacks:
+
+1. **Capital efficiency** – maintaining an independent validator set requires significant liquidity because large amounts of AKT must be staked to secure the chain. Liquidity tied up in security could instead be used to support the application.
+2. **Operational and technical overhead** – maintaining a Layer 1 (L1) blockchain solely for a single application demands continuous upgrades, infrastructure management and security expertise. This detracts from product‑focused innovation.
+
+To address these issues, Akash is evaluating a **shared‑security model**. In this model Akash would lease security from another L1 rather than running its own validator set. For example, under **Cosmos Interchain Security** a “consumer chain” leases the **exact same validator set** as the Cosmos Hub; in return, validators receive a share of the consumer chain’s transaction fees. The cost of attacking the consumer chain becomes the same as attacking the Hub, lowering the barrier for launching secure chains. **Polkadot’s parachain model** takes a similar approach: parachains must communicate state transitions to the **Polkadot Relay Chain**, and the Relay Chain’s validators secure all parachains. By concentrating security in one set of validators, parachains don’t need their own security infrastructure. **Celestia** offers modular “data availability” and consensus; rollups submit their data to Celestia and **pay for the inclusion of data.** Fees are only priced on data rather than execution, providing **lower‑cost blockspace**. These examples show that shared‑security can provide robust security and scalability while reducing operational overhead.
+
+## Objectives of this RFP
+
+Akash seeks proposals from foundations or teams behind established Layer 1 protocols interested in serving as the **shared‑security provider** for the Akash Network. Proposals should explain how the candidate L1 will allow Akash to retain sovereignty over its application logic while outsourcing security. The ideal solution should:
+
+1. **Reduce token‑liquidity burden.** Validators must normally stake AKT to secure the chain. We seek a model where security is paid for on a per‑use basis rather than continuously locking large amounts of AKT.
+2. **Minimize technical and operational overhead.** The new model should reduce the need for Akash to maintain its own validator set and blockchain infrastructure. The L1 should provide robust consensus, data availability and slashing mechanisms.
+3. **Preserve decentralization and openness.** Akash is a community‑owned, open‑source network and the selected L1 must share similar values. The integration should not introduce centralization risks or onerous permissioning.
+4. **Provide scalability and cost predictability.** Akash’s workloads, particularly GPU‑intensive AI deployments, are growing rapidly. The security provider must accommodate high throughput without prohibitive costs or slot scarcity.
+5. **Enable interoperability.** Akash is built on Cosmos and interacts with other chains via IBC. Proposals should highlight how the L1 integrates with Cosmos/IBC or provides equivalent interoperability.
+
+## Scope of Proposal
+
+Foundations responding to this RFP should provide detailed information addressing the following areas.
+
+### Security Model and Mechanism
+
+* **Shared‑security design.** Explain how your protocol’s shared‑security mechanism works. For instance, Cosmos “replicated security” uses the same validator set on the provider chain to validate blocks on a consumer chain, while Polkadot’s parachains rely on the Relay Chain’s validators and Celestia provides data availability for rollups that pay for data inclusion. Indicate whether the mechanism is **enshrined** (all chains use shared security by default) or **opt‑in**, and discuss potential limitations (e.g., Polkadot’s limited number of parachain slots or Cosmos’s current limit on the number of consumer chains).
+* **Economic model.** Detail how Akash will pay for security. Provide fee structures (e.g., transaction‑fee sharing, staking requirements, slot auctions or data‑availability fees) and how costs scale with usage. Highlight whether fees are based on data size (as in Celestia’s pricing) or fixed regardless of usage.
+* **Validator incentives and slashing.** Describe how your protocol incentivizes validators and punishes misbehavior. Cosmos Interchain Security slashes validators’ stakes on the provider chain if they misbehave on consumer chains; similar mechanisms should be explained.
+
+### Technical Integration
+
+* **Interoperability with Cosmos and IBC.** Given Akash’s deep integration with the Cosmos ecosystem, proposals should discuss how the L1 connects to Cosmos or supports IBC‑equivalent interoperability. For example, Cosmos consumer chains update their validator sets via IBC packets.
+* **Execution environment support.** Describe whether Akash will deploy as a sovereign rollup or consumer chain and whether the L1 supports general purpose execution. Celestia only provides data availability and ordering, requiring a separate settlement layer; Polkadot’s Relay Chain executes parachain transitions.
+
+* **Migration path.** Provide a roadmap for migrating Akash from its sovereign chain to your shared‑security model. Include timelines, required governance approvals and any necessary code modifications.
+
+### Scalability and Performance
+
+* **Throughput and finality.** Provide metrics on your network’s throughput (transactions per second, data throughput) and block finality times. Explain how these metrics will impact Akash’s workload, particularly high‑density GPU leases.
+* **Capacity limitations.** Note any hard limits on the number of consumer chains or parachains (e.g., Polkadot’s parachain slot limit or Cosmos’s current capacity for 5–10 consumer chains). Describe plans for scaling beyond these limits.
+
+### Governance and Community Alignment
+
+* **Governance model.** Outline how protocol decisions (e.g., changes to shared‑security parameters, upgrades) are made. Akash values community‑led governance and open‑source principles. The selected L1 should demonstrate transparency and decentralized decision‑making.  
+* **Support and collaboration.** Describe the foundation’s commitment to onboarding Akash. This includes technical support, grant funding, marketing collaboration and involvement of your community.  
+* **Community Alignment:** Describe the community's commitment to the values of open-source and deep decentralization. Please include profiles of X key community contributors.
+
+### Economic and Legal Considerations
+
+* **Cost of adoption.** Provide estimated costs or required stake for Akash to join your network. Include any slot‑auction costs, bonding requirements or initial collateral.
+* **Token‑economic implications.** Discuss how integration affects AKT token demand and potential need to hold your protocol’s token for security (e.g., DOT for Polkadot). Highlight whether cross‑chain fees are paid in AKT, your native token or other assets.
+* **Legal and regulatory issues.** Explain any regulatory considerations associated with shared‑security or cross‑chain operations. Akash must ensure compliance with applicable U.S. regulations.
+
+### Ecosystem & Liquidity
+
+* **Liquidity Profile:** Provide a thorough assessment of the chain’s liquidity profile, including market depth, average bid-ask spread, and trading volumes. Key considerations include the ecosystem’s presence on major Centralized Exchanges (CEXs), detailing trading pairs and average daily volume to assess global reach, and its support on Decentralized Exchanges (DEXs). For DEXs, please detail the size and depth of primary liquidity pools, Total Value Locked (TVL), and any details around liquidity incentives.  
+  A strong liquidity profile, characterized by deep order books on CEXs and substantial pools on DEXs, is essential for maintaining price stability and attracting institutional investment for Akash.
+* **Ecosystem Investment and Growth Support:** Provide your framework to foster growth through strategic project funding. This includes detailing specific investment strategies, such as grants, venture capital participation, and direct financial backing for promising decentralized applications and infrastructure developments. Furthermore, clearly identify and profile the key investors, venture capital firms, and institutional partners who are committed to the long-term success and expansion of the ecosystem.  
+* **Institutional Interest:** Describe institutional interests towards the ecosystem, particularly those that are attractive to stable yields backed by real-world assets. Describe how your community can help Akash gain such institutional interest.
+
+## Technical Overview
+
+Akash Network is a decentralized cloud computing marketplace built on the Cosmos SDK, implementing a peer-to-peer network for leasing computing resources. The network consists of tenants seeking computing capacity and providers offering resources, coordinated through blockchain-based smart contracts.
+
+### Core Application Architecture
+
+#### AkashApp Structure
+
+The network is implemented as `AkashApp`, extending Cosmos SDK's `BaseApp` and implementing the ABCI application interface. The application contains:
+
+- **BaseApp**: Core consensus and state management  
+- **App**: Container for keepers, module manager, and codec  
+- **Codec**: Protobuf and amino codecs for serialization  
+- **Module Manager**: Coordinates all blockchain modules
+
+#### Keeper Architecture
+
+State management is handled through a two-tier keeper system:
+
+**Special Keepers** (no dependencies):
+- Params, ConsensusParams, Upgrade keepers
+
+**Normal Keepers** (dependency-ordered):
+- **Cosmos Core**: Auth, Bank, Staking, Distribution, Slashing, Gov, IBC  
+- **Akash-Specific**: Escrow, Deployment, Market, Provider, Audit, Cert, Take
+
+### Module System
+
+#### Core Modules
+
+The marketplace functionality is implemented through six Akash-specific modules:
+
+1. **Deployment**: Manages workload deployment lifecycle  
+2. **Market**: Handles orders, bids, and leases  
+3. **Provider**: Manages provider registration and attributes  
+4. **Escrow**: Processes payments and deposits  
+5. **Audit**: Handles provider auditing  
+6. **Cert**: Manages certificates  
+7. **Take**: Processes marketplace fees
+
+### Module Initialization
+
+Modules follow strict initialization order to satisfy dependencies:
+
+- Foundation modules (auth, bank, staking)  
+- Governance modules (slashing, gov)  
+- System modules (upgrade, mint, crisis)  
+- Cross-chain modules (IBC, evidence, transfer)  
+- Akash foundation modules (cert, take, escrow)  
+- Marketplace modules (deployment, provider, market)
+
+### ABCI Lifecycle
+
+The application implements the full ABCI lifecycle for block processing:
+
+1. **InitChain**: Initializes genesis state from all modules  
+2. **PreBlocker**: Handles upgrades and account preparation  
+3. **BeginBlocker**: Processes block-start logic with specific module ordering  
+4. **EndBlocker**: Finalizes block processing  
+5. **Precommitter**: Final cleanup before state commit
+
+### Marketplace Mechanics
+
+#### Order Flow
+
+1. Tenants create deployment orders specifying resource requirements  
+2. Providers bid on orders with offered resources and pricing  
+3. Market module matches orders with bids  
+4. Escrow module handles payment processing  
+5. Deployment module manages container lifecycle
+
+#### State Management
+
+- **KV Stores**: Persistent state for accounts, balances, validators  
+- **Transient Stores**: Per-block temporary computation state  
+- **Memory Stores**: Non-consensus data like capability keys
+
+### Network Configuration
+
+#### Token Economics
+
+- Native token: AKT (Akash Token)  
+- Minimum validator commission: 5%  
+- Governance deposit requirements: 40% of MinDeposit  
+- Unbonding period: 2 weeks
+
+#### Consensus Parameters
+
+- Block time: \~5 seconds  
+- Signed blocks window: 30,000 blocks (\~41 hours)  
+- Minimum liveness: 5%  
+- Double sign slashing: 5%  
+- Downtime slashing: 0%
+
+### Technical Implementation
+
+#### Build System
+
+- Written in Go (Golang 1.21.0+)  
+- Uses Makefile for build automation  
+- Single binary `akash` containing full node and client functionality
+
+#### API Interfaces
+
+- gRPC services for node communication  
+- REST gateway for client access  
+- CLI interface for node operations
+
+### Notes
+
+This summary focuses on the [core](https://github.com/akash-network/node) blockchain implementation. The actual deployment of workloads happens through [provider-side](https://github.com/akash-network/provider) infrastructure that interfaces with the blockchain but is not covered in this codebase. The network has undergone multiple upgrades to enhance performance and add features like GPU support and improved fee mechanisms.To learn further into and interact with the code base, check out the [node](https://deepwiki.com/akash-network/node) and [provider](https://deepwiki.com/akash-network/provider) deepwikis.
+
+## Submission
+
+Overclock Labs, the core developer coordinating this proposal, will serve as the primary evaluator. Interested parties should contact Greg Osuri on [X](https://x.com/gregosuri) or [Telegram](https://t.me/gregosuri) .
+
+## Copyright
+
+All content herein is licensed under [Apache 2.0](https://www.apache.org/licenses/LICENSE-2.0).
diff --git a/src/content/aeps/aep-8/README.md b/src/content/aeps/aep-8/README.md
index 9d3bf8657..d3798e3fc 100644
--- a/src/content/aeps/aep-8/README.md
+++ b/src/content/aeps/aep-8/README.md
@@ -1,7 +1,7 @@
 ---
 aep: 8
 title: "Mainnet 1: Security"
-author: Greg Osuri (@gosuri), Adam Bozanich (@boz)
+author: Greg Osuri (@gosuri) Adam Bozanich (@boz)
 status: Final
 type: Standard
 category: Core
diff --git a/src/content/aeps/aep-9/README.md b/src/content/aeps/aep-9/README.md
index e1a1c5313..0d0783af6 100644
--- a/src/content/aeps/aep-9/README.md
+++ b/src/content/aeps/aep-9/README.md
@@ -1,7 +1,7 @@
 ---
 aep: 9
 title: Trusted Providers
-author: Greg Osuri (@gosuri), Adam Bozanich (@boz)
+author: Greg Osuri (@gosuri) Adam Bozanich (@boz)
 status: Final
 type: Standard
 category: Core