Disable acceleration of LDIR/LDDR/DJNZ in tap2sna.py

Previously acceleration was enabled only when tracing was disabled,
which could lead to a pause between two tape blocks occurring either
after an LDIR/LDDR/DJNZ instruction (when accelerated), or in the middle
of one (when not accelerated). This inconsistency could in turn lead to
differences in RAM contents or register values in the snapshot produced.

Author: skoolkid

skoolkit/tap2sna.py

@@ -482,8 +482,7 @@ def sim_load(blocks, options, config):
                 warn(f'Unrecognised accelerator: {name}')
 
     interrupted = False
-    fast = not options.trace
-    sim_cfg = {'fast_djnz': fast, 'fast_ldir': fast}
+    sim_cfg = {'fast_djnz': False, 'fast_ldir': False}
     if options.machine == '128':
         if not options.load:
             options.load = 'ENTER'

tests/test_tap2sna.py

@@ -3154,12 +3154,12 @@ def test_sim_load_config_parameters(self):
     @patch.object(tap2sna, 'Simulator', MockSimulator)
     @patch.object(tap2sna, 'LoadTracer', MockLoadTracer)
     @patch.object(tap2sna, 'write_snapshot', mock_write_snapshot)
-    def test_sim_load_enables_fast_djnz_ldir(self):
+    def test_sim_load_disables_fast_djnz_ldir(self):
         tapfile = self._write_tap([create_tap_data_block([0])])
         output, error = self.run_tap2sna(tapfile)
         self.assertEqual(error, '')
-        self.assertTrue(simulator.config.get('fast_djnz'))
-        self.assertTrue(simulator.config.get('fast_ldir'))
+        self.assertFalse(simulator.config.get('fast_djnz'))
+        self.assertFalse(simulator.config.get('fast_ldir'))
 
     @patch.object(tap2sna, 'CSimulator', MockSimulator)
     @patch.object(tap2sna, 'Simulator', MockSimulator)