Enable gade when iommu has AMO_HWAD cap#154
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xmzzz merged 1 commit intoRVCK-Project:OLK-nextfrom Jan 20, 2026
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开始测试 log: https://github.com/RVCK-Project/rvck-olk/actions/runs/21094967264 参数解析结果
测试完成 详细结果:RVCK result
Kunit Test Result[13:29:24] Testing complete. Ran 454 tests: passed: 442, skipped: 12 Kernel Build ResultKernel build succeeded: RVCK-Project/rvck-olk/154/ 54e68601c3d4771a01c302d308cf53b6 /srv/guix_result/c53c8ae3a20224f2aeff824df3bc41686961640d/Image LAVA Checkargs:
result:Lava check done! lava log: https://lava.oerv.ac.cn/scheduler/job/1083 lava result count: [fail]: 19, [pass]: 1587, [skip]: 293 Check Patch Result
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driver inclusion category: bugfix bugzilla: RVCK-Project#145 --------------------------------- If GADE (Guest Atomic D-bit and A-bit Update Enable) is set to 1, the IOMMU will atomically update the Accessed (A) and Dirty (D) bits in second-stage page table entries (PTEs). If GADE is set to 0, the IOMMU will trigger a guest-page-fault corresponding to the original access type under either of the following conditions: when the A bit is 0, or when the memory access is a store operation and the D bit is 0. The driver must enable GADE when the IOMMU has the AMO_HWAD (Atomic Memory Operation for Hardware A/D bits) capability. Signed-off-by: jinqi <jin.qi@zte.com.cn> Signed-off-by: liuqingtao <liu.qingtao2@zte.com.cn>
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开始测试 log: https://github.com/RVCK-Project/rvck-olk/actions/runs/21138199999 参数解析结果
测试完成 详细结果:RVCK result
Kunit Test Result[12:58:09] Testing complete. Ran 454 tests: passed: 442, skipped: 12 Kernel Build ResultKernel build succeeded: RVCK-Project/rvck-olk/154/ 90dad1afd57dc915cf6b31d6cf167a84 /srv/guix_result/170abbac8c411267ede06c424d2086b1150fd71e/Image LAVA Checkargs:
result:Lava check done! lava log: https://lava.oerv.ac.cn/scheduler/job/1087 lava result count: [fail]: 20, [pass]: 1586, [skip]: 293 Check Patch Result
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Enable gade when iommu has AMO_HWAD cap
driver inclusion
category: bugfix
bugzilla: #145
If GADE (Guest Atomic D-bit and A-bit Update Enable) is set to 1,
the IOMMU will atomically update the Accessed (A) and Dirty (D)
bits in second-stage page table entries (PTEs). If GADE is set to 0,
the IOMMU will trigger a guest-page-fault corresponding to the
original access type under either of the following conditions: when
the A bit is 0, or when the memory access is a store operation and
the D bit is 0. The driver must enable GADE when the IOMMU has the
AMO_HWAD (Atomic Memory Operation for Hardware A/D bits) capability.
Signed-off-by: jinqi jin.qi@zte.com.cn
Signed-off-by: liuqingtao liu.qingtao2@zte.com.cn