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RISC-V SBI debug console extension support#88

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RISC-V SBI debug console extension support#88
uestc-gr wants to merge 519 commits intoRVCK-Project:OLK-6.6from
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@uestc-gr uestc-gr commented Jul 5, 2025

Debug Console Extension(DBCN)定义了一种通用机制,允许在 RISC-V 架构的监督模式(Supervisor Mode)软件中进行调试和启动时的早期打印。它取代了旧的 console_putchar 和 console_getchar 扩展

在内核启动参数中配置 earlycon=sbi 即可开启DBCN

Icenowy and others added 30 commits June 5, 2025 17:51
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
Dirty.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
It seems to have dependency issue.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
Always map the GEM object, because it may expect different page
attributes than the fixed map by kernel.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
The cursor should be placed at (x + hot_x, y + hot_y) to allow partial
display of a cursor.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
Fixes cursor disappearing when using rotated screen.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
Otherwise IN_FORMATS blob is corrupted.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Signed-off-by: Han Gao <rabenda.cn@gmail.com>
Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
Based on the current openeuler_defconfig for riscv, use the following
commands to generate the new openeuler_defconfig:

cp arch/riscv/configs/openeuler_defconfig .config
cat arch/riscv/configs/sg2042_defconfig >> .config
make save_oedefconfig
make update_oedefconfig

Build and boot testing passed.

Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
The SSWI device provides supervisor-level IPI functionality for a
set of HARTs on a RISC-V platform. It provides a register to set
an IPI (SETSSIP) for each HART connected to the SSWI device.

The patch utilizes the feature to optimize IPI handling by avoiding
Linux calls into firmware runtime, thus minimizing context switching
expenses and removing the dependency on sbi-ipi.

Co-developed-by: Xiaoguang Xing <xiaoguang.xing@sophgo.com>
Signed-off-by: Xiaoguang Xing <xiaoguang.xing@sophgo.com>
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
While working with the T-Head 1520 LicheePi4A SoC, certain conditions
arose that allowed me to reproduce a race issue in the sdhci code.

To reproduce the bug, you need to enable the sdio1 controller in the
device tree file
`arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi` as follows:

&sdio1 {
	bus-width = <4>;
	max-frequency = <100000000>;
	no-sd;
	no-mmc;
	broken-cd;
	cap-sd-highspeed;
	post-power-on-delay-ms = <50>;
	status = "okay";
	wakeup-source;
	keep-power-in-suspend;
};

When resetting the SoC using the reset button, the following messages
appear in the dmesg log:

[    8.164898] mmc2: Got command interrupt 0x00000001 even though no
command operation was in progress.
[    8.174054] mmc2: sdhci: ============ SDHCI REGISTER DUMP ===========
[    8.180503] mmc2: sdhci: Sys addr:  0x00000000 | Version:  0x00000005
[    8.186950] mmc2: sdhci: Blk size:  0x00000000 | Blk cnt:  0x00000000
[    8.193395] mmc2: sdhci: Argument:  0x00000000 | Trn mode: 0x00000000
[    8.199841] mmc2: sdhci: Present:   0x03da0000 | Host ctl: 0x00000000
[    8.206287] mmc2: sdhci: Power:     0x0000000f | Blk gap:  0x00000000
[    8.212733] mmc2: sdhci: Wake-up:   0x00000000 | Clock:    0x0000decf
[    8.219178] mmc2: sdhci: Timeout:   0x00000000 | Int stat: 0x00000000
[    8.225622] mmc2: sdhci: Int enab:  0x00ff1003 | Sig enab: 0x00ff1003
[    8.232068] mmc2: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00000000
[    8.238513] mmc2: sdhci: Caps:      0x3f69c881 | Caps_1:   0x08008177
[    8.244959] mmc2: sdhci: Cmd:       0x00000502 | Max curr: 0x00191919
[    8.254115] mmc2: sdhci: Resp[0]:   0x00001009 | Resp[1]:  0x00000000
[    8.260561] mmc2: sdhci: Resp[2]:   0x00000000 | Resp[3]:  0x00000000
[    8.267005] mmc2: sdhci: Host ctl2: 0x00001000
[    8.271453] mmc2: sdhci: ADMA Err:  0x00000000 | ADMA Ptr:
0x0000000000000000
[    8.278594] mmc2: sdhci: ============================================

I also enabled some traces to better understand the problem:

     kworker/3:1-62      [003] .....     8.163538: mmc_request_start:
mmc2: start struct mmc_request[000000000d30cc0c]: cmd_opcode=5
cmd_arg=0x0 cmd_flags=0x2e1 cmd_retries=0 stop_opcode=0 stop_arg=0x0
stop_flags=0x0 stop_retries=0 sbc_opcode=0 sbc_arg=0x0 sbc_flags=0x0
sbc_retires=0 blocks=0 block_size=0 blk_addr=0 data_flags=0x0 tag=0
can_retune=0 doing_retune=0 retune_now=0 need_retune=0 hold_retune=1
retune_period=0
          <idle>-0       [000] d.h2.     8.164816: sdhci_cmd_irq:
hw_name=ffe70a0000.mmc quirks=0x2008008 quirks2=0x8 intmask=0x10000
intmask_p=0x18000
     irq/24-mmc2-96      [000] .....     8.164840: sdhci_thread_irq:
msg=
     irq/24-mmc2-96      [000] d.h2.     8.164896: sdhci_cmd_irq:
hw_name=ffe70a0000.mmc quirks=0x2008008 quirks2=0x8 intmask=0x1
intmask_p=0x1
     irq/24-mmc2-96      [000] .....     8.285142: mmc_request_done:
mmc2: end struct mmc_request[000000000d30cc0c]: cmd_opcode=5
cmd_err=-110 cmd_resp=0x0 0x0 0x0 0x0 cmd_retries=0 stop_opcode=0
stop_err=0 stop_resp=0x0 0x0 0x0 0x0 stop_retries=0 sbc_opcode=0
sbc_err=0 sbc_resp=0x0 0x0 0x0 0x0 sbc_retries=0 bytes_xfered=0
data_err=0 tag=0 can_retune=0 doing_retune=0 retune_now=0 need_retune=0
hold_retune=1 retune_period=0

Here's what happens: the __mmc_start_request function is called with
opcode 5. Since the power to the Wi-Fi card, which resides on this SDIO
bus, is initially off after the reset, an interrupt SDHCI_INT_TIMEOUT is
triggered. Immediately after that, a second interrupt SDHCI_INT_RESPONSE
is triggered. Depending on the exact timing, these conditions can
trigger the following race problem:

1) The sdhci_cmd_irq top half handles the command as an error. It sets
   host->cmd to NULL and host->pending_reset to true.
2) The sdhci_thread_irq bottom half is scheduled next and executes faster
   than the second interrupt handler for SDHCI_INT_RESPONSE. It clears
   host->pending_reset before the SDHCI_INT_RESPONSE handler runs.
3) The pending interrupt SDHCI_INT_RESPONSE handler gets called, triggering
   a code path that prints: "mmc2: Got command interrupt 0x00000001 even
   though no command operation was in progress."

To solve this issue, we need to clear pending interrupts when resetting
host->pending_reset. This ensures that after sdhci_threaded_irq restores
interrupts, there are no pending stale interrupts.

The behavior observed here is non-compliant with the SDHCI standard.
Place the code in the sdhci-of-dwcmshc driver to account for a
hardware-specific quirk instead of the core SDHCI code.

Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Fixes: 43658a542ebf ("mmc: sdhci-of-dwcmshc: Add support for T-Head TH1520")
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20241008100327.4108895-1-m.wilczynski@samsung.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
Enable CONFIG_DRM_ETNAVIV=m
Update CONFIG_AIC_FW_PATH="/lib/firmware/aic8800"
And generate the new openeuler_defconfig.

Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
Due to a known bug found during the testing of video_memory, disable it
until the issue is resolved.

```
[  +0.701834] BUG: Bad page state in process Media  pfn:0c7d2
[  +0.005632] page:000000008ee78948 refcount:0 mapcount:0 mapping:0000000000000000 index:0x0 pfn:0xc7d2
[  +0.009300] flags: 0xfffc00000004000(reserved|node=0|zone=0|lastcpupid=0x3fff)
[  +0.007277] page_type: 0xffffffff()
[  +0.003548] raw: 0fffc00000004000 0000000000000000 0000000000000122 0000000000000000
[  +0.007774] raw: 0000000000000000 0000000000000000 00000000ffffffff 0000000000000000
[  +0.007795] page dumped because: PAGE_FLAGS_CHECK_AT_FREE flag(s) set
...
[  +0.008629] Hardware name: Sipeed Lichee Pi 4A 16G (DT)
[  +0.005227] Call Trace:
[  +0.002447] [<ffffffff800069ba>] dump_backtrace+0x28/0x30
[  +0.005409] [<ffffffff80a2f8aa>] show_stack+0x38/0x44
[  +0.005057] [<ffffffff80a3d652>] dump_stack_lvl+0x44/0x5c
[  +0.005403] [<ffffffff80a3d682>] dump_stack+0x18/0x20
[  +0.005053] [<ffffffff802567aa>] bad_page+0x11a/0x162
[  +0.005056] [<ffffffff80256ede>] free_page_is_bad_report+0x42/0xa2
[  +0.006183] [<ffffffff802575b0>] free_unref_page_prepare+0x13e/0x24a
[  +0.006363] [<ffffffff8025a11c>] free_unref_page+0x5a/0x1c0
[  +0.005574] [<ffffffff8025a48e>] __free_pages+0x106/0x10c
[  +0.005402] [<ffffffff0263f502>] free_memblk_pages+0x76/0x26c [vidmem]
[  +0.006627] [<ffffffff0263f9a6>] GFP_Free+0xae/0x150 [vidmem]
[  +0.005832] [<ffffffff026400c2>] vidalloc_ioctl+0x4ba/0x870 [vidmem]
[  +0.006437] [<ffffffff802dc506>] __riscv_sys_ioctl+0x96/0xc2
[  +0.005668] [<ffffffff80a3e18a>] do_trap_ecall_u+0x138/0x14a
[  +0.005661] [<ffffffff80a49510>] ret_from_exception+0x0/0x64
[  +0.005730] Disabling lock debugging due to kernel taint
```

Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
fix: Error: unrecognized opcode cbo.clean (a0)
KUnit test error:
  arch/riscv/mm/dma-noncoherent.c:54:
    Error: unrecognized opcode cbo.clean (a0)', extension zicbom' required

Signed-off-by: Yafen Fang <yafen@iscas.ac.cn>
mainline inclusion
commit de1ff306dcf4546d6a8863b1f956335e0d3fbb9b
category: cleanup
bugzilla: https://github.com/RVCK-Project/rvck-olk/issues/1

--------------------------------

Now that the GIC-v3 callback can handle invocation with a fwspec parameter
count of 0 lift the restriction in the core code and invoke select()
unconditionally when the domain provides it.

Preparatory change for per device MSI domains.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20240127161753.114685-3-apatel@ventanamicro.com
Signed-off-by: Hangfan Li <lihangfan@iscas.ac.cn>
mainline inclusion
commit ac81e94ab001c2882e89c9b61417caea64b800df
category: feature
bugzilla: https://github.com/RVCK-Project/rvck-olk/issues/1

--------------------------------

Supporting per device MSI domains on ARM64, RISC-V and the zoo of
interrupt mechanisms needs a bit more information than what the
initial x86 implementation provides.

Add the following fields:

  - required_flags: 	The flags which a parent domain requires to be set
  - bus_select_token:	The bus token of the parent domain for select()
  - bus_select_mask:	A bitmask of supported child domain bus types

This allows to provide library functions which can be shared between
various interrupt chip implementations and avoids replicating mostly
similar code all over the place.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20240127161753.114685-4-apatel@ventanamicro.com
Signed-off-by: Hangfan Li <lihangfan@iscas.ac.cn>
mainline inclusion
commit 6516d5a295356f8fd5827a1c0954d7ed5b2324dd
category: feature
bugzilla: https://github.com/RVCK-Project/rvck-olk/issues/1

--------------------------------

Add a new domain bus token to prepare for device MSI which aims to replace
the existing platform MSI maze.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20240127161753.114685-5-apatel@ventanamicro.com
Signed-off-by: Hangfan Li <lihangfan@iscas.ac.cn>
mainline inclusion
commit c88f9110bfbca5975a8dee4c9792ba12684c7bca
category: feature
bugzilla: https://github.com/RVCK-Project/rvck-olk/issues/1

--------------------------------

Provide functions to create and remove per device MSI domains which replace
the platform-MSI domains. The new model is that each of the devices which
utilize platform-MSI gets now its private MSI domain which is "customized"
in size and with a device specific function to write the MSI message into
the device.

This is the same functionality as platform-MSI but it avoids all the down
sides of platform MSI, i.e. the extra ID book keeping, the special data
structure in the msi descriptor. Further the domains are only created when
the devices are really in use, so the burden is on the usage and not on the
infrastructure.

Fill in the domain template and provide two functions to init/allocate and
remove a per device MSI domain.

Until all users and parent domain providers are converted, the init/alloc
function invokes the original platform-MSI code when the irqdomain which is
associated to the device does not provide MSI parent functionality yet.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20240127161753.114685-6-apatel@ventanamicro.com
Signed-off-by: Hangfan Li <lihangfan@iscas.ac.cn>
mainline inclusion
commit 14fd06c776b5289a43c91cdc64bac3bdbc7b397e
category: cleanup
bugzilla: https://github.com/RVCK-Project/rvck-olk/issues/1

--------------------------------

Switch all the users of the platform MSI domain over to invoke the new
interfaces which branch to the original platform MSI functions when the
irqdomain associated to the caller device does not yet provide MSI parent
functionality.

No functional change.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20240127161753.114685-7-apatel@ventanamicro.com
Signed-off-by: Hangfan Li <lihangfan@iscas.ac.cn>
mainline inclusion
commit 1a4671ff7a903e87e4e76213e200bb8bcfa942e4
category: cleanup
bugzilla: https://github.com/RVCK-Project/rvck-olk/issues/1

--------------------------------

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Hangfan Li <lihangfan@iscas.ac.cn>
@oervci
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oervci commented Jul 5, 2025

@oervci
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oervci commented Jul 5, 2025

Kernel build success!

@oervci
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oervci commented Jul 5, 2025

@oervci
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oervci commented Jul 5, 2025

Lava check done! result url: https://lava.oerv.ac.cn/scheduler/job/323

@uestc-gr uestc-gr changed the title Backport subject: "RISC-V SBI debug console extension support" RISC-V SBI debug console extension support Jul 8, 2025
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