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@sakundu sakundu commented Jan 8, 2026

Summary

Fixed incorrect bit mapping in the limping_SyncSpRamBeNx64_00000008_00000100_0_2 module that was causing critical cache dirty/valid bits to be lost, resulting in a total of 132 macros, whereas 133 macros were expected.

Problem

The limping_SyncSpRamBeNx64_00000008_00000100_0_2 module (used by valid_dirty_sram) was storing bits [15:0] and zeroing bits [63:16]. However, the critical data (dirty_wdata[1:0], replicated for all eight cache ways) is located at bits [63:48], not [15:0].

As a result, the cache's valid/dirty status bits always read as zero, which could lead to the pruning of the valid_dirty_sram.

Fix

Changed the limping module to store bits [63:48] (the critical dirty/valid bits) instead of bits [15:0]:

// Before (incorrect):
fakeram45_256x16 macro_mem_0 (..., .rd_out(RdData_DO[15:0]), .wd_in(WrData_DI[15:0]));
assign RdData_DO[63:16] = 48'h0;

// After (fixed):
fakeram45_256x16 macro_mem_3 (..., .rd_out(RdData_DO[63:48]), .wd_in(WrData_DI[63:48]));
assign RdData_DO[47:0] = 48'h0;

Signed-off-by: Sayak Kundu <sakundu@ucsd.edu>
@sakundu sakundu changed the title Updated macro wiring for ariane133 to ensure 133 macros Restore missing macro in NG45 ariane133. Jan 8, 2026
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This matches my earlier finding of why the macro gets pruned

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2 participants