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PR Description

Added support for Corundum Network Stack on ADRV9009ZU11EG. This feature is only available for ADRV9009ZU11EG/ADRV2CRR-FMC variant of the project. Currently, this Corundum configuration supports 10 Gbps on QSFP+ connection. In this PR, the main changes are:

  • In library/corundum added the ethernet core and configuration files for support on ADRV9009ZU11EG
  • In projects/adrv9009zu11eg/adrv2crr_fmc added all the files specific to the Corundum stack
  • Updated the documentation to reflect the changes as well (README + project documentation page)

In order to build the project and have the Corundum stack integrated, the user needs to use the new parameter called CORUNDUM and set it to 1 (default it's 0).

IMPORTANT: The Corundum stack was integrated according to our already present Corundum infrastructure and it's very similar to the other projects which support Corundum, besides one thing. In this project, the Corundum Reset Generator, it's not used, it's bypassed, the Corundum hierarchy is directly connected to the PS clock (of 250 MHz) and directly connected to the PS aresetn.

PR Type

  • Bug fix (change that fixes an issue)
  • New feature (change that adds new functionality)
  • Breaking change (has dependencies in other repos or will cause CI to fail)
  • Documentation

PR Checklist

  • I have followed the code style guidelines
  • I have performed a self-review of changes
  • I have compiled all hdl projects and libraries affected by this PR
  • I have tested in hardware affected projects, at least on relevant boards
  • I have commented my code, at least hard-to-understand parts
  • I have signed off all commits from this PR
  • I have updated the documentation (wiki pages, ReadMe files, Copyright etc)
  • I have not introduced new Warnings/Critical Warnings on compilation
  • I have added new hdl testbenches or updated existing ones

@cristianmihaipopa cristianmihaipopa changed the title Corundum support for ADRV9009ZU11EG Corundum 10 Gbps QSFP+ support for ADRV9009ZU11EG Dec 5, 2025
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Please rebase the PR on the current main branch and solve the conflicts.

@cristianmihaipopa cristianmihaipopa force-pushed the adrv9009zu11eg_qsfp_10_pr branch 3 times, most recently from d622b03 to 066733e Compare December 9, 2025 14:48
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V1: Did the requested changes. The Guideline checker is failing because of the Copyright in /library/corundum/ethernet/adrv9009zu11eg/ethernet_adrv9009zu11eg.v, but it's similar to the other .v files from /library/corundum/ethernet.

be cloned alongside HDL repository. Do a git checkout to the latest tested
version (commit - 37f2607). When the 10G-based implementation (e.g., in
this project) is used, apply the indicated patch. Then navigate back to the
location of the project, and build the project using the enviromental variable
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Typo: environment variable.

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Todo.

@cristianmihaipopa cristianmihaipopa force-pushed the adrv9009zu11eg_qsfp_10_pr branch 2 times, most recently from 7c00bdb to d11d2f1 Compare December 12, 2025 12:31
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V2: Did the requested changes.

@cristianmihaipopa cristianmihaipopa force-pushed the adrv9009zu11eg_qsfp_10_pr branch from 8411aa1 to bd0b0cd Compare December 16, 2025 12:18
@PopPaul2021 PopPaul2021 self-requested a review December 16, 2025 13:57
PopPaul2021
PopPaul2021 previously approved these changes Dec 16, 2025
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Looks good to me!

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V3: In corundum.tcl we have a common if for ptp signals for K26 and ADRV9009ZU11EG.

alin724
alin724 previously approved these changes Dec 19, 2025
PopPaul2021
PopPaul2021 previously approved these changes Dec 19, 2025
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Looks good to me!

be cloned alongside HDL repository. Do a git checkout to the latest tested
version (commit - 37f2607). When the 10G-based implementation (e.g., in
this project) is used, apply the indicated patch. Then navigate back to the
location of the project, and build the project using the enviromental variable
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Todo.

- Initial Corundum support, use mode is QSFP+ 10Gbps variant,
for ADRV9009ZU11EG
- Added the configuration, scripts and ethernet architecure for
support on ADRV9009ZU11EG
- In corundum.tcl, changed the last if case to be more explicit,
for MicroBlaze case

Signed-off-by: Cristian Mihai Popa <cristianmihai.popa@analog.com>
- Corundum support is ONLY available for the
ADRV9009ZU11EG/ADRV2CRR_FMC variant of the project
- Created a new constraints file, alongside with a new top
file, for routing the QSFP signals
- Added a separate bd.tcl script, to handle the necessary exports,
configurations and connections for Corundum features
- Added a new build mode for Corundum, by using the new parameter
called CORUNDUM (make CORUNDUM=1)
- All the Corundum dependecies are contraint by this variable; if
the variable it's not specied when using make, the default variant
of the project will be built
- IMPORTANT: this implementaion of the Corundum IP, bypasses the
Corundum Reset Generator (as seen in the other implementations),
connects the Corundum Hierarchy reset and clock directly to the PS

Signed-off-by: Cristian Mihai Popa <cristianmihai.popa@analog.com>
- Updated the projects/adrv9009zu11eg/adrv2crr_fmc/README.md
- Updated ADRV9009ZU11EG documentation

Signed-off-by: Cristian Mihai Popa <cristianmihai.popa@analog.com>
Comment on lines +407 to +410
0'b0, // 11
0'b0, // 10
0'b0, // 9
0'b0, // 8
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Vivado critical warnings: multi-driven nets and illegal expression in output port connections.
These signals are inout ports, which mean that they can be both input and output. Having these values hardcoded to any value means that when in input mode, the input signal is driven by the output value of the FPGA and the hardcoded value, thus resulting in multi-driven net.
Please remove these GPIO pins from the IOB instantiation.

Comment on lines +503 to +505
.gpio_i (gpio_i),
.gpio_o (gpio_o),
.gpio_t (gpio_t),
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Port width mismatch between system_top and system_wrapper.

Comment on lines +45 to +48
ad_connect smartconnect_corundum/ARESETN sys_ps8/pl_resetn1
ad_connect smartconnect_corundum/S00_ARESETN sys_ps8/pl_resetn1
ad_connect smartconnect_corundum/M00_ARESETN sys_ps8/pl_resetn1
ad_connect smartconnect_corundum/M01_ARESETN sys_ps8/pl_resetn1
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Vivado critical warning: reset pin is asynchronous to the input clock.
Please synchronize the reset to the clock source.

Comment on lines +229 to +235
/*
* Ethernet: QSFP28
*/
output wire qsfp_resetl,
input wire qsfp_modprsl,
input wire qsfp_intl,
output wire qsfp_lpmode,
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qsfp_modsell is not connected in the top module. Is this intentional?

assign qsfp_drp_rst = rst_125mhz_int;

wire qsfp_rx_block_lock;
wire qsfp_gtpowergood;
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qsfp_gtpowergood is already declared in the input port list.

Comment on lines +744 to +745
wire qsfp_modprsl_int;
wire qsfp_intl_int;
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These signals are used before they are declared.

Comment on lines +751 to +752
reg qsfp_reset_reg = 1'b0;
reg qsfp_lpmode_reg = 1'b0;
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These signals are used before they are declared.

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5 participants