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Added Corundum support for ADRV9009ZU11EG #3049

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Added Corundum support for ADRV9009ZU11EG #3049

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14 changes: 7 additions & 7 deletions arch/arm64/boot/dts/xilinx/zynqmp-adrv9009-zu11eg-reva-adrv2crr-fmc-reva.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -80,64 +80,64 @@
};
};

gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;

bt0 {
label = "BT0";
linux,code = <KEY_LEFT>;
gpios = <&gpio 78 0>;
};

bt1 {
label = "BT1";
linux,code = <KEY_RIGHT>;
gpios = <&gpio 79 0>;
};

bt2 {
label = "BT2";
linux,code = <KEY_ENTER>;
gpios = <&gpio 80 0>;
};

bt3 {
label = "BT3";
linux,code = <KEY_ESC>;
gpios = <&gpio 81 0>;
};

sw0 {
label = "SW0";
linux,input-type = <EV_SW>;
linux,code = <SW_LINEIN_INSERT>;
gpios = <&gpio 82 0>;
};

sw1 {
label = "SW1";
linux,input-type = <EV_SW>;
linux,code = <SW_TABLET_MODE>;
gpios = <&gpio 83 0>;
};

sw2 {
label = "SW2";
linux,input-type = <EV_SW>;
linux,code = <SW_HEADPHONE_INSERT>;
gpios = <&gpio 84 0>;
};

sw3 {
label = "SW3";
linux,input-type = <EV_SW>;
linux,code = <SW_RFKILL_ALL>;
gpios = <&gpio 85 0>;
};
};

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GitHub Actions / build_gcc_aarch64 / build 

(avoid_unnecessary_addr_size): /gpio_keys: unnecessary #address-cells/#size-cells without "ranges", "dma-ranges" or child "reg" property

audio_clock: audio_clock {
compatible = "fixed-clock";
Expand All @@ -164,17 +164,17 @@
"LAUX", "Line In",
"RAUX", "Line In";

simple-audio-card,dai-link@0 {
format = "i2s";
cpu {
sound-dai = <&axi_i2s_adi>;
frame-master;
bitclock-master;
};
codec {
sound-dai = <&adau1761>;
};
};

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(unit_address_vs_reg): /talise_sound/simple-audio-card,dai-link@0: node has a unit name, but no reg or ranges property
};

psgtr_ref1: ad9542_out0_c {
Expand Down Expand Up @@ -347,16 +347,16 @@
#clock-cells = <2>;

assigned-clocks = <&ad9545_clock AD9545_CLK_NCO AD9545_NCO0>,
<&ad9545_clock AD9545_CLK_PLL AD9545_PLL0>,
<&ad9545_clock AD9545_CLK_OUT AD9545_Q0A>;
assigned-clock-rates = <10000>, <1413120000>, <30720000>;
<&ad9545_clock AD9545_CLK_PLL AD9545_PLL1>,
<&ad9545_clock AD9545_CLK_OUT AD9545_Q1B>;
assigned-clock-rates = <10000>, <1562500000>, <156250000>;
assigned-clock-phases = <0>, <0>, <0>, <180>;

aux-nco-clk@AD9545_NCO0 {
reg = <AD9545_NCO0>;
adi,freq-lock-threshold-ps = <16000000>;
adi,phase-lock-threshold-ps = <16000000>;
};

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(unique_unit_address): /axi/i2c@ff030000/i2c-mux@70/i2c@1/ad9545@4a/aux-nco-clk@0: duplicate unit-address (also used in node /axi/i2c@ff030000/i2c-mux@70/i2c@1/ad9545@4a/ref-input-clk@0)

/* Ref A (J4) 10Mhz input */
ref-input-clk@0 {
Expand All @@ -374,8 +374,8 @@
adi,phase-lock-drain-rate = <20>;
};

ad9545_apll0: pll-clk@AD9545_PLL0 {
reg = <AD9545_PLL0>;
ad9545_apll1: pll-clk@AD9545_PLL1 {
reg = <AD9545_PLL1>;

#address-cells = <1>;
#size-cells = <0>;
Expand All @@ -395,8 +395,8 @@
};
};

output-clk@AD9545_Q0A {
reg = <AD9545_Q0A>;
output-clk@AD9545_Q1B {
reg = <AD9545_Q1B>;
adi,output-mode = <DRIVER_MODE_SINGLE_DIV_DIF>;
adi,current-source-microamp = <15000>;
};
Expand Down
35 changes: 35 additions & 0 deletions ...64/boot/dts/xilinx/zynqmp-adrv9009-zu11eg-revb-adrv2crr-fmc-revb-jesd204-fsm-100-qsfp.dts
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@@ -0,0 +1,35 @@
// SPDX-License-Identifier: GPL-2.0
/*
* ADRV2CRR-FMC using ADRV9009-ZU11EG Rev.B System on Module
*
* https://wiki.analog.com/resources/eval/user-guides/adrv9009
* https://wiki.analog.com/resources/tools-software/linux-drivers/iio-transceiver/adrv9009
* https://wiki.analog.com/resources/tools-software/linux-software/adrv9009_advanced_plugin
* https://wiki.analog.com/resources/eval/user-guides/adrv9009-zu11eg/adrv2crr-fmc_carrier_board
*
* hdl_project: <adrv9009zu11eg/adrv2crr_fmc>
* board_revision: <B>
*
* Copyright (C) 2025 Analog Devices Inc.
*/

#include "zynqmp-adrv9009-zu11eg-revb-adrv2crr-fmc-revb-jesd204-fsm.dts"

/ {
model = "Analog Devices ADRV9009ZU11EG Corundum support";
/delete-node/ leds;
};

&fpga_axi {
mqnic0: ethernet@a0000000 {
compatible = "corundum,mqnic";
reg = <0x0 0xa0000000 0x1000000>;
reg-names = "csr";
interrupt-parent = <&gic>;
interrupts = <0 93 1>;
assigned-clocks = <&zynqmp_clk 72>; // PL1_REF
assigned-clock-rates = <250000000>;
resets = <&zynqmp_reset 117>; // ZYNQMP_RESET_PS_PL1
reset-names = "reset";
};
};

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checkpatch: adding a line without newline at end of file
+};
3 changes: 3 additions & 0 deletions arch/arm64/configs/adi_zynqmp_defconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -23,6 +23,9 @@ CONFIG_ARMV8_DEPRECATED=y
CONFIG_SWP_EMULATION=y
CONFIG_CP15_BARRIER_EMULATION=y
CONFIG_SETEND_EMULATION=y
CONFIG_CORUNDUM_MQNIC=y
CONFIG_AUXILIARY_BUS=y
CONFIG_I2C_ALGOBIT=y
# CONFIG_DMI is not set
CONFIG_CPU_IDLE=y
CONFIG_CPU_FREQ=y
Expand Down
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