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Fixed Out-of-Bounds but couldn't test #2

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Fixed Out-of-Bounds but couldn't test #2

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7e193e3
Update dds.sv
bonnom Mar 31, 2025
8812383
Update dds.sv
bonnom Mar 31, 2025
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23 changes: 14 additions & 9 deletions hdl/dds.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -82,13 +82,13 @@ always_ff @(posedge clk) begin
sin_quadrant_index <= phase_buf[PHASE_DW-1:PHASE_DW-2];
// sin
if (phase_buf[PHASE_DW - 2]) // if in 2nd or 4th quadrant
sin_lut_index <= ~phase_buf[PHASE_DW - 3 -: EFFECTIVE_LUT_WIDTH] + 1;
sin_lut_index <= ~phase_buf[PHASE_DW - 3 -: EFFECTIVE_LUT_WIDTH] + 1'b1;
else
sin_lut_index <= phase_buf[PHASE_DW - 3 -: EFFECTIVE_LUT_WIDTH];
// cos
if (SIN_COS || USE_TAYLOR) begin
if (!phase_buf[PHASE_DW - 2]) // if in 1st or 3rd quadrant
cos_lut_index <= ~phase_buf[PHASE_DW - 3 -: EFFECTIVE_LUT_WIDTH] + 1;
cos_lut_index <= ~phase_buf[PHASE_DW - 3 -: EFFECTIVE_LUT_WIDTH] + 1'b1;
else
cos_lut_index <= phase_buf[PHASE_DW - 3 -: EFFECTIVE_LUT_WIDTH];
end
Expand Down Expand Up @@ -211,16 +211,21 @@ reg [TAYLOR_PIPELINE_STAGES - 1 : 0] valid_taylor;
if (USE_TAYLOR) begin
always_ff@(posedge clk) begin
integer k;
for (k = 0; k < TAYLOR_PIPELINE_STAGES; k = k + 1) begin
if (!reset_n) begin
if (!reset_n) begin
for (k = 0; k < TAYLOR_PIPELINE_STAGES - 1; k = k + 1) begin
out_sin_buf_taylor[k] <= '0;
out_cos_buf_taylor[k] <= '0;
sin_extended[k] <= '0;
cos_extended[k] <= '0;
phase_error_multiplied_buf[k] <= '0;
phase_error_multiplied_buf2[k] <= '0;
sin_extended[k] <= '0;
cos_extended[k] <= '0;
valid_taylor[k] <= '0;
end else begin
end
sin_extended[TAYLOR_PIPELINE_STAGES - 1] <= '0;
cos_extended[TAYLOR_PIPELINE_STAGES - 1] <= '0;
valid_taylor[TAYLOR_PIPELINE_STAGES - 1] <= '0;
end else begin
for (k = 0; k < TAYLOR_PIPELINE_STAGES; k = k + 1) begin
if(k == 0) begin // stage 5
out_sin_buf_taylor[k] <= out_sin_phase;
out_cos_buf_taylor[k] <= out_cos_phase;
Expand All @@ -229,7 +234,7 @@ if (USE_TAYLOR) begin
phase_error_multiplied_buf[k] <= phase_error_multiplied;
phase_error_multiplied_buf2[k] <= phase_error_multiplied;
valid_taylor[k] <= phase_error_valid;
end
end
else if (k < TAYLOR_PIPELINE_STAGES -1) begin // stages 6-7
out_sin_buf_taylor[k] <= out_sin_buf_taylor[k-1];
out_cos_buf_taylor[k] <= out_cos_buf_taylor[k-1];
Expand Down Expand Up @@ -306,4 +311,4 @@ end
assign m_axis_out_tdata = {m_axis_out_sin_tdata, m_axis_out_cos_tdata};
assign m_axis_out_tvalid = m_axis_out_sin_tvalid;

endmodule
endmodule