Adding nextpnr routing timing support

[gatecat]

This currently imports a simplified set of routing delays to nextpnr. Remaining TODOs:

• site input timing
• populating the cell pin timing structures

[gatecat]

@acomodi even though cell delays aren't implemented yet, what do you think about merging just the routing delay part so we get some degree of timing in nextpnr?

Depending on the outcome of chipsalliance/fpga-interchange-schema#61 there might be a bit more work needed to get cell delays working (and we don't have the data for them for 7-series in any case).

[tmichalak]

@gatecat I am in favor of merging the routing delay part first. BTW how did you test the current implementation?

[gatecat]

BTW how did you test the current implementation?

Currently, by using --sdf with nextpnr to write an SDF file, and manually comparing against the delays in the Vivado GUI.