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1. core core Public

   RISC-V (rv32imf) CPU implemented in System Verilog for cpuex2019@UTokyo

   SystemVerilog 6 3

2. compiler compiler Public

   compile compile compile ....

   OCaml 1

3. simulator simulator Public

   Unprivileged rv32imf simulator written in C.

   C

4. fpu fpu Public

   SystemVerilog

5. assembler assembler Public

   simple assembler (having a little functions)

   Assembly