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[SYCL] Add tests for some half builtins #880

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againull merged 8 commits into from
Mar 28, 2022
Merged

[SYCL] Add tests for some half builtins #880

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b7aa4c9
[SYCL] added tests for some half builtins
t4c1 Mar 2, 2022
2e797c1
disabled for OpenCL backend on CPU
t4c1 Mar 3, 2022
02f653c
format
t4c1 Mar 3, 2022
ac29a61
actually check relative error
t4c1 Mar 7, 2022
2f7fc03
format
t4c1 Mar 7, 2022
20dd111
addressed review comments and refactored into a single kernel
t4c1 Mar 21, 2022
f0dbb4a
Update SYCL/Basic/half_builtins.cpp
t4c1 Mar 21, 2022
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format
t4c1 Mar 21, 2022
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227 changes: 227 additions & 0 deletions SYCL/Basic/half_builtins.cpp
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// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
// RUN: %HOST_RUN_PLACEHOLDER %t.out
// RUN: %CPU_RUN_PLACEHOLDER %t.out
// RUN: %GPU_RUN_PLACEHOLDER %t.out
// RUN: %ACC_RUN_PLACEHOLDER %t.out

// OpenCL CPU driver does not support cl_khr_fp16 extension
// UNSUPPORTED: cpu && opencl
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@smaslov-intel smaslov-intel Mar 28, 2022

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NIT: would it be better to test for the extension support in the source code itself?


#include <CL/sycl.hpp>

#include <cmath>
#include <unordered_set>

using namespace cl::sycl;

constexpr int N = 16 * 3; // divisible by all vector sizes

bool check(half a, half b) {
return fabs(2 * (a - b) / (a + b)) <
std::numeric_limits<cl::sycl::half>::epsilon() ||
a < std::numeric_limits<cl::sycl::half>::min();
}

#define TEST_BUILTIN_1_VEC_IMPL(NAME, SZ) \
{ \
buffer<half##SZ> a_buf((half##SZ *)&a[0], N / SZ); \
buffer<half##SZ> d_buf((half##SZ *)&d[0], N / SZ); \
q.submit([&](handler &cgh) { \
auto A = a_buf.get_access<access::mode::read>(cgh); \
auto D = d_buf.get_access<access::mode::write>(cgh); \
cgh.parallel_for(N / SZ, \
[=](id<1> index) { D[index] = NAME(A[index]); }); \
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@bader bader Mar 20, 2022

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I think it would be more efficient to have a kernel testing all functions instead of a kernel per function.

I don't know how to apply the same logic for different vector length (i.e. reduce # of test kernels), but we probably can consider allocating more buffers (e.g. one buffer per vector length).

}); \
} \
for (int i = 0; i < N; i++) { \
assert(check(d[i], NAME(a[i]))); \
}

// vectors of size 3 need separate test, as they actually have the size of 4
// halfs
#define TEST_BUILTIN_1_VEC3_IMPL(NAME) \
{ \
buffer<half3> a_buf((half3 *)&a[0], N / 4); \
buffer<half3> d_buf((half3 *)&d[0], N / 4); \
q.submit([&](handler &cgh) { \
auto A = a_buf.get_access<access::mode::read>(cgh); \
auto D = d_buf.get_access<access::mode::write>(cgh); \
cgh.parallel_for(N / 4, \
[=](id<1> index) { D[index] = NAME(A[index]); }); \
}); \
} \
for (int i = 0; i < N; i++) { \
if (i % 4 != 3) { \
assert(check(d[i], NAME(a[i]))); \
} \
}

#define TEST_BUILTIN_1_SCAL_IMPL(NAME) \
{ \
buffer<half> a_buf(&a[0], N); \
buffer<half> d_buf(&d[0], N); \
q.submit([&](handler &cgh) { \
auto A = a_buf.get_access<access::mode::read>(cgh); \
auto D = d_buf.get_access<access::mode::write>(cgh); \
cgh.parallel_for(N, [=](id<1> index) { D[index] = NAME(A[index]); }); \
}); \
} \
for (int i = 0; i < N; i++) { \
assert(check(d[i], NAME(a[i]))); \
}

#define TEST_BUILTIN_1(NAME) \
TEST_BUILTIN_1_SCAL_IMPL(NAME) \
TEST_BUILTIN_1_VEC_IMPL(NAME, 2) \
TEST_BUILTIN_1_VEC3_IMPL(NAME) \
TEST_BUILTIN_1_VEC_IMPL(NAME, 4) \
TEST_BUILTIN_1_VEC_IMPL(NAME, 8) \
TEST_BUILTIN_1_VEC_IMPL(NAME, 16)

#define TEST_BUILTIN_2_VEC_IMPL(NAME, SZ) \
{ \
buffer<half##SZ> a_buf((half##SZ *)&a[0], N / SZ); \
buffer<half##SZ> b_buf((half##SZ *)&b[0], N / SZ); \
buffer<half##SZ> d_buf((half##SZ *)&d[0], N / SZ); \
q.submit([&](handler &cgh) { \
auto A = a_buf.get_access<access::mode::read>(cgh); \
auto B = b_buf.get_access<access::mode::read>(cgh); \
auto D = d_buf.get_access<access::mode::write>(cgh); \
cgh.parallel_for( \
N / SZ, [=](id<1> index) { D[index] = NAME(A[index], B[index]); }); \
}); \
} \
for (int i = 0; i < N; i++) { \
assert(check(d[i], NAME(a[i], b[i]))); \
}

#define TEST_BUILTIN_2_VEC3_IMPL(NAME) \
{ \
buffer<half3> a_buf((half3 *)&a[0], N / 4); \
buffer<half3> b_buf((half3 *)&b[0], N / 4); \
buffer<half3> d_buf((half3 *)&d[0], N / 4); \
q.submit([&](handler &cgh) { \
auto A = a_buf.get_access<access::mode::read>(cgh); \
auto B = b_buf.get_access<access::mode::read>(cgh); \
auto D = d_buf.get_access<access::mode::write>(cgh); \
cgh.parallel_for( \
N / 4, [=](id<1> index) { D[index] = NAME(A[index], B[index]); }); \
}); \
} \
for (int i = 0; i < N; i++) { \
if (i % 4 != 3) { \
assert(check(d[i], NAME(a[i], b[i]))); \
} \
}

#define TEST_BUILTIN_2_SCAL_IMPL(NAME) \
{ \
buffer<half> a_buf(&a[0], N); \
buffer<half> b_buf(&b[0], N); \
buffer<half> d_buf(&d[0], N); \
q.submit([&](handler &cgh) { \
auto A = a_buf.get_access<access::mode::read>(cgh); \
auto B = b_buf.get_access<access::mode::read>(cgh); \
auto D = d_buf.get_access<access::mode::write>(cgh); \
cgh.parallel_for( \
N, [=](id<1> index) { D[index] = NAME(A[index], B[index]); }); \
}); \
} \
for (int i = 0; i < N; i++) { \
assert(check(d[i], NAME(a[i], b[i]))); \
}

#define TEST_BUILTIN_2(NAME) \
TEST_BUILTIN_2_SCAL_IMPL(NAME) \
TEST_BUILTIN_2_VEC_IMPL(NAME, 2) \
TEST_BUILTIN_2_VEC3_IMPL(NAME) \
TEST_BUILTIN_2_VEC_IMPL(NAME, 4) \
TEST_BUILTIN_2_VEC_IMPL(NAME, 8) \
TEST_BUILTIN_2_VEC_IMPL(NAME, 16)

#define TEST_BUILTIN_3_VEC_IMPL(NAME, SZ) \
{ \
buffer<half##SZ> a_buf((half##SZ *)&a[0], N / SZ); \
buffer<half##SZ> b_buf((half##SZ *)&b[0], N / SZ); \
buffer<half##SZ> c_buf((half##SZ *)&c[0], N / SZ); \
buffer<half##SZ> d_buf((half##SZ *)&d[0], N / SZ); \
q.submit([&](handler &cgh) { \
auto A = a_buf.get_access<access::mode::read>(cgh); \
auto B = b_buf.get_access<access::mode::read>(cgh); \
auto C = c_buf.get_access<access::mode::read>(cgh); \
auto D = d_buf.get_access<access::mode::write>(cgh); \
cgh.parallel_for(N / SZ, [=](id<1> index) { \
D[index] = NAME(A[index], B[index], C[index]); \
}); \
}); \
} \
for (int i = 0; i < N; i++) { \
assert(check(d[i], NAME(a[i], b[i], c[i]))); \
}

#define TEST_BUILTIN_3_VEC3_IMPL(NAME) \
{ \
buffer<half3> a_buf((half3 *)&a[0], N / 4); \
buffer<half3> b_buf((half3 *)&b[0], N / 4); \
buffer<half3> c_buf((half3 *)&c[0], N / 4); \
buffer<half3> d_buf((half3 *)&d[0], N / 4); \
q.submit([&](handler &cgh) { \
auto A = a_buf.get_access<access::mode::read>(cgh); \
auto B = b_buf.get_access<access::mode::read>(cgh); \
auto C = c_buf.get_access<access::mode::read>(cgh); \
auto D = d_buf.get_access<access::mode::write>(cgh); \
cgh.parallel_for(N / 4, [=](id<1> index) { \
D[index] = NAME(A[index], B[index], C[index]); \
}); \
}); \
} \
for (int i = 0; i < N; i++) { \
if (i % 4 != 3) { \
assert(check(d[i], NAME(a[i], b[i], c[i]))); \
} \
}

#define TEST_BUILTIN_3_SCAL_IMPL(NAME) \
{ \
buffer<half> a_buf(&a[0], N); \
buffer<half> b_buf(&b[0], N); \
buffer<half> c_buf(&c[0], N); \
buffer<half> d_buf(&d[0], N); \
q.submit([&](handler &cgh) { \
auto A = a_buf.get_access<access::mode::read>(cgh); \
auto B = b_buf.get_access<access::mode::read>(cgh); \
auto C = c_buf.get_access<access::mode::read>(cgh); \
auto D = d_buf.get_access<access::mode::write>(cgh); \
cgh.parallel_for(N, [=](id<1> index) { \
D[index] = NAME(A[index], B[index], C[index]); \
}); \
}); \
} \
for (int i = 0; i < N; i++) { \
assert(check(d[i], NAME(a[i], b[i], c[i]))); \
}

#define TEST_BUILTIN_3(NAME) \
TEST_BUILTIN_3_SCAL_IMPL(NAME) \
TEST_BUILTIN_3_VEC_IMPL(NAME, 2) \
TEST_BUILTIN_3_VEC3_IMPL(NAME) \
TEST_BUILTIN_3_VEC_IMPL(NAME, 4) \
TEST_BUILTIN_3_VEC_IMPL(NAME, 8) \
TEST_BUILTIN_3_VEC_IMPL(NAME, 16)

int main() {
queue q;
std::vector<half> a(N), b(N), c(N), d(N);
for (int i = 0; i < N; i++) {
a[i] = i / (half)N;
b[i] = (N - i) / (half)N;
c[i] = (half)(3 * i);
}

TEST_BUILTIN_1(fabs);
TEST_BUILTIN_2(fmin);
TEST_BUILTIN_2(fmax);
TEST_BUILTIN_3(fma);

return 0;
}