DAC output #2
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DAC output #2
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not even blinky, just two switches into and mapped to LED
Process of adding Intel IP is unnecessarily obfuscated, but I have succeeded and it saved me some time eventually. This implements 4 bit counter, with SW 16 as clock input and KEY0 as asynchronous reset. Counter comes from Quartus IP library.
It does not stop once message is started, so prepare for a noise unless you hold reset. Stop condition yet to be implemented - my theory is that this is the reason why it only works half the time. HOW TO USE: 1. Compile. Program into the board. Press KEY0 for an initial reset. 2. Set switches 0-15 to represent bits of the message you want to send. You can find how to do that in WM8731 datasheet, page 49. 3. While while pressing Key 0 (hence not keeping reset at 1), press and release key 1. Your message should be sent to the board. 3b. if it didn't work (and you are sure switches are set correctly), repeat a few times just to be sure. 4. Tell me (MIKO) about your experience using fb group chat.
It works! (kind of) - requires 2's complement converter - requires support for parallel load for 24 bit samples (only send pulse wave rn)
Oscillators producing 4 chord progression. DAC interface (without start-up sequence - needs to be setup manually)
IT WORKS
*reverb is more of a filter
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Implemented I2C master, so now we can configure audio Codec.
So we are half way to getting audio out of FPGA unit now.