Skip to content

jgthayer/surf

 
 

Repository files navigation

About

A huge VHDL library for FPGA and digital ASIC development

Resources

License

Stars

Watchers

Forks

Releases

No releases published

Packages

No packages published

Languages

  • VHDL 65.5%
  • Verilog 17.4%
  • Python 11.9%
  • SystemVerilog 4.2%
  • Tcl 0.6%
  • C 0.4%