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Bus port / bit-select naming mismatch between Verilog, SDC, and DEF

Status: Open.

#234 In limbo018/DREAMPlace;

· Amik-TJ opened on Feb 11, 2026

Support for Blackwell GPUs and CUDA 12.x (Resolve cub namespace conflicts and version compatibility)

Status: Open.

#231 In limbo018/DREAMPlace;

· lxxxxb opened on Nov 12, 2025

align Problem

Status: Open.

#227 In limbo018/DREAMPlace;

· meihailang opened on Sep 10, 2025

ICCAD04 benchmark legalization troubles

Status: Open.

#226 In limbo018/DREAMPlace;

· profmadden opened on Aug 22, 2025

"timing_opt_flag": 1，malloc(): invalid size (unsorted)

Status: Open.

#224 In limbo018/DREAMPlace;

· HarryBiebber opened on Aug 13, 2025

Could not find the net name xxxx/xxx in timer

Status: Open.

#221 In limbo018/DREAMPlace;

· dmsdms5 opened on Jul 16, 2025

about routability

Status: Open.

#220 In limbo018/DREAMPlace;

· wrlbiscuits opened on Jul 8, 2025

[ASSERT ]：failed: CUDA Runtime Error: invalid device ordinal

Status: Open.

#219 In limbo018/DREAMPlace;

· HarryBiebber opened on May 25, 2025

I meet error : "malloc(): corrupted top size Aborted (core dumped)" while running Placer.py on iccad2015.ot/superblue1.json

Status: Open.

#217 In limbo018/DREAMPlace;

· lfy2947590638 opened on Apr 23, 2025

how to get the right netlist formation，I have tried the netlist by saveNetlist -flat -flattenbus，but still show that do not support bus yet

Status: Open.

#216 In limbo018/DREAMPlace;

· chao1577135517 opened on Apr 22, 2025

how to visulization the result and convert the .pl file to gds and so on ?

Status: Open.

#215 In limbo018/DREAMPlace;

· CVYang opened on Apr 18, 2025

Errors while building

Status: Open.

#212 In limbo018/DREAMPlace;

· zk1056309462 opened on Mar 4, 2025