[PW_SID:1057556] Linux RISC-V trace framework and drivers#1496
[PW_SID:1057556] Linux RISC-V trace framework and drivers#1496linux-riscv-bot wants to merge 13 commits intoworkflowfrom
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Add device tree bindings for the memory mapped RISC-V trace components which support both the RISC-V efficient trace (E-trace) protocol and the RISC-V Nexus-based trace (N-trace) protocol. The RISC-V trace components are defined by the RISC-V trace control interface specification. Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The RISC-V Trace Control Interface Specification [1] defines a standard way of implementing RISC-V trace related modular components irrespective to underlying trace format (E-trace or N-trace). These RISC-V trace components are organized in a graph-like topology where each RISC-V hart has its own RISC-V trace encoder component. Implement a basic driver framework for RISC-V trace where RISC-V trace components are instantiated by a common platform driver and a separate RISC-V trace driver for each type of RISC-V trace component. [1] https://github.com/riscv-non-isa/tg-nexus-trace/releases/download/1.0_Ratified/RISC-V-Trace-Control-Interface.pdf Co-developed-by: Mayuresh Chitale <mayuresh.chitale@oss.qualcomm.com> Signed-off-by: Mayuresh Chitale <mayuresh.chitale@oss.qualcomm.com> Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Trace needs to be configured on a chain of trace components which are connected to each other. These chain of components is also referred to as trace component path. Add functions to create/destroy a trace component path which will be later used by RISC-V trace perf support. Co-developed-by: Mayuresh Chitale <mayuresh.chitale@oss.qualcomm.com> Signed-off-by: Mayuresh Chitale <mayuresh.chitale@oss.qualcomm.com> Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The perf driver framework needs to be able to start / stop all components in a trace component path during its operation. Add rvtrace_path_start() and rvtrace_path_stop() functions for this purpose. Co-developed-by: Anup Patel <anup.patel@oss.qualcomm.com> Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com> Signed-off-by: Mayuresh Chitale <mayuresh.chitale@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add initial implementation of RISC-V trace encoder driver. The encoder is defined in the RISC-V Trace Control Interface specification. Co-developed-by: Anup Patel <anup.patel@oss.qualcomm.com> Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com> Signed-off-by: Mayuresh Chitale <mayuresh.chitale@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The RISC-V trace ramsink will need a mechanism to copy trace data into the perf AUX buffer. Add rvtrace_path_copyto_auxbuf() function and corresponding trace driver callback copyto_auxbuf() for this purpose. Co-developed-by: Mayuresh Chitale <mayuresh.chitale@oss.qualcomm.com> Signed-off-by: Mayuresh Chitale <mayuresh.chitale@oss.qualcomm.com> Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add initial implementation of RISC-V trace ramsink driver. The ramsink is defined in the RISC-V Trace Control Interface specification. Co-developed-by: Anup Patel <anup.patel@oss.qualcomm.com> Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com> Signed-off-by: Mayuresh Chitale <mayuresh.chitale@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The RISC-V ramsink trace component may have implementation specific restrictions such that the component can only write trace data in particular parts of DRAM. Enable DMA_RESTRICTED_POOL in the defconfig so that dma_alloc_*() and dma_free_*() APIs work for devices with DMA address restrictions. Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add perf driver for RISC-V tracing similar to ARM Coresight and Hisilicon PTT drivers. The driver adds 'rvtrace' event descriptor which can be used by the perf tool to record the RISC-V trace data. Co-developed-by: Anup Patel <anup.patel@oss.qualcomm.com> Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com> Signed-off-by: Mayuresh Chitale <mayuresh.chitale@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Introduce the required auxiliary API functions allowing the perf core to interact with RISC-V trace perf driver. Co-developed-by: Anup Patel <anup.patel@oss.qualcomm.com> Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com> Signed-off-by: Mayuresh Chitale <mayuresh.chitale@oss.qualcomm.com> Reviewed-by: Nutty Liu <nutty.liu@hotmail.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add bare bones support for RISC-V trace decoder so that the data received from the hardware by the RISC-V trace perf driver can be written to the perf record output file. Co-developed-by: Anup Patel <anup.patel@oss.qualcomm.com> Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com> Signed-off-by: Mayuresh Chitale <mayuresh.chitale@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add Mayuresh and myself as maintainers for RISC-V trace framework and drivers. Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
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Patch 1: "[v3,01/12] dt-bindings: Add RISC-V trace component bindings" |
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Patch 1: "[v3,01/12] dt-bindings: Add RISC-V trace component bindings" |
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Patch 1: "[v3,01/12] dt-bindings: Add RISC-V trace component bindings" |
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Patch 1: "[v3,01/12] dt-bindings: Add RISC-V trace component bindings" |
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Patch 1: "[v3,01/12] dt-bindings: Add RISC-V trace component bindings" |
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Patch 1: "[v3,01/12] dt-bindings: Add RISC-V trace component bindings" |
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Patch 1: "[v3,01/12] dt-bindings: Add RISC-V trace component bindings" |
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Patch 1: "[v3,01/12] dt-bindings: Add RISC-V trace component bindings" |
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Patch 1: "[v3,01/12] dt-bindings: Add RISC-V trace component bindings" |
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Patch 1: "[v3,01/12] dt-bindings: Add RISC-V trace component bindings" |
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Patch 1: "[v3,01/12] dt-bindings: Add RISC-V trace component bindings" |
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Patch 1: "[v3,01/12] dt-bindings: Add RISC-V trace component bindings" |
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Patch 2: "[v3,02/12] rvtrace: Initial implementation of driver framework" |
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Patch 2: "[v3,02/12] rvtrace: Initial implementation of driver framework" |
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Patch 2: "[v3,02/12] rvtrace: Initial implementation of driver framework" |
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Patch 2: "[v3,02/12] rvtrace: Initial implementation of driver framework" |
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Patch 2: "[v3,02/12] rvtrace: Initial implementation of driver framework" |
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Patch 10: "[v3,10/12] perf tools: Add RISC-V trace PMU record capabilities" |
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Patch 10: "[v3,10/12] perf tools: Add RISC-V trace PMU record capabilities" |
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Patch 10: "[v3,10/12] perf tools: Add RISC-V trace PMU record capabilities" |
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Patch 10: "[v3,10/12] perf tools: Add RISC-V trace PMU record capabilities" |
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Patch 10: "[v3,10/12] perf tools: Add RISC-V trace PMU record capabilities" |
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Patch 11: "[v3,11/12] perf tools: Initial support for RISC-V trace decoder" |
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Patch 11: "[v3,11/12] perf tools: Initial support for RISC-V trace decoder" |
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Patch 11: "[v3,11/12] perf tools: Initial support for RISC-V trace decoder" |
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Patch 11: "[v3,11/12] perf tools: Initial support for RISC-V trace decoder" |
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Patch 11: "[v3,11/12] perf tools: Initial support for RISC-V trace decoder" |
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Patch 11: "[v3,11/12] perf tools: Initial support for RISC-V trace decoder" |
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Patch 11: "[v3,11/12] perf tools: Initial support for RISC-V trace decoder" |
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Patch 11: "[v3,11/12] perf tools: Initial support for RISC-V trace decoder" |
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Patch 11: "[v3,11/12] perf tools: Initial support for RISC-V trace decoder" |
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Patch 11: "[v3,11/12] perf tools: Initial support for RISC-V trace decoder" |
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Patch 11: "[v3,11/12] perf tools: Initial support for RISC-V trace decoder" |
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Patch 11: "[v3,11/12] perf tools: Initial support for RISC-V trace decoder" |
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Patch 12: "[v3,12/12] MAINTAINERS: Add entry for RISC-V trace framework" |
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Patch 12: "[v3,12/12] MAINTAINERS: Add entry for RISC-V trace framework" |
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Patch 12: "[v3,12/12] MAINTAINERS: Add entry for RISC-V trace framework" |
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Patch 12: "[v3,12/12] MAINTAINERS: Add entry for RISC-V trace framework" |
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Patch 12: "[v3,12/12] MAINTAINERS: Add entry for RISC-V trace framework" |
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Patch 12: "[v3,12/12] MAINTAINERS: Add entry for RISC-V trace framework" |
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Patch 12: "[v3,12/12] MAINTAINERS: Add entry for RISC-V trace framework" |
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Patch 12: "[v3,12/12] MAINTAINERS: Add entry for RISC-V trace framework" |
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Patch 12: "[v3,12/12] MAINTAINERS: Add entry for RISC-V trace framework" |
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Patch 12: "[v3,12/12] MAINTAINERS: Add entry for RISC-V trace framework" |
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Patch 12: "[v3,12/12] MAINTAINERS: Add entry for RISC-V trace framework" |
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Patch 12: "[v3,12/12] MAINTAINERS: Add entry for RISC-V trace framework" |
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PR for series 1057556 applied to workflow
Name: Linux RISC-V trace framework and drivers
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=1057556
Version: 3