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@SamuelRiedel SamuelRiedel commented Dec 18, 2025

Ibex and OpenTitan have not been aligned in quite a long time. The Ibex PR lowRISC/ibex#2339 pulls in the latest changes in OpenTitan to Ibex (new fusesoc version, updated prims, changed ram interface) and this PR now includes the updated Ibex back in OpenTitan. It contains mainly small fixes, a lot of typo fixes, and an open-source software formal flow.

This PR currently vendors in the branch from lowRISC/ibex#2339 to demonstrate that this version of Ibex passes the OT CI. Before merging this OT PR, we should merge the Ibex one and quickly modify the WIP commit to point back to the upstream repo and create the update commit with all modification in the commit message. lowRISC/ibex#2339 was merged, and this PR now pulls the current master branch of Ibex.

This PR will resolve this comment: #28715 (comment)

@SamuelRiedel SamuelRiedel force-pushed the update-ibex branch 2 times, most recently from 7ab1416 to 72a404d Compare December 18, 2025 21:21
@SamuelRiedel SamuelRiedel marked this pull request as ready for review December 18, 2025 21:46
@SamuelRiedel SamuelRiedel requested a review from a team as a code owner December 18, 2025 21:46
@SamuelRiedel SamuelRiedel requested review from andreaskurth, eshapira, marnovandermaas, rswarbrick and vogelpi and removed request for a team December 18, 2025 21:46
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Thanks @SamuelRiedel , this looks good modulo merging the PR in Ibex first and then update this PR on top :-)

Update code from upstream repository
https://github.com/lowRISC/ibex.git to revision
246849ed1063828355cae8a22c6f1aa95250c3b6

* [rtl] Fix linter warnings (Samuel Riedel)
* [rtl,dv] Align rtl with new prims from OpenTitan (Samuel Riedel)
* [fusesoc] Align fusesoc version with OpenTitan (2.4.3) (Samuel
  Riedel)
* [rtl] Stop rvfi from reporting load information on stores (Samuel
  Riedel)
* [dv] Fix the `riscv_dret_test` (Samuel Riedel)
* [rtl] Drop empty ifdef pair (Rupert Swarbrick)
* [CSR] Clarify PMP config assignment (Marno van der Maas)
* [pmp] MSB and LSB of PMP address now params (Marno van der Maas)
* [ci] Have an OSS-Formal CI Pass (Louis-Emile)
* [dv/formal] Introduce an Open Source Formal Flow (Louis-Emile)
* [dv/formal] Cleanup RTL for use by yosys-slang (Louis-Emile)
* [dv/formal] Remove -fun2wires 2:rX (Louis-Emile)
* [dv/formal] Remove buildspec.py (Louis-Emile)
* Fix lowRISC/ibex#2302 (Akash Levy)
* [doc] Fix typo'd alert name (James Wainwright)
* [nix] update nixpkgs and move from poetry to UV (Gary Guo)
* [formal] update sail (Gary Guo)
* Fixes to testbench environment to support elaboration with Verific +
  INVIO (Akash Levy)
* Use +define instead of -define to fix unknown option compiling with
  vcs (Rick Liu)
* Fix dsim RTL incompatibilities (Akash Levy)
* Unroll loops in ibex_core for dsim (Akash Levy)
* Build system fixes for dsim (Akash Levy)
* Nit: fix mismatch address reporting for ISS to remove top 32 bits
  (Akash Levy)
* Update google_riscv-dv to chipsalliance/riscv-dv@71666eb (Akash
  Levy)
* [c++] Upgrade to C++17 Support (Collin MacDonald)
* Prevent compiler warning [-Wparentheses] (Harry Callahan)
* Move debug exception vector to `BOOT_ADDR + 0x08 (Harry Callahan)
* Support alternate memory system via '+is_discrete_debug_module' opt
  (Harry Callahan)
* Support new spike version with configurable debug module address
  range (Harry Callahan)
* Split the dv_defines out from the ibex_dv.f fileset (Harry Callahan)
* Remove DmHaltAddrInRange_A and DmExceptionAddrInRange_A assertions
  (Harry Callahan)
* [rtl, syn] Fix typos (Elliot Baptist)
* [dv] Fix typos (Elliot Baptist)
* [doc] Fix typos (Elliot Baptist)
* [fcov] Add fcov for the interaction of pmp with debug module
  accesses (Harry Callahan)
* [rtl] Split pmp_req_err_o logic to allow easier binding for fcov
  (Harry Callahan)
* Change '/bin/bash' shebangs to '/usr/bin/env bash' (Harry Callahan)
* [syn] Add keep_hierarchy constraints to prim_generic (Pascal Nasahl)
* [syn] Enable synthesis for SecureIbex config (Pascal Nasahl)

Signed-off-by: Samuel Riedel <sriedel@lowrisc.org>
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Thanks @vogelpi for having a look. After merging Ibex, I updated the commit and this PR is fully ready from my side now. The Run earlgrey DV test regression 0 failed due to a spurious Bazel download error. I restarted the pipeline and the second run passed.

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vogelpi commented Dec 23, 2025

CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_alu.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_controller.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_core.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_cs_registers.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_decoder.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_dummy_instr.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_ex_block.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_icache.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_id_stage.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_if_stage.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_load_store_unit.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_lockstep.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_multdiv_fast.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_multdiv_slow.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_pkg.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_pmp.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_prefetch_buffer.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_top.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_top_tracing.sv

This PR contains a set of Ibex RTL changes. Most of them are typo fixes in comments, the remaining changes are related to prim modules and making the RTL more generic (replacing literals by parameters). These changes don't have a functional impact.

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vogelpi commented Dec 23, 2025

Thanks @SamuelRiedel , this looks good. We need another committer to authorize the changes and can then merge this. Maybe @andreaskurth could take a look please?

@vogelpi vogelpi added the CI:Rerun Rerun failed CI jobs label Dec 23, 2025
@github-actions github-actions bot removed the CI:Rerun Rerun failed CI jobs label Dec 23, 2025
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Thanks for making these changes! It's really nice to avoid having too many patches.

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CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_alu.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_controller.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_core.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_cs_registers.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_decoder.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_dummy_instr.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_ex_block.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_icache.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_id_stage.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_if_stage.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_load_store_unit.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_lockstep.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_multdiv_fast.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_multdiv_slow.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_pkg.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_pmp.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_prefetch_buffer.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_top.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_top_tracing.sv

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CI actually passed on a second attempt if you click through.

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3 participants