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Merged
sangho2 merged 11 commits into from
Jul 1, 2025
Merged

Improve bit field handling with modular-bitfield crate #167

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6866644
Initial plan for issue
Copilot Jun 20, 2025
6030b3f
Add modular-bitfield dependency and improve HvInputVtl structure
Copilot Jun 20, 2025
4e6adb0
Replace complex HvRegisterVsmPartitionConfig with bitfield implementa…
Copilot Jun 20, 2025
ff25daa
Add comprehensive documentation for bit field improvements
Copilot Jun 20, 2025
e9bc9ae
Convert all remaining bitfield structures to use modular-bitfield
Copilot Jun 23, 2025
ea4cb64
Update bitfield usage and remove wrapper methods per review feedback
Copilot Jun 23, 2025
c375ac7
Fix clippy warnings: remove useless conversions, unnecessary casts, a…
Copilot Jun 24, 2025
e9654ed
Fix all cargo clippy warnings: improve casting safety and add must_us…
Copilot Jun 24, 2025
e94717c
Address PR review feedback: update modular-bitfield to 0.12.0, fix ca…
Copilot Jun 24, 2025
683c10a
Change HvPageProtFlags from u32 to u8 as requested in PR feedback
Copilot Jun 24, 2025
0e3f466
Merge branch 'main' into copilot/fix-136
sangho2 Jul 1, 2025
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1 change: 1 addition & 0 deletions litebox_platform_lvbs/Cargo.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,7 @@ rangemap = { version = "1.5.1", features = ["const_fn"] }
thiserror = { version = "2.0.6", default-features = false }
num_enum = { version = "0.7.3", default-features = false }
once_cell = { version = "1.20.2", default-features = false, features = ["alloc", "race"] }
modular-bitfield = { version = "0.12.0", default-features = false }
hashbrown = "0.15.2"
elf = { version = "0.7.4", default-features = false }

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4 changes: 2 additions & 2 deletions litebox_platform_lvbs/src/mshv/hvcall.rs
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Expand Up @@ -129,8 +129,8 @@ pub fn init() -> Result<(), HypervError> {
debug_serial_println!("HV_X64_MSR_SIMP: {:#x}", rdmsr(HV_X64_MSR_SIMP));

let mut sint = HvSynicSint::new();
sint.set_vector(u64::from(HYPERVISOR_CALLBACK_VECTOR));
sint.set_auto_eoi();
sint.set_vector(HYPERVISOR_CALLBACK_VECTOR);
sint.set_auto_eoi(true);

wrmsr(HV_X64_MSR_SINT0, sint.as_uint64());
if get_core_id() == 0 {
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2 changes: 1 addition & 1 deletion litebox_platform_lvbs/src/mshv/hvcall_mm.rs
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Expand Up @@ -28,7 +28,7 @@ pub fn hv_modify_vtl_protection_mask(

hvin.partition_id = HV_PARTITION_ID_SELF;
hvin.target_vtl = HvInputVtl::current();
hvin.map_flags = page_access.bits();
hvin.map_flags = u32::from(page_access.bits());

let mut total_protected: u64 = 0;
while total_protected < num_pages {
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36 changes: 18 additions & 18 deletions litebox_platform_lvbs/src/mshv/hvcall_vp.rs
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Expand Up @@ -60,7 +60,7 @@ pub fn hvcall_set_vp_registers(reg_name: u32, value: u64) -> Result<u64, HypervC
/// Hyper-V Hypercall to set VTL0's registers like MSR and control registers.
#[inline]
pub fn hvcall_set_vp_vtl0_registers(reg_name: u32, value: u64) -> Result<u64, HypervCallError> {
hvcall_set_vp_registers_internal(reg_name, value, HvInputVtl::new(HV_VTL_NORMAL))
hvcall_set_vp_registers_internal(reg_name, value, HvInputVtl::new_for_vtl(HV_VTL_NORMAL))
}

fn hvcall_get_vp_registers_internal(
Expand Down Expand Up @@ -108,7 +108,7 @@ pub fn hvcall_get_vp_registers(reg_name: u32) -> Result<u64, HypervCallError> {
/// Hyper-V Hypercall to get VTL0's registers like MSR and control registers.
#[inline]
pub fn hvcall_get_vp_vtl0_registers(reg_name: u32) -> Result<u64, HypervCallError> {
hvcall_get_vp_registers_internal(reg_name, HvInputVtl::new(HV_VTL_NORMAL))
hvcall_get_vp_registers_internal(reg_name, HvInputVtl::new_for_vtl(HV_VTL_NORMAL))
}

/// Populate the VP context for VTL1
Expand Down Expand Up @@ -142,33 +142,33 @@ fn hv_vtl_populate_vp_context(input: &mut HvEnableVpVtl, tss: u64, rip: u64, rsp
// We only support 64-bit long mode for now, so most of the segment register fields are ignored.
input.vp_context.cs.selector = SegmentSelector::new(1, PrivilegeLevel::Ring0).0;
input.vp_context.cs.set_attributes(
SegmentRegisterAttributeFlags::ACCESSED.bits()
| SegmentRegisterAttributeFlags::WRITABLE.bits()
| SegmentRegisterAttributeFlags::EXECUTABLE.bits()
| SegmentRegisterAttributeFlags::USER_SEGMENT.bits()
| SegmentRegisterAttributeFlags::PRESENT.bits()
| SegmentRegisterAttributeFlags::AVAILABLE.bits()
| SegmentRegisterAttributeFlags::LONG_MODE.bits(),
SegmentRegisterAttributeFlags::ACCESSED
| SegmentRegisterAttributeFlags::WRITABLE
| SegmentRegisterAttributeFlags::EXECUTABLE
| SegmentRegisterAttributeFlags::USER_SEGMENT
| SegmentRegisterAttributeFlags::PRESENT
| SegmentRegisterAttributeFlags::AVAILABLE
| SegmentRegisterAttributeFlags::LONG_MODE,
);

input.vp_context.ss.selector = SegmentSelector::new(2, PrivilegeLevel::Ring0).0;
input.vp_context.ss.set_attributes(
SegmentRegisterAttributeFlags::ACCESSED.bits()
| SegmentRegisterAttributeFlags::WRITABLE.bits()
| SegmentRegisterAttributeFlags::USER_SEGMENT.bits()
| SegmentRegisterAttributeFlags::PRESENT.bits()
| SegmentRegisterAttributeFlags::AVAILABLE.bits(),
SegmentRegisterAttributeFlags::ACCESSED
| SegmentRegisterAttributeFlags::WRITABLE
| SegmentRegisterAttributeFlags::USER_SEGMENT
| SegmentRegisterAttributeFlags::PRESENT
| SegmentRegisterAttributeFlags::AVAILABLE,
);

input.vp_context.tr.selector = SegmentSelector::new(3, PrivilegeLevel::Ring0).0;
input.vp_context.tr.base = tss;
input.vp_context.tr.limit =
u32::try_from(core::mem::size_of::<TaskStateSegment>()).unwrap() - 1;
input.vp_context.tr.set_attributes(
SegmentRegisterAttributeFlags::ACCESSED.bits()
| SegmentRegisterAttributeFlags::WRITABLE.bits()
| SegmentRegisterAttributeFlags::EXECUTABLE.bits()
| SegmentRegisterAttributeFlags::PRESENT.bits(),
SegmentRegisterAttributeFlags::ACCESSED
| SegmentRegisterAttributeFlags::WRITABLE
| SegmentRegisterAttributeFlags::EXECUTABLE
| SegmentRegisterAttributeFlags::PRESENT,
);
}

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