Initial support for kernels with IBT

[mlq]

This commit disables IBT for calls to kallsyms_lookup_name, thus, allowing PTEditor to load successfully on systems supporting CONFIG_X86_KERNEL_IBT.

[Mrmaxmeier]

While unlikely, this breaks in situations where the thread is migrated to a different CPU core during the "critical section" between ibt_save and ibt_restore calls since MSRs are per-core settings.
Here's LTTng's solution for reference (another out-of-tree module with uncommon kernel API requirements): https://review.lttng.org/c/lttng-modules/+/11625

struct irq_ibt_state
{
    u64 msr;
    unsigned long flags;
};
/*
 * Save (disable) and restore interrupts around MSR bit change and indirect
 * function call to make sure this thread is not migrated to another CPU which
 * would not have the MSR bit cleared.
 */
#ifdef CONFIG_X86_KERNEL_IBT
#include <asm/cpufeature.h>
#include <asm/msr.h>
static inline __attribute__((always_inline)) struct irq_ibt_state wrapper_irq_ibt_save(void)
{
    struct irq_ibt_state state = {0, 0};
    u64 msr;
    if (!cpu_feature_enabled(X86_FEATURE_IBT))
        goto end;
    local_irq_save(state.flags);
    rdmsrl(MSR_IA32_S_CET, msr);
    wrmsrl(MSR_IA32_S_CET, msr & ~CET_ENDBR_EN);
    state.msr = msr;
end:
    return state;
}
static inline __attribute__((always_inline)) void wrapper_irq_ibt_restore(struct irq_ibt_state state)
{
    u64 msr;
    if (!cpu_feature_enabled(X86_FEATURE_IBT))
        return;
    rdmsrl(MSR_IA32_S_CET, msr);
    msr &= ~CET_ENDBR_EN;
    msr |= (state.msr & CET_ENDBR_EN);
    wrmsrl(MSR_IA32_S_CET, msr);
    local_irq_restore(state.flags);
}
#else