@@ -13,6 +13,8 @@ module chimera_cluster_adapter #(
1313 parameter int WidePassThroughRegionStart = '0 ,
1414 // End address of Memory Island
1515 parameter int WidePassThroughRegionEnd = '0 ,
16+ // Add AXI CDC between the cluster and SoC,
17+ parameter bit EnAxiCdc = 1'b0 ,
1618
1719 parameter type narrow_in_req_t = logic ,
1820 parameter type narrow_in_resp_t = logic ,
@@ -330,71 +332,92 @@ module chimera_cluster_adapter #(
330332 .mst_resp_i (axi_from_cluster_wide_resp)
331333 );
332334
333- // AXI Narrow CDC from SoC to Cluster
334-
335- axi_cdc # (
336- .aw_chan_t (axi_narrow_soc_in_aw_chan_t),
337- .w_chan_t (axi_narrow_soc_in_w_chan_t),
338- .b_chan_t (axi_narrow_soc_in_b_chan_t),
339- .ar_chan_t (axi_narrow_soc_in_ar_chan_t),
340- .r_chan_t (axi_narrow_soc_in_r_chan_t),
341- .axi_req_t (narrow_in_req_t),
342- .axi_resp_t (narrow_in_resp_t)
343- ) narrow_slv_cdc (
344- .src_clk_i (soc_clk_i),
345- .src_rst_ni (rst_ni),
346- .src_req_i (narrow_in_req_i),
347- .src_resp_o (narrow_in_resp_o),
348-
349- .dst_clk_i (clu_clk_i),
350- .dst_rst_ni (rst_ni),
351- .dst_req_o (axi_to_cluster_narrow_req),
352- .dst_resp_i (axi_to_cluster_narrow_resp)
353- );
354-
355- // AXI Narrow CDC from Cluster to SoC
356-
357- axi_cdc # (
358- .aw_chan_t (axi_narrow_soc_out_aw_chan_t),
359- .w_chan_t (axi_narrow_soc_out_w_chan_t),
360- .b_chan_t (axi_narrow_soc_out_b_chan_t),
361- .ar_chan_t (axi_narrow_soc_out_ar_chan_t),
362- .r_chan_t (axi_narrow_soc_out_r_chan_t),
363- .axi_req_t (narrow_out_req_t),
364- .axi_resp_t (narrow_out_resp_t)
365- ) narrow_mst_cdc (
366- .src_clk_i (clu_clk_i),
367- .src_rst_ni (rst_ni),
368- .src_req_i (axi_from_cluster_narrow_req),
369- .src_resp_o (axi_from_cluster_narrow_resp),
370-
371- .dst_clk_i (soc_clk_i),
372- .dst_rst_ni (rst_ni),
373- .dst_req_o (narrow_out_req_o[0 ]),
374- .dst_resp_i (narrow_out_resp_i[0 ])
375- );
376-
377- // AXI Wide CDC from Cluster to SoC
378-
379- axi_cdc # (
380- .aw_chan_t (axi_wide_clu_out_aw_chan_t),
381- .w_chan_t (axi_wide_clu_out_w_chan_t),
382- .b_chan_t (axi_wide_clu_out_b_chan_t),
383- .ar_chan_t (axi_wide_clu_out_ar_chan_t),
384- .r_chan_t (axi_wide_clu_out_r_chan_t),
385- .axi_req_t (wide_out_req_t),
386- .axi_resp_t (wide_out_resp_t)
387- ) wide_mst_cdc (
388- .src_clk_i (clu_clk_i),
389- .src_rst_ni (rst_ni),
390- .src_req_i (axi_from_cluster_wide_req),
391- .src_resp_o (axi_from_cluster_wide_resp),
392-
393- .dst_clk_i (soc_clk_i),
394- .dst_rst_ni (rst_ni),
395- .dst_req_o (axi_from_cluster_wide_premux_req),
396- .dst_resp_i (axi_from_cluster_wide_premux_resp)
397- );
335+ // Choose carefully if you need or not AXI CDC.
336+ // If so, check the FIFO_DEPTH and SYNC_STAGES parameters in axi_cdc.
337+ // They have to be set consciously not to limit the bandwidth.
338+ if (EnAxiCdc) begin : gen_axi_cdcs
339+ // AXI Narrow CDC from SoC to Cluster
340+ axi_cdc # (
341+ .aw_chan_t (axi_narrow_soc_in_aw_chan_t),
342+ .w_chan_t (axi_narrow_soc_in_w_chan_t),
343+ .b_chan_t (axi_narrow_soc_in_b_chan_t),
344+ .ar_chan_t (axi_narrow_soc_in_ar_chan_t),
345+ .r_chan_t (axi_narrow_soc_in_r_chan_t),
346+ .axi_req_t (narrow_in_req_t),
347+ .axi_resp_t (narrow_in_resp_t),
348+ .LogDepth (6 ),
349+ .SyncStages (2 )
350+ ) narrow_slv_cdc (
351+ .src_clk_i (soc_clk_i),
352+ .src_rst_ni (rst_ni),
353+ .src_req_i (narrow_in_req_i),
354+ .src_resp_o (narrow_in_resp_o),
355+
356+ .dst_clk_i (clu_clk_i),
357+ .dst_rst_ni (rst_ni),
358+ .dst_req_o (axi_to_cluster_narrow_req),
359+ .dst_resp_i (axi_to_cluster_narrow_resp)
360+ );
361+
362+ // AXI Narrow CDC from Cluster to SoC
363+
364+ axi_cdc # (
365+ .aw_chan_t (axi_narrow_soc_out_aw_chan_t),
366+ .w_chan_t (axi_narrow_soc_out_w_chan_t),
367+ .b_chan_t (axi_narrow_soc_out_b_chan_t),
368+ .ar_chan_t (axi_narrow_soc_out_ar_chan_t),
369+ .r_chan_t (axi_narrow_soc_out_r_chan_t),
370+ .axi_req_t (narrow_out_req_t),
371+ .axi_resp_t (narrow_out_resp_t),
372+ .LogDepth (6 ),
373+ .SyncStages (2 )
374+ ) narrow_mst_cdc (
375+ .src_clk_i (clu_clk_i),
376+ .src_rst_ni (rst_ni),
377+ .src_req_i (axi_from_cluster_narrow_req),
378+ .src_resp_o (axi_from_cluster_narrow_resp),
379+
380+ .dst_clk_i (soc_clk_i),
381+ .dst_rst_ni (rst_ni),
382+ .dst_req_o (narrow_out_req_o[0 ]),
383+ .dst_resp_i (narrow_out_resp_i[0 ])
384+ );
385+
386+ // AXI Wide CDC from Cluster to SoC
387+
388+ axi_cdc # (
389+ .aw_chan_t (axi_wide_clu_out_aw_chan_t),
390+ .w_chan_t (axi_wide_clu_out_w_chan_t),
391+ .b_chan_t (axi_wide_clu_out_b_chan_t),
392+ .ar_chan_t (axi_wide_clu_out_ar_chan_t),
393+ .r_chan_t (axi_wide_clu_out_r_chan_t),
394+ .axi_req_t (wide_out_req_t),
395+ .axi_resp_t (wide_out_resp_t),
396+ .LogDepth (6 ),
397+ .SyncStages (2 )
398+ ) wide_mst_cdc (
399+ .src_clk_i (clu_clk_i),
400+ .src_rst_ni (rst_ni),
401+ .src_req_i (axi_from_cluster_wide_req),
402+ .src_resp_o (axi_from_cluster_wide_resp),
403+
404+ .dst_clk_i (soc_clk_i),
405+ .dst_rst_ni (rst_ni),
406+ .dst_req_o (axi_from_cluster_wide_premux_req),
407+ .dst_resp_i (axi_from_cluster_wide_premux_resp)
408+ );
409+
410+ end else begin : gen_no_axi_cdcs
411+ // Direct connections if no CDC is needed
412+ assign narrow_in_resp_o = axi_to_cluster_narrow_resp;
413+ assign axi_to_cluster_narrow_req = narrow_in_req_i;
414+
415+ assign narrow_out_req_o[0 ] = axi_from_cluster_narrow_req;
416+ assign axi_from_cluster_narrow_resp = narrow_out_resp_i[0 ];
417+
418+ assign axi_from_cluster_wide_premux_req = axi_from_cluster_wide_req;
419+ assign axi_from_cluster_wide_resp = axi_from_cluster_wide_premux_resp;
420+ end
398421
399422 // Validate parameters
400423`ifndef VERILATOR
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